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Dependencies:   FFT

mbed/drivers/SPI.h@7:0d62545e6d73, 2020-12-03 (annotated)

Committer:
shyamgatech
Date:
Thu Dec 03 18:15:35 2020 +0000
Revision:
7:0d62545e6d73
Parent:
0:d6c9b09b4042 
addded gui mbed code;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
annieluo2 0:d6c9b09b4042 1 /* mbed Microcontroller Library
annieluo2 0:d6c9b09b4042 2 * Copyright (c) 2006-2015 ARM Limited
annieluo2 0:d6c9b09b4042 3 *
annieluo2 0:d6c9b09b4042 4 * Licensed under the Apache License, Version 2.0 (the "License");
annieluo2 0:d6c9b09b4042 5 * you may not use this file except in compliance with the License.
annieluo2 0:d6c9b09b4042 6 * You may obtain a copy of the License at
annieluo2 0:d6c9b09b4042 7 *
annieluo2 0:d6c9b09b4042 8 * http://www.apache.org/licenses/LICENSE-2.0
annieluo2 0:d6c9b09b4042 9 *
annieluo2 0:d6c9b09b4042 10 * Unless required by applicable law or agreed to in writing, software
annieluo2 0:d6c9b09b4042 11 * distributed under the License is distributed on an "AS IS" BASIS,
annieluo2 0:d6c9b09b4042 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
annieluo2 0:d6c9b09b4042 13 * See the License for the specific language governing permissions and
annieluo2 0:d6c9b09b4042 14 * limitations under the License.
annieluo2 0:d6c9b09b4042 15 */
annieluo2 0:d6c9b09b4042 16 #ifndef MBED_SPI_H
annieluo2 0:d6c9b09b4042 17 #define MBED_SPI_H
annieluo2 0:d6c9b09b4042 18
annieluo2 0:d6c9b09b4042 19 #include "platform/platform.h"
annieluo2 0:d6c9b09b4042 20
annieluo2 0:d6c9b09b4042 21 #if DEVICE_SPI
annieluo2 0:d6c9b09b4042 22
annieluo2 0:d6c9b09b4042 23 #include "platform/PlatformMutex.h"
annieluo2 0:d6c9b09b4042 24 #include "hal/spi_api.h"
annieluo2 0:d6c9b09b4042 25 #include "platform/SingletonPtr.h"
annieluo2 0:d6c9b09b4042 26
annieluo2 0:d6c9b09b4042 27 #if DEVICE_SPI_ASYNCH
annieluo2 0:d6c9b09b4042 28 #include "platform/CThunk.h"
annieluo2 0:d6c9b09b4042 29 #include "hal/dma_api.h"
annieluo2 0:d6c9b09b4042 30 #include "platform/CircularBuffer.h"
annieluo2 0:d6c9b09b4042 31 #include "platform/FunctionPointer.h"
annieluo2 0:d6c9b09b4042 32 #include "platform/Transaction.h"
annieluo2 0:d6c9b09b4042 33 #endif
annieluo2 0:d6c9b09b4042 34
annieluo2 0:d6c9b09b4042 35 namespace mbed {
annieluo2 0:d6c9b09b4042 36 /** \addtogroup drivers */
annieluo2 0:d6c9b09b4042 37 /** @{*/
annieluo2 0:d6c9b09b4042 38
annieluo2 0:d6c9b09b4042 39 /** A SPI Master, used for communicating with SPI slave devices
annieluo2 0:d6c9b09b4042 40 *
annieluo2 0:d6c9b09b4042 41 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
annieluo2 0:d6c9b09b4042 42 *
annieluo2 0:d6c9b09b4042 43 * Most SPI devices will also require Chip Select and Reset signals. These
annieluo2 0:d6c9b09b4042 44 * can be controlled using <DigitalOut> pins
annieluo2 0:d6c9b09b4042 45 *
annieluo2 0:d6c9b09b4042 46 * @Note Synchronization level: Thread safe
annieluo2 0:d6c9b09b4042 47 *
annieluo2 0:d6c9b09b4042 48 * Example:
annieluo2 0:d6c9b09b4042 49 * @code
annieluo2 0:d6c9b09b4042 50 * // Send a byte to a SPI slave, and record the response
annieluo2 0:d6c9b09b4042 51 *
annieluo2 0:d6c9b09b4042 52 * #include "mbed.h"
annieluo2 0:d6c9b09b4042 53 *
annieluo2 0:d6c9b09b4042 54 * // hardware ssel (where applicable)
annieluo2 0:d6c9b09b4042 55 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
annieluo2 0:d6c9b09b4042 56 *
annieluo2 0:d6c9b09b4042 57 * // software ssel
annieluo2 0:d6c9b09b4042 58 * SPI device(p5, p6, p7); // mosi, miso, sclk
annieluo2 0:d6c9b09b4042 59 * DigitalOut cs(p8); // ssel
annieluo2 0:d6c9b09b4042 60 *
annieluo2 0:d6c9b09b4042 61 * int main() {
annieluo2 0:d6c9b09b4042 62 * // hardware ssel (where applicable)
annieluo2 0:d6c9b09b4042 63 * //int response = device.write(0xFF);
annieluo2 0:d6c9b09b4042 64 *
annieluo2 0:d6c9b09b4042 65 * device.lock();
annieluo2 0:d6c9b09b4042 66 * // software ssel
annieluo2 0:d6c9b09b4042 67 * cs = 0;
annieluo2 0:d6c9b09b4042 68 * int response = device.write(0xFF);
annieluo2 0:d6c9b09b4042 69 * cs = 1;
annieluo2 0:d6c9b09b4042 70 * device.unlock();
annieluo2 0:d6c9b09b4042 71 *
annieluo2 0:d6c9b09b4042 72 * }
annieluo2 0:d6c9b09b4042 73 * @endcode
annieluo2 0:d6c9b09b4042 74 */
annieluo2 0:d6c9b09b4042 75 class SPI {
annieluo2 0:d6c9b09b4042 76
annieluo2 0:d6c9b09b4042 77 public:
annieluo2 0:d6c9b09b4042 78
annieluo2 0:d6c9b09b4042 79 /** Create a SPI master connected to the specified pins
annieluo2 0:d6c9b09b4042 80 *
annieluo2 0:d6c9b09b4042 81 * mosi or miso can be specfied as NC if not used
annieluo2 0:d6c9b09b4042 82 *
annieluo2 0:d6c9b09b4042 83 * @param mosi SPI Master Out, Slave In pin
annieluo2 0:d6c9b09b4042 84 * @param miso SPI Master In, Slave Out pin
annieluo2 0:d6c9b09b4042 85 * @param sclk SPI Clock pin
annieluo2 0:d6c9b09b4042 86 * @param ssel SPI chip select pin
annieluo2 0:d6c9b09b4042 87 */
annieluo2 0:d6c9b09b4042 88 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
annieluo2 0:d6c9b09b4042 89
annieluo2 0:d6c9b09b4042 90 /** Configure the data transmission format
annieluo2 0:d6c9b09b4042 91 *
annieluo2 0:d6c9b09b4042 92 * @param bits Number of bits per SPI frame (4 - 16)
annieluo2 0:d6c9b09b4042 93 * @param mode Clock polarity and phase mode (0 - 3)
annieluo2 0:d6c9b09b4042 94 *
annieluo2 0:d6c9b09b4042 95 * @code
annieluo2 0:d6c9b09b4042 96 * mode | POL PHA
annieluo2 0:d6c9b09b4042 97 * -----+--------
annieluo2 0:d6c9b09b4042 98 * 0 | 0 0
annieluo2 0:d6c9b09b4042 99 * 1 | 0 1
annieluo2 0:d6c9b09b4042 100 * 2 | 1 0
annieluo2 0:d6c9b09b4042 101 * 3 | 1 1
annieluo2 0:d6c9b09b4042 102 * @endcode
annieluo2 0:d6c9b09b4042 103 */
annieluo2 0:d6c9b09b4042 104 void format(int bits, int mode = 0);
annieluo2 0:d6c9b09b4042 105
annieluo2 0:d6c9b09b4042 106 /** Set the spi bus clock frequency
annieluo2 0:d6c9b09b4042 107 *
annieluo2 0:d6c9b09b4042 108 * @param hz SCLK frequency in hz (default = 1MHz)
annieluo2 0:d6c9b09b4042 109 */
annieluo2 0:d6c9b09b4042 110 void frequency(int hz = 1000000);
annieluo2 0:d6c9b09b4042 111
annieluo2 0:d6c9b09b4042 112 /** Write to the SPI Slave and return the response
annieluo2 0:d6c9b09b4042 113 *
annieluo2 0:d6c9b09b4042 114 * @param value Data to be sent to the SPI slave
annieluo2 0:d6c9b09b4042 115 *
annieluo2 0:d6c9b09b4042 116 * @returns
annieluo2 0:d6c9b09b4042 117 * Response from the SPI slave
annieluo2 0:d6c9b09b4042 118 */
annieluo2 0:d6c9b09b4042 119 virtual int write(int value);
annieluo2 0:d6c9b09b4042 120
annieluo2 0:d6c9b09b4042 121 /** Acquire exclusive access to this SPI bus
annieluo2 0:d6c9b09b4042 122 */
annieluo2 0:d6c9b09b4042 123 virtual void lock(void);
annieluo2 0:d6c9b09b4042 124
annieluo2 0:d6c9b09b4042 125 /** Release exclusive access to this SPI bus
annieluo2 0:d6c9b09b4042 126 */
annieluo2 0:d6c9b09b4042 127 virtual void unlock(void);
annieluo2 0:d6c9b09b4042 128
annieluo2 0:d6c9b09b4042 129 #if DEVICE_SPI_ASYNCH
annieluo2 0:d6c9b09b4042 130
annieluo2 0:d6c9b09b4042 131 /** Start non-blocking SPI transfer using 8bit buffers.
annieluo2 0:d6c9b09b4042 132 *
annieluo2 0:d6c9b09b4042 133 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
annieluo2 0:d6c9b09b4042 134 * the default SPI value is sent
annieluo2 0:d6c9b09b4042 135 * @param tx_length The length of TX buffer in bytes
annieluo2 0:d6c9b09b4042 136 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
annieluo2 0:d6c9b09b4042 137 * received data are ignored
annieluo2 0:d6c9b09b4042 138 * @param rx_length The length of RX buffer in bytes
annieluo2 0:d6c9b09b4042 139 * @param callback The event callback function
annieluo2 0:d6c9b09b4042 140 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
annieluo2 0:d6c9b09b4042 141 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
annieluo2 0:d6c9b09b4042 142 */
annieluo2 0:d6c9b09b4042 143 template<typename Type>
annieluo2 0:d6c9b09b4042 144 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
annieluo2 0:d6c9b09b4042 145 if (spi_active(&_spi)) {
annieluo2 0:d6c9b09b4042 146 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
annieluo2 0:d6c9b09b4042 147 }
annieluo2 0:d6c9b09b4042 148 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
annieluo2 0:d6c9b09b4042 149 return 0;
annieluo2 0:d6c9b09b4042 150 }
annieluo2 0:d6c9b09b4042 151
annieluo2 0:d6c9b09b4042 152 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
annieluo2 0:d6c9b09b4042 153 */
annieluo2 0:d6c9b09b4042 154 void abort_transfer();
annieluo2 0:d6c9b09b4042 155
annieluo2 0:d6c9b09b4042 156 /** Clear the transaction buffer
annieluo2 0:d6c9b09b4042 157 */
annieluo2 0:d6c9b09b4042 158 void clear_transfer_buffer();
annieluo2 0:d6c9b09b4042 159
annieluo2 0:d6c9b09b4042 160 /** Clear the transaction buffer and abort on-going transfer.
annieluo2 0:d6c9b09b4042 161 */
annieluo2 0:d6c9b09b4042 162 void abort_all_transfers();
annieluo2 0:d6c9b09b4042 163
annieluo2 0:d6c9b09b4042 164 /** Configure DMA usage suggestion for non-blocking transfers
annieluo2 0:d6c9b09b4042 165 *
annieluo2 0:d6c9b09b4042 166 * @param usage The usage DMA hint for peripheral
annieluo2 0:d6c9b09b4042 167 * @return Zero if the usage was set, -1 if a transaction is on-going
annieluo2 0:d6c9b09b4042 168 */
annieluo2 0:d6c9b09b4042 169 int set_dma_usage(DMAUsage usage);
annieluo2 0:d6c9b09b4042 170
annieluo2 0:d6c9b09b4042 171 protected:
annieluo2 0:d6c9b09b4042 172 /** SPI IRQ handler
annieluo2 0:d6c9b09b4042 173 *
annieluo2 0:d6c9b09b4042 174 */
annieluo2 0:d6c9b09b4042 175 void irq_handler_asynch(void);
annieluo2 0:d6c9b09b4042 176
annieluo2 0:d6c9b09b4042 177 /** Common transfer method
annieluo2 0:d6c9b09b4042 178 *
annieluo2 0:d6c9b09b4042 179 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
annieluo2 0:d6c9b09b4042 180 * the default SPI value is sent
annieluo2 0:d6c9b09b4042 181 * @param tx_length The length of TX buffer in bytes
annieluo2 0:d6c9b09b4042 182 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
annieluo2 0:d6c9b09b4042 183 * received data are ignored
annieluo2 0:d6c9b09b4042 184 * @param rx_length The length of RX buffer in bytes
annieluo2 0:d6c9b09b4042 185 * @param bit_width The buffers element width
annieluo2 0:d6c9b09b4042 186 * @param callback The event callback function
annieluo2 0:d6c9b09b4042 187 * @param event The logical OR of events to modify
annieluo2 0:d6c9b09b4042 188 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
annieluo2 0:d6c9b09b4042 189 */
annieluo2 0:d6c9b09b4042 190 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
annieluo2 0:d6c9b09b4042 191
annieluo2 0:d6c9b09b4042 192 /**
annieluo2 0:d6c9b09b4042 193 *
annieluo2 0:d6c9b09b4042 194 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
annieluo2 0:d6c9b09b4042 195 * the default SPI value is sent
annieluo2 0:d6c9b09b4042 196 * @param tx_length The length of TX buffer in bytes
annieluo2 0:d6c9b09b4042 197 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
annieluo2 0:d6c9b09b4042 198 * received data are ignored
annieluo2 0:d6c9b09b4042 199 * @param rx_length The length of RX buffer in bytes
annieluo2 0:d6c9b09b4042 200 * @param bit_width The buffers element width
annieluo2 0:d6c9b09b4042 201 * @param callback The event callback function
annieluo2 0:d6c9b09b4042 202 * @param event The logical OR of events to modify
annieluo2 0:d6c9b09b4042 203 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
annieluo2 0:d6c9b09b4042 204 */
annieluo2 0:d6c9b09b4042 205 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
annieluo2 0:d6c9b09b4042 206
annieluo2 0:d6c9b09b4042 207 /** Configures a callback, spi peripheral and initiate a new transfer
annieluo2 0:d6c9b09b4042 208 *
annieluo2 0:d6c9b09b4042 209 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
annieluo2 0:d6c9b09b4042 210 * the default SPI value is sent
annieluo2 0:d6c9b09b4042 211 * @param tx_length The length of TX buffer in bytes
annieluo2 0:d6c9b09b4042 212 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
annieluo2 0:d6c9b09b4042 213 * received data are ignored
annieluo2 0:d6c9b09b4042 214 * @param rx_length The length of RX buffer in bytes
annieluo2 0:d6c9b09b4042 215 * @param bit_width The buffers element width
annieluo2 0:d6c9b09b4042 216 * @param callback The event callback function
annieluo2 0:d6c9b09b4042 217 * @param event The logical OR of events to modify
annieluo2 0:d6c9b09b4042 218 */
annieluo2 0:d6c9b09b4042 219 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
annieluo2 0:d6c9b09b4042 220
annieluo2 0:d6c9b09b4042 221 #if TRANSACTION_QUEUE_SIZE_SPI
annieluo2 0:d6c9b09b4042 222
annieluo2 0:d6c9b09b4042 223 /** Start a new transaction
annieluo2 0:d6c9b09b4042 224 *
annieluo2 0:d6c9b09b4042 225 * @param data Transaction data
annieluo2 0:d6c9b09b4042 226 */
annieluo2 0:d6c9b09b4042 227 void start_transaction(transaction_t *data);
annieluo2 0:d6c9b09b4042 228
annieluo2 0:d6c9b09b4042 229 /** Dequeue a transaction
annieluo2 0:d6c9b09b4042 230 *
annieluo2 0:d6c9b09b4042 231 */
annieluo2 0:d6c9b09b4042 232 void dequeue_transaction();
annieluo2 0:d6c9b09b4042 233 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
annieluo2 0:d6c9b09b4042 234 #endif
annieluo2 0:d6c9b09b4042 235
annieluo2 0:d6c9b09b4042 236 #endif
annieluo2 0:d6c9b09b4042 237
annieluo2 0:d6c9b09b4042 238 public:
annieluo2 0:d6c9b09b4042 239 virtual ~SPI() {
annieluo2 0:d6c9b09b4042 240 }
annieluo2 0:d6c9b09b4042 241
annieluo2 0:d6c9b09b4042 242 protected:
annieluo2 0:d6c9b09b4042 243 spi_t _spi;
annieluo2 0:d6c9b09b4042 244
annieluo2 0:d6c9b09b4042 245 #if DEVICE_SPI_ASYNCH
annieluo2 0:d6c9b09b4042 246 CThunk<SPI> _irq;
annieluo2 0:d6c9b09b4042 247 event_callback_t _callback;
annieluo2 0:d6c9b09b4042 248 DMAUsage _usage;
annieluo2 0:d6c9b09b4042 249 #endif
annieluo2 0:d6c9b09b4042 250
annieluo2 0:d6c9b09b4042 251 void aquire(void);
annieluo2 0:d6c9b09b4042 252 static SPI *_owner;
annieluo2 0:d6c9b09b4042 253 static SingletonPtr<PlatformMutex> _mutex;
annieluo2 0:d6c9b09b4042 254 int _bits;
annieluo2 0:d6c9b09b4042 255 int _mode;
annieluo2 0:d6c9b09b4042 256 int _hz;
annieluo2 0:d6c9b09b4042 257 };
annieluo2 0:d6c9b09b4042 258
annieluo2 0:d6c9b09b4042 259 } // namespace mbed
annieluo2 0:d6c9b09b4042 260
annieluo2 0:d6c9b09b4042 261 #endif
annieluo2 0:d6c9b09b4042 262
annieluo2 0:d6c9b09b4042 263 #endif
annieluo2 0:d6c9b09b4042 264
annieluo2 0:d6c9b09b4042 265 /** @}*/