Embedded Artists / Mbed OS DMSupport

A board support package for the LPC4088 Display Module.

Dependencies:   DM_HttpServer DM_USBHost

Dependents:   lpc4088_displaymodule_emwin lpc4088_displaymodule_demo_sphere sampleGUI sampleEmptyGUI ... more

Fork of DMSupport by EmbeddedArtists AB

GPDMA.h@42:bbfe299d4a0c, 2019-11-04 (annotated)

Committer:
embeddedartists
Date:
Mon Nov 04 14:32:50 2019 +0000
Revision:
42:bbfe299d4a0c
Parent:
38:420cdc281467 
More updates related to mbed OS 5

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embeddedartists 38:420cdc281467 1 /*
embeddedartists 38:420cdc281467 2 * Copyright 2015 Embedded Artists AB
embeddedartists 38:420cdc281467 3 *
embeddedartists 38:420cdc281467 4 * Licensed under the Apache License, Version 2.0 (the "License");
embeddedartists 38:420cdc281467 5 * you may not use this file except in compliance with the License.
embeddedartists 38:420cdc281467 6 * You may obtain a copy of the License at
embeddedartists 38:420cdc281467 7 *
embeddedartists 38:420cdc281467 8 * http://www.apache.org/licenses/LICENSE-2.0
embeddedartists 38:420cdc281467 9 *
embeddedartists 38:420cdc281467 10 * Unless required by applicable law or agreed to in writing, software
embeddedartists 38:420cdc281467 11 * distributed under the License is distributed on an "AS IS" BASIS,
embeddedartists 38:420cdc281467 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
embeddedartists 38:420cdc281467 13 * See the License for the specific language governing permissions and
embeddedartists 38:420cdc281467 14 * limitations under the License.
embeddedartists 38:420cdc281467 15 */
embeddedartists 38:420cdc281467 16
embeddedartists 38:420cdc281467 17 #ifndef GPDMA_H
embeddedartists 38:420cdc281467 18 #define GPDMA_H
embeddedartists 38:420cdc281467 19
embeddedartists 38:420cdc281467 20 #include "mbed.h"
embeddedartists 38:420cdc281467 21 #include "rtos.h"
embeddedartists 38:420cdc281467 22
embeddedartists 38:420cdc281467 23 /**
embeddedartists 38:420cdc281467 24 * @brief GPDMA request connections
embeddedartists 38:420cdc281467 25 */
embeddedartists 38:420cdc281467 26 #define GPDMA_CONN_MEMORY ((0UL))
embeddedartists 38:420cdc281467 27 #define GPDMA_CONN_SDC ((1UL)) /*!< SD card */
embeddedartists 38:420cdc281467 28
embeddedartists 38:420cdc281467 29 /**
embeddedartists 38:420cdc281467 30 * @brief Macro defines for DMA channel control registers
embeddedartists 38:420cdc281467 31 */
embeddedartists 38:420cdc281467 32 #define GPDMA_DMACCxControl_TransferSize(n) (((n & 0xFFF) << 0)) /*!< Transfer size*/
embeddedartists 38:420cdc281467 33 #define GPDMA_DMACCxControl_SBSize(n) (((n & 0x07) << 12)) /*!< Source burst size*/
embeddedartists 38:420cdc281467 34 #define GPDMA_DMACCxControl_DBSize(n) (((n & 0x07) << 15)) /*!< Destination burst size*/
embeddedartists 38:420cdc281467 35 #define GPDMA_DMACCxControl_SWidth(n) (((n & 0x07) << 18)) /*!< Source transfer width*/
embeddedartists 38:420cdc281467 36 #define GPDMA_DMACCxControl_DWidth(n) (((n & 0x07) << 21)) /*!< Destination transfer width*/
embeddedartists 38:420cdc281467 37 #define GPDMA_DMACCxControl_SI ((1UL << 26)) /*!< Source increment*/
embeddedartists 38:420cdc281467 38 #define GPDMA_DMACCxControl_DI ((1UL << 27)) /*!< Destination increment*/
embeddedartists 38:420cdc281467 39 #define GPDMA_DMACCxControl_SrcTransUseAHBMaster1 0
embeddedartists 38:420cdc281467 40 #define GPDMA_DMACCxControl_DestTransUseAHBMaster1 0
embeddedartists 38:420cdc281467 41 #define GPDMA_DMACCxControl_Prot1 ((1UL << 28)) /*!< Indicates that the access is in user mode or privileged mode*/
embeddedartists 38:420cdc281467 42 #define GPDMA_DMACCxControl_Prot2 ((1UL << 29)) /*!< Indicates that the access is bufferable or not bufferable*/
embeddedartists 38:420cdc281467 43 #define GPDMA_DMACCxControl_Prot3 ((1UL << 30)) /*!< Indicates that the access is cacheable or not cacheable*/
embeddedartists 38:420cdc281467 44 #define GPDMA_DMACCxControl_I ((1UL << 31)) /*!< Terminal count interrupt enable bit */
embeddedartists 38:420cdc281467 45
embeddedartists 38:420cdc281467 46 /**
embeddedartists 38:420cdc281467 47 * @brief GPDMA Burst size in Source and Destination definitions
embeddedartists 38:420cdc281467 48 */
embeddedartists 38:420cdc281467 49 #define GPDMA_BSIZE_1 ((0UL)) /*!< Burst size = 1 */
embeddedartists 38:420cdc281467 50 #define GPDMA_BSIZE_4 ((1UL)) /*!< Burst size = 4 */
embeddedartists 38:420cdc281467 51 #define GPDMA_BSIZE_8 ((2UL)) /*!< Burst size = 8 */
embeddedartists 38:420cdc281467 52 #define GPDMA_BSIZE_16 ((3UL)) /*!< Burst size = 16 */
embeddedartists 38:420cdc281467 53 #define GPDMA_BSIZE_32 ((4UL)) /*!< Burst size = 32 */
embeddedartists 38:420cdc281467 54 #define GPDMA_BSIZE_64 ((5UL)) /*!< Burst size = 64 */
embeddedartists 38:420cdc281467 55 #define GPDMA_BSIZE_128 ((6UL)) /*!< Burst size = 128 */
embeddedartists 38:420cdc281467 56 #define GPDMA_BSIZE_256 ((7UL)) /*!< Burst size = 256 */
embeddedartists 38:420cdc281467 57
embeddedartists 38:420cdc281467 58 /**
embeddedartists 38:420cdc281467 59 * @brief Width in Source transfer width and Destination transfer width definitions
embeddedartists 38:420cdc281467 60 */
embeddedartists 38:420cdc281467 61 #define GPDMA_WIDTH_BYTE ((0UL)) /*!< Width = 1 byte */
embeddedartists 38:420cdc281467 62 #define GPDMA_WIDTH_HALFWORD ((1UL)) /*!< Width = 2 bytes */
embeddedartists 38:420cdc281467 63 #define GPDMA_WIDTH_WORD ((2UL)) /*!< Width = 4 bytes */
embeddedartists 38:420cdc281467 64
embeddedartists 38:420cdc281467 65 /**
embeddedartists 38:420cdc281467 66 * @brief Macro defines for DMA Configuration register
embeddedartists 38:420cdc281467 67 */
embeddedartists 38:420cdc281467 68 #define GPDMA_DMACConfig_E ((0x01)) /*!< DMA Controller enable*/
embeddedartists 38:420cdc281467 69 #define GPDMA_DMACConfig_M ((0x02)) /*!< AHB Master endianness configuration*/
embeddedartists 38:420cdc281467 70 #define GPDMA_DMACConfig_BITMASK ((0x03))
embeddedartists 38:420cdc281467 71
embeddedartists 38:420cdc281467 72 /**
embeddedartists 38:420cdc281467 73 * @brief Macro defines for DMA Channel Configuration registers
embeddedartists 38:420cdc281467 74 */
embeddedartists 38:420cdc281467 75 #define GPDMA_DMACCxConfig_E ((1UL << 0)) /*!< DMA control enable*/
embeddedartists 38:420cdc281467 76 #define GPDMA_DMACCxConfig_SrcPeripheral(n) (((n & 0x1F) << 1)) /*!< Source peripheral*/
embeddedartists 38:420cdc281467 77 #define GPDMA_DMACCxConfig_DestPeripheral(n) (((n & 0x1F) << 6)) /*!< Destination peripheral*/
embeddedartists 38:420cdc281467 78 #define GPDMA_DMACCxConfig_TransferType(n) (((n & 0x7) << 11)) /*!< This value indicates the type of transfer*/
embeddedartists 38:420cdc281467 79 #define GPDMA_DMACCxConfig_IE ((1UL << 14)) /*!< Interrupt error mask*/
embeddedartists 38:420cdc281467 80 #define GPDMA_DMACCxConfig_ITC ((1UL << 15)) /*!< Terminal count interrupt mask*/
embeddedartists 38:420cdc281467 81 #define GPDMA_DMACCxConfig_L ((1UL << 16)) /*!< Lock*/
embeddedartists 38:420cdc281467 82 #define GPDMA_DMACCxConfig_A ((1UL << 17)) /*!< Active*/
embeddedartists 38:420cdc281467 83 #define GPDMA_DMACCxConfig_H ((1UL << 18)) /*!< Halt*/
embeddedartists 38:420cdc281467 84
embeddedartists 38:420cdc281467 85 /**
embeddedartists 38:420cdc281467 86 * @brief GPDMA Linker List Item structure type definition
embeddedartists 38:420cdc281467 87 */
embeddedartists 38:420cdc281467 88 typedef struct {
embeddedartists 38:420cdc281467 89 uint32_t SrcAddr; /**< Source Address */
embeddedartists 38:420cdc281467 90 uint32_t DstAddr; /**< Destination address */
embeddedartists 38:420cdc281467 91 uint32_t NextLLI; /**< Next LLI address, otherwise set to '0' */
embeddedartists 38:420cdc281467 92 uint32_t Control; /**< GPDMA Control of this LLI */
embeddedartists 38:420cdc281467 93 } GPDMA_LLI_Type;
embeddedartists 38:420cdc281467 94
embeddedartists 38:420cdc281467 95 /**
embeddedartists 38:420cdc281467 96 * Wrapper for the General Purpose DMA controller.
embeddedartists 38:420cdc281467 97 *
embeddedartists 38:420cdc281467 98 * The GPDMA class allows multiple users of DMA to claim one or more
embeddedartists 38:420cdc281467 99 * of the eight available DMA channels and to register handlers for the
embeddedartists 38:420cdc281467 100 * interrupts. This centralized control is needed as there are eight
embeddedartists 38:420cdc281467 101 * channels but only one DMA IRQ.
embeddedartists 38:420cdc281467 102 *
embeddedartists 38:420cdc281467 103 * By having to request a channel to use it is possible to avoid having
embeddedartists 38:420cdc281467 104 * hardcoded DMA channel number in the code
embeddedartists 38:420cdc281467 105 *
embeddedartists 38:420cdc281467 106 * An example of use:
embeddedartists 38:420cdc281467 107 *
embeddedartists 38:420cdc281467 108 * @code
embeddedartists 38:420cdc281467 109 * void handler() {
embeddedartists 38:420cdc281467 110 * _eventSuccess = LPC_GPDMA->IntTCStat & (1<<ch);
embeddedartists 38:420cdc281467 111 * LPC_GPDMA->IntTCClear = (1<<ch);
embeddedartists 38:420cdc281467 112 * }
embeddedartists 38:420cdc281467 113 *
embeddedartists 38:420cdc281467 114 * void foo() {
embeddedartists 38:420cdc281467 115 * GPDMA* dma = &GPDMA::instance();
embeddedartists 38:420cdc281467 116 * dma->init();
embeddedartists 38:420cdc281467 117 *
embeddedartists 38:420cdc281467 118 * DMAChannels ch = dma->acquireChannel(handler)
embeddedartists 38:420cdc281467 119 * if (ch == DMACh_Unavailable) {
embeddedartists 38:420cdc281467 120 * // handle error
embeddedartists 38:420cdc281467 121 * }
embeddedartists 38:420cdc281467 122 *
embeddedartists 38:420cdc281467 123 * // prepare the channel data (see e.g. gpdma_transfer_from_mci() in MCIFileSystem)
embeddedartists 38:420cdc281467 124 * ...
embeddedartists 38:420cdc281467 125 *
embeddedartists 38:420cdc281467 126 * // start the transfer
embeddedartists 38:420cdc281467 127 * dma->transfer(&cfg, ctrl_word, 0, GPDMA_CONN_SDC, GPDMA_CONN_MEMORY);
embeddedartists 38:420cdc281467 128 *
embeddedartists 38:420cdc281467 129 * // wait for transfer to complete (e.g. by handler() setting a flag)
embeddedartists 38:420cdc281467 130 * ...
embeddedartists 38:420cdc281467 131 *
embeddedartists 38:420cdc281467 132 * // return the channel now that it is no longer needed
embeddedartists 38:420cdc281467 133 * dma->releaseChannel(ch);
embeddedartists 38:420cdc281467 134 * }
embeddedartists 38:420cdc281467 135 * @endcode
embeddedartists 38:420cdc281467 136 */
embeddedartists 38:420cdc281467 137 class GPDMA {
embeddedartists 38:420cdc281467 138 public:
embeddedartists 38:420cdc281467 139 enum DMAChannels {
embeddedartists 38:420cdc281467 140 DMACh0, /* DMA channel 0 has the highest priority */
embeddedartists 38:420cdc281467 141 DMACh1,
embeddedartists 38:420cdc281467 142 DMACh2,
embeddedartists 38:420cdc281467 143 DMACh3,
embeddedartists 38:420cdc281467 144 DMACh4,
embeddedartists 38:420cdc281467 145 DMACh5,
embeddedartists 38:420cdc281467 146 DMACh6,
embeddedartists 38:420cdc281467 147 DMACh7, /* DMA channel 7 has the lowest priority */
embeddedartists 38:420cdc281467 148 NumDMAChannels,
embeddedartists 38:420cdc281467 149 DMACh_Unavailable = NumDMAChannels,
embeddedartists 38:420cdc281467 150 };
embeddedartists 38:420cdc281467 151 enum FlowControl {
embeddedartists 38:420cdc281467 152 FlowControl_M2M_Ctrl_DMA, /* Memory to memory - DMA control */
embeddedartists 38:420cdc281467 153 FlowControl_M2P_Ctrl_DMA, /* Memory to peripheral - DMA control */
embeddedartists 38:420cdc281467 154 FlowControl_P2M_Ctrl_DMA, /* Peripheral to memory - DMA control */
embeddedartists 38:420cdc281467 155 FlowControl_P2P_Ctrl_DMA, /* Source peripheral to destination peripheral - DMA control */
embeddedartists 38:420cdc281467 156 FlowControl_P2P_Ctrl_DestPeriph, /* Source peripheral to destination peripheral - destination peripheral control */
embeddedartists 38:420cdc281467 157 FlowControl_M2P_Ctrl_Periph, /* Memory to peripheral - peripheral control */
embeddedartists 38:420cdc281467 158 FlowControl_P2M_Ctrl_Periph, /* Peripheral to memory - peripheral control */
embeddedartists 38:420cdc281467 159 FlowControl_P2P_Ctrl_SrcPeriph, /* Source peripheral to destination peripheral - source peripheral control */
embeddedartists 38:420cdc281467 160 };
embeddedartists 38:420cdc281467 161 typedef struct {
embeddedartists 38:420cdc281467 162 DMAChannels ChannelNum;
embeddedartists 38:420cdc281467 163 uint32_t TransferSize; /* Length/Size of transfer */
embeddedartists 38:420cdc281467 164 uint32_t TransferWidth; /* Transfer width - used only for M2M */
embeddedartists 38:420cdc281467 165 uint32_t SrcAddr; /* Physical Source Address, only for M2M and M2P */
embeddedartists 38:420cdc281467 166 uint32_t DstAddr; /* Physical Destination Address, only for M2M and P2M */
embeddedartists 38:420cdc281467 167 FlowControl TransferType;
embeddedartists 38:420cdc281467 168 } GPDMA_Channel_CFG_T;
embeddedartists 38:420cdc281467 169
embeddedartists 38:420cdc281467 170 /** Get the only instance of the GPDMA
embeddedartists 38:420cdc281467 171 *
embeddedartists 38:420cdc281467 172 * @returns The Registry
embeddedartists 38:420cdc281467 173 */
embeddedartists 38:420cdc281467 174 static GPDMA& instance()
embeddedartists 38:420cdc281467 175 {
embeddedartists 38:420cdc281467 176 static GPDMA singleton;
embeddedartists 38:420cdc281467 177 return singleton;
embeddedartists 38:420cdc281467 178 }
embeddedartists 38:420cdc281467 179
embeddedartists 38:420cdc281467 180 /** Initializes the GPDMA
embeddedartists 38:420cdc281467 181 *
embeddedartists 38:420cdc281467 182 * Safe to call even with multiple DMA users
embeddedartists 38:420cdc281467 183 */
embeddedartists 38:420cdc281467 184 void init();
embeddedartists 38:420cdc281467 185
embeddedartists 38:420cdc281467 186 /** Shuts down the GPDMA
embeddedartists 38:420cdc281467 187 *
embeddedartists 38:420cdc281467 188 * Call will be ignored if there are any acquired channels
embeddedartists 38:420cdc281467 189 */
embeddedartists 38:420cdc281467 190 void deinit();
embeddedartists 38:420cdc281467 191
embeddedartists 38:420cdc281467 192 /** Get a free GPDMA channel for one DMA connection
embeddedartists 38:420cdc281467 193 *
embeddedartists 38:420cdc281467 194 * The function will start to look for the suggested channel.
embeddedartists 38:420cdc281467 195 * If it is in use then the next, higher, channel number will
embeddedartists 38:420cdc281467 196 * be tested. The default is set to use DMACh3 which has
embeddedartists 38:420cdc281467 197 * medium priority.
embeddedartists 38:420cdc281467 198 *
embeddedartists 38:420cdc281467 199 * To acquire a channel with the highest available priority
embeddedartists 38:420cdc281467 200 * call this function with DMACh0 as parameter.
embeddedartists 38:420cdc281467 201 *
embeddedartists 38:420cdc281467 202 * @param func the interrupt callback function
embeddedartists 38:420cdc281467 203 * @param suggested the first channel to look for
embeddedartists 38:420cdc281467 204 *
embeddedartists 38:420cdc281467 205 * @returns
embeddedartists 38:420cdc281467 206 * DMACh0 to DMACh7 on success
embeddedartists 38:420cdc281467 207 * DMACh_Unavailable if there are no channels available
embeddedartists 38:420cdc281467 208 */
embeddedartists 38:420cdc281467 209 DMAChannels acquireChannel(void (*irqfunc)(void), DMAChannels suggested = DMACh3);
embeddedartists 38:420cdc281467 210
embeddedartists 38:420cdc281467 211 /** Release a previously acquired channel
embeddedartists 38:420cdc281467 212 *
embeddedartists 38:420cdc281467 213 * @param ch the DMA channel to release
embeddedartists 38:420cdc281467 214 */
embeddedartists 38:420cdc281467 215 void releaseChannel(DMAChannels ch);
embeddedartists 38:420cdc281467 216
embeddedartists 38:420cdc281467 217 /** Returns the raw registers for the GPDMA channel for direct manipulation
embeddedartists 38:420cdc281467 218 *
embeddedartists 38:420cdc281467 219 * @param ch the DMA channel
embeddedartists 38:420cdc281467 220 *
embeddedartists 38:420cdc281467 221 * @returns
embeddedartists 38:420cdc281467 222 * The registers on success
embeddedartists 38:420cdc281467 223 * NULL if the channel is invalid
embeddedartists 38:420cdc281467 224 */
embeddedartists 38:420cdc281467 225 LPC_GPDMACH_TypeDef* getDirectRegisters(DMAChannels ch);
embeddedartists 38:420cdc281467 226
embeddedartists 38:420cdc281467 227 // Internal use only. Called by the IRQ handler
embeddedartists 38:420cdc281467 228 void processInterrupt();
embeddedartists 38:420cdc281467 229
embeddedartists 38:420cdc281467 230 /** Does the actual DMA transfer
embeddedartists 38:420cdc281467 231 *
embeddedartists 38:420cdc281467 232 * @param cfg the DMA configuration
embeddedartists 38:420cdc281467 233 * @param CtrlWord data for the DMA channel's CONTROL register
embeddedartists 38:420cdc281467 234 * @param LinkListItem address to the linked list or 0 if not used
embeddedartists 38:420cdc281467 235 * @param SrcPeripheral source of the transfer (GPDMA_CONN_MEMORY or GPDMA_CONN_SDC)
embeddedartists 38:420cdc281467 236 * @param DstPeripheral destination of the transfer (GPDMA_CONN_MEMORY or GPDMA_CONN_SDC)
embeddedartists 38:420cdc281467 237 *
embeddedartists 38:420cdc281467 238 * @returns
embeddedartists 38:420cdc281467 239 * True on success, false on failure
embeddedartists 38:420cdc281467 240 */
embeddedartists 38:420cdc281467 241 bool transfer(GPDMA_Channel_CFG_T* cfg,
embeddedartists 38:420cdc281467 242 uint32_t CtrlWord,
embeddedartists 38:420cdc281467 243 uint32_t LinkListItem,
embeddedartists 38:420cdc281467 244 uint8_t SrcPeripheral,
embeddedartists 38:420cdc281467 245 uint8_t DstPeripheral);
embeddedartists 38:420cdc281467 246
embeddedartists 38:420cdc281467 247 void stopTransfer(DMAChannels ch);
embeddedartists 38:420cdc281467 248
embeddedartists 38:420cdc281467 249 private:
embeddedartists 38:420cdc281467 250 typedef struct {
embeddedartists 38:420cdc281467 251 bool inUse;
embeddedartists 38:420cdc281467 252 void (*func)(void);
embeddedartists 38:420cdc281467 253 } channelData_t;
embeddedartists 38:420cdc281467 254
embeddedartists 38:420cdc281467 255 Mutex _mutex;
embeddedartists 38:420cdc281467 256 channelData_t _chData[NumDMAChannels];
embeddedartists 38:420cdc281467 257 int _usedChannels;
embeddedartists 38:420cdc281467 258 bool _initialized;
embeddedartists 38:420cdc281467 259
embeddedartists 38:420cdc281467 260 explicit GPDMA();
embeddedartists 38:420cdc281467 261 // hide copy constructor
embeddedartists 38:420cdc281467 262 GPDMA(const GPDMA&);
embeddedartists 38:420cdc281467 263 // hide assign operator
embeddedartists 38:420cdc281467 264 GPDMA& operator=(const GPDMA&);
embeddedartists 38:420cdc281467 265 ~GPDMA();
embeddedartists 38:420cdc281467 266 };
embeddedartists 38:420cdc281467 267
embeddedartists 38:420cdc281467 268 #endif