ECE 4333 / mbed

Dr. Diduch's template, compiling without errors.

Fork of mbed by gokmen ascioglu

LPC1768/core_cmFunc.h@1:bc4604ce8531, 2016-02-03 (annotated)

Committer:
JordanWisdom
Date:
Wed Feb 03 17:24:37 2016 +0000
Revision:
1:bc4604ce8531
Parent:
0:a8fa94490a0a 
minor updates to get this one working.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gokmenascioglu 0:a8fa94490a0a 1 /**************************************************************************//**
gokmenascioglu 0:a8fa94490a0a 2 * @file core_cmFunc.h
gokmenascioglu 0:a8fa94490a0a 3 * @brief CMSIS Cortex-M Core Function Access Header File
gokmenascioglu 0:a8fa94490a0a 4 * @version V3.00
gokmenascioglu 0:a8fa94490a0a 5 * @date 09. December 2011
gokmenascioglu 0:a8fa94490a0a 6 *
gokmenascioglu 0:a8fa94490a0a 7 * @note
gokmenascioglu 0:a8fa94490a0a 8 * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
gokmenascioglu 0:a8fa94490a0a 9 *
gokmenascioglu 0:a8fa94490a0a 10 * @par
gokmenascioglu 0:a8fa94490a0a 11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
gokmenascioglu 0:a8fa94490a0a 12 * processor based microcontrollers. This file can be freely distributed
gokmenascioglu 0:a8fa94490a0a 13 * within development tools that are supporting such ARM based processors.
gokmenascioglu 0:a8fa94490a0a 14 *
gokmenascioglu 0:a8fa94490a0a 15 * @par
gokmenascioglu 0:a8fa94490a0a 16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
gokmenascioglu 0:a8fa94490a0a 17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
gokmenascioglu 0:a8fa94490a0a 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
gokmenascioglu 0:a8fa94490a0a 19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
gokmenascioglu 0:a8fa94490a0a 20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
gokmenascioglu 0:a8fa94490a0a 21 *
gokmenascioglu 0:a8fa94490a0a 22 ******************************************************************************/
gokmenascioglu 0:a8fa94490a0a 23
gokmenascioglu 0:a8fa94490a0a 24 #ifndef __CORE_CMFUNC_H
gokmenascioglu 0:a8fa94490a0a 25 #define __CORE_CMFUNC_H
gokmenascioglu 0:a8fa94490a0a 26
gokmenascioglu 0:a8fa94490a0a 27
gokmenascioglu 0:a8fa94490a0a 28 /* ########################### Core Function Access ########################### */
gokmenascioglu 0:a8fa94490a0a 29 /** \ingroup CMSIS_Core_FunctionInterface
gokmenascioglu 0:a8fa94490a0a 30 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
gokmenascioglu 0:a8fa94490a0a 31 @{
gokmenascioglu 0:a8fa94490a0a 32 */
gokmenascioglu 0:a8fa94490a0a 33
gokmenascioglu 0:a8fa94490a0a 34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
gokmenascioglu 0:a8fa94490a0a 35 /* ARM armcc specific functions */
gokmenascioglu 0:a8fa94490a0a 36
gokmenascioglu 0:a8fa94490a0a 37 #if (__ARMCC_VERSION < 400677)
gokmenascioglu 0:a8fa94490a0a 38 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
gokmenascioglu 0:a8fa94490a0a 39 #endif
gokmenascioglu 0:a8fa94490a0a 40
gokmenascioglu 0:a8fa94490a0a 41 /* intrinsic void __enable_irq(); */
gokmenascioglu 0:a8fa94490a0a 42 /* intrinsic void __disable_irq(); */
gokmenascioglu 0:a8fa94490a0a 43
gokmenascioglu 0:a8fa94490a0a 44 /** \brief Get Control Register
gokmenascioglu 0:a8fa94490a0a 45
gokmenascioglu 0:a8fa94490a0a 46 This function returns the content of the Control Register.
gokmenascioglu 0:a8fa94490a0a 47
gokmenascioglu 0:a8fa94490a0a 48 \return Control Register value
gokmenascioglu 0:a8fa94490a0a 49 */
gokmenascioglu 0:a8fa94490a0a 50 static __INLINE uint32_t __get_CONTROL(void)
gokmenascioglu 0:a8fa94490a0a 51 {
gokmenascioglu 0:a8fa94490a0a 52 register uint32_t __regControl __ASM("control");
gokmenascioglu 0:a8fa94490a0a 53 return(__regControl);
gokmenascioglu 0:a8fa94490a0a 54 }
gokmenascioglu 0:a8fa94490a0a 55
gokmenascioglu 0:a8fa94490a0a 56
gokmenascioglu 0:a8fa94490a0a 57 /** \brief Set Control Register
gokmenascioglu 0:a8fa94490a0a 58
gokmenascioglu 0:a8fa94490a0a 59 This function writes the given value to the Control Register.
gokmenascioglu 0:a8fa94490a0a 60
gokmenascioglu 0:a8fa94490a0a 61 \param [in] control Control Register value to set
gokmenascioglu 0:a8fa94490a0a 62 */
gokmenascioglu 0:a8fa94490a0a 63 static __INLINE void __set_CONTROL(uint32_t control)
gokmenascioglu 0:a8fa94490a0a 64 {
gokmenascioglu 0:a8fa94490a0a 65 register uint32_t __regControl __ASM("control");
gokmenascioglu 0:a8fa94490a0a 66 __regControl = control;
gokmenascioglu 0:a8fa94490a0a 67 }
gokmenascioglu 0:a8fa94490a0a 68
gokmenascioglu 0:a8fa94490a0a 69
gokmenascioglu 0:a8fa94490a0a 70 /** \brief Get IPSR Register
gokmenascioglu 0:a8fa94490a0a 71
gokmenascioglu 0:a8fa94490a0a 72 This function returns the content of the IPSR Register.
gokmenascioglu 0:a8fa94490a0a 73
gokmenascioglu 0:a8fa94490a0a 74 \return IPSR Register value
gokmenascioglu 0:a8fa94490a0a 75 */
gokmenascioglu 0:a8fa94490a0a 76 static __INLINE uint32_t __get_IPSR(void)
gokmenascioglu 0:a8fa94490a0a 77 {
gokmenascioglu 0:a8fa94490a0a 78 register uint32_t __regIPSR __ASM("ipsr");
gokmenascioglu 0:a8fa94490a0a 79 return(__regIPSR);
gokmenascioglu 0:a8fa94490a0a 80 }
gokmenascioglu 0:a8fa94490a0a 81
gokmenascioglu 0:a8fa94490a0a 82
gokmenascioglu 0:a8fa94490a0a 83 /** \brief Get APSR Register
gokmenascioglu 0:a8fa94490a0a 84
gokmenascioglu 0:a8fa94490a0a 85 This function returns the content of the APSR Register.
gokmenascioglu 0:a8fa94490a0a 86
gokmenascioglu 0:a8fa94490a0a 87 \return APSR Register value
gokmenascioglu 0:a8fa94490a0a 88 */
gokmenascioglu 0:a8fa94490a0a 89 static __INLINE uint32_t __get_APSR(void)
gokmenascioglu 0:a8fa94490a0a 90 {
gokmenascioglu 0:a8fa94490a0a 91 register uint32_t __regAPSR __ASM("apsr");
gokmenascioglu 0:a8fa94490a0a 92 return(__regAPSR);
gokmenascioglu 0:a8fa94490a0a 93 }
gokmenascioglu 0:a8fa94490a0a 94
gokmenascioglu 0:a8fa94490a0a 95
gokmenascioglu 0:a8fa94490a0a 96 /** \brief Get xPSR Register
gokmenascioglu 0:a8fa94490a0a 97
gokmenascioglu 0:a8fa94490a0a 98 This function returns the content of the xPSR Register.
gokmenascioglu 0:a8fa94490a0a 99
gokmenascioglu 0:a8fa94490a0a 100 \return xPSR Register value
gokmenascioglu 0:a8fa94490a0a 101 */
gokmenascioglu 0:a8fa94490a0a 102 static __INLINE uint32_t __get_xPSR(void)
gokmenascioglu 0:a8fa94490a0a 103 {
gokmenascioglu 0:a8fa94490a0a 104 register uint32_t __regXPSR __ASM("xpsr");
gokmenascioglu 0:a8fa94490a0a 105 return(__regXPSR);
gokmenascioglu 0:a8fa94490a0a 106 }
gokmenascioglu 0:a8fa94490a0a 107
gokmenascioglu 0:a8fa94490a0a 108
gokmenascioglu 0:a8fa94490a0a 109 /** \brief Get Process Stack Pointer
gokmenascioglu 0:a8fa94490a0a 110
gokmenascioglu 0:a8fa94490a0a 111 This function returns the current value of the Process Stack Pointer (PSP).
gokmenascioglu 0:a8fa94490a0a 112
gokmenascioglu 0:a8fa94490a0a 113 \return PSP Register value
gokmenascioglu 0:a8fa94490a0a 114 */
gokmenascioglu 0:a8fa94490a0a 115 static __INLINE uint32_t __get_PSP(void)
gokmenascioglu 0:a8fa94490a0a 116 {
gokmenascioglu 0:a8fa94490a0a 117 register uint32_t __regProcessStackPointer __ASM("psp");
gokmenascioglu 0:a8fa94490a0a 118 return(__regProcessStackPointer);
gokmenascioglu 0:a8fa94490a0a 119 }
gokmenascioglu 0:a8fa94490a0a 120
gokmenascioglu 0:a8fa94490a0a 121
gokmenascioglu 0:a8fa94490a0a 122 /** \brief Set Process Stack Pointer
gokmenascioglu 0:a8fa94490a0a 123
gokmenascioglu 0:a8fa94490a0a 124 This function assigns the given value to the Process Stack Pointer (PSP).
gokmenascioglu 0:a8fa94490a0a 125
gokmenascioglu 0:a8fa94490a0a 126 \param [in] topOfProcStack Process Stack Pointer value to set
gokmenascioglu 0:a8fa94490a0a 127 */
gokmenascioglu 0:a8fa94490a0a 128 static __INLINE void __set_PSP(uint32_t topOfProcStack)
gokmenascioglu 0:a8fa94490a0a 129 {
gokmenascioglu 0:a8fa94490a0a 130 register uint32_t __regProcessStackPointer __ASM("psp");
gokmenascioglu 0:a8fa94490a0a 131 __regProcessStackPointer = topOfProcStack;
gokmenascioglu 0:a8fa94490a0a 132 }
gokmenascioglu 0:a8fa94490a0a 133
gokmenascioglu 0:a8fa94490a0a 134
gokmenascioglu 0:a8fa94490a0a 135 /** \brief Get Main Stack Pointer
gokmenascioglu 0:a8fa94490a0a 136
gokmenascioglu 0:a8fa94490a0a 137 This function returns the current value of the Main Stack Pointer (MSP).
gokmenascioglu 0:a8fa94490a0a 138
gokmenascioglu 0:a8fa94490a0a 139 \return MSP Register value
gokmenascioglu 0:a8fa94490a0a 140 */
gokmenascioglu 0:a8fa94490a0a 141 static __INLINE uint32_t __get_MSP(void)
gokmenascioglu 0:a8fa94490a0a 142 {
gokmenascioglu 0:a8fa94490a0a 143 register uint32_t __regMainStackPointer __ASM("msp");
gokmenascioglu 0:a8fa94490a0a 144 return(__regMainStackPointer);
gokmenascioglu 0:a8fa94490a0a 145 }
gokmenascioglu 0:a8fa94490a0a 146
gokmenascioglu 0:a8fa94490a0a 147
gokmenascioglu 0:a8fa94490a0a 148 /** \brief Set Main Stack Pointer
gokmenascioglu 0:a8fa94490a0a 149
gokmenascioglu 0:a8fa94490a0a 150 This function assigns the given value to the Main Stack Pointer (MSP).
gokmenascioglu 0:a8fa94490a0a 151
gokmenascioglu 0:a8fa94490a0a 152 \param [in] topOfMainStack Main Stack Pointer value to set
gokmenascioglu 0:a8fa94490a0a 153 */
gokmenascioglu 0:a8fa94490a0a 154 static __INLINE void __set_MSP(uint32_t topOfMainStack)
gokmenascioglu 0:a8fa94490a0a 155 {
gokmenascioglu 0:a8fa94490a0a 156 register uint32_t __regMainStackPointer __ASM("msp");
gokmenascioglu 0:a8fa94490a0a 157 __regMainStackPointer = topOfMainStack;
gokmenascioglu 0:a8fa94490a0a 158 }
gokmenascioglu 0:a8fa94490a0a 159
gokmenascioglu 0:a8fa94490a0a 160
gokmenascioglu 0:a8fa94490a0a 161 /** \brief Get Priority Mask
gokmenascioglu 0:a8fa94490a0a 162
gokmenascioglu 0:a8fa94490a0a 163 This function returns the current state of the priority mask bit from the Priority Mask Register.
gokmenascioglu 0:a8fa94490a0a 164
gokmenascioglu 0:a8fa94490a0a 165 \return Priority Mask value
gokmenascioglu 0:a8fa94490a0a 166 */
gokmenascioglu 0:a8fa94490a0a 167 static __INLINE uint32_t __get_PRIMASK(void)
gokmenascioglu 0:a8fa94490a0a 168 {
gokmenascioglu 0:a8fa94490a0a 169 register uint32_t __regPriMask __ASM("primask");
gokmenascioglu 0:a8fa94490a0a 170 return(__regPriMask);
gokmenascioglu 0:a8fa94490a0a 171 }
gokmenascioglu 0:a8fa94490a0a 172
gokmenascioglu 0:a8fa94490a0a 173
gokmenascioglu 0:a8fa94490a0a 174 /** \brief Set Priority Mask
gokmenascioglu 0:a8fa94490a0a 175
gokmenascioglu 0:a8fa94490a0a 176 This function assigns the given value to the Priority Mask Register.
gokmenascioglu 0:a8fa94490a0a 177
gokmenascioglu 0:a8fa94490a0a 178 \param [in] priMask Priority Mask
gokmenascioglu 0:a8fa94490a0a 179 */
gokmenascioglu 0:a8fa94490a0a 180 static __INLINE void __set_PRIMASK(uint32_t priMask)
gokmenascioglu 0:a8fa94490a0a 181 {
gokmenascioglu 0:a8fa94490a0a 182 register uint32_t __regPriMask __ASM("primask");
gokmenascioglu 0:a8fa94490a0a 183 __regPriMask = (priMask);
gokmenascioglu 0:a8fa94490a0a 184 }
gokmenascioglu 0:a8fa94490a0a 185
gokmenascioglu 0:a8fa94490a0a 186
gokmenascioglu 0:a8fa94490a0a 187 #if (__CORTEX_M >= 0x03)
gokmenascioglu 0:a8fa94490a0a 188
gokmenascioglu 0:a8fa94490a0a 189 /** \brief Enable FIQ
gokmenascioglu 0:a8fa94490a0a 190
gokmenascioglu 0:a8fa94490a0a 191 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
gokmenascioglu 0:a8fa94490a0a 192 Can only be executed in Privileged modes.
gokmenascioglu 0:a8fa94490a0a 193 */
gokmenascioglu 0:a8fa94490a0a 194 #define __enable_fault_irq __enable_fiq
gokmenascioglu 0:a8fa94490a0a 195
gokmenascioglu 0:a8fa94490a0a 196
gokmenascioglu 0:a8fa94490a0a 197 /** \brief Disable FIQ
gokmenascioglu 0:a8fa94490a0a 198
gokmenascioglu 0:a8fa94490a0a 199 This function disables FIQ interrupts by setting the F-bit in the CPSR.
gokmenascioglu 0:a8fa94490a0a 200 Can only be executed in Privileged modes.
gokmenascioglu 0:a8fa94490a0a 201 */
gokmenascioglu 0:a8fa94490a0a 202 #define __disable_fault_irq __disable_fiq
gokmenascioglu 0:a8fa94490a0a 203
gokmenascioglu 0:a8fa94490a0a 204
gokmenascioglu 0:a8fa94490a0a 205 /** \brief Get Base Priority
gokmenascioglu 0:a8fa94490a0a 206
gokmenascioglu 0:a8fa94490a0a 207 This function returns the current value of the Base Priority register.
gokmenascioglu 0:a8fa94490a0a 208
gokmenascioglu 0:a8fa94490a0a 209 \return Base Priority register value
gokmenascioglu 0:a8fa94490a0a 210 */
gokmenascioglu 0:a8fa94490a0a 211 static __INLINE uint32_t __get_BASEPRI(void)
gokmenascioglu 0:a8fa94490a0a 212 {
gokmenascioglu 0:a8fa94490a0a 213 register uint32_t __regBasePri __ASM("basepri");
gokmenascioglu 0:a8fa94490a0a 214 return(__regBasePri);
gokmenascioglu 0:a8fa94490a0a 215 }
gokmenascioglu 0:a8fa94490a0a 216
gokmenascioglu 0:a8fa94490a0a 217
gokmenascioglu 0:a8fa94490a0a 218 /** \brief Set Base Priority
gokmenascioglu 0:a8fa94490a0a 219
gokmenascioglu 0:a8fa94490a0a 220 This function assigns the given value to the Base Priority register.
gokmenascioglu 0:a8fa94490a0a 221
gokmenascioglu 0:a8fa94490a0a 222 \param [in] basePri Base Priority value to set
gokmenascioglu 0:a8fa94490a0a 223 */
gokmenascioglu 0:a8fa94490a0a 224 static __INLINE void __set_BASEPRI(uint32_t basePri)
gokmenascioglu 0:a8fa94490a0a 225 {
gokmenascioglu 0:a8fa94490a0a 226 register uint32_t __regBasePri __ASM("basepri");
gokmenascioglu 0:a8fa94490a0a 227 __regBasePri = (basePri & 0xff);
gokmenascioglu 0:a8fa94490a0a 228 }
gokmenascioglu 0:a8fa94490a0a 229
gokmenascioglu 0:a8fa94490a0a 230
gokmenascioglu 0:a8fa94490a0a 231 /** \brief Get Fault Mask
gokmenascioglu 0:a8fa94490a0a 232
gokmenascioglu 0:a8fa94490a0a 233 This function returns the current value of the Fault Mask register.
gokmenascioglu 0:a8fa94490a0a 234
gokmenascioglu 0:a8fa94490a0a 235 \return Fault Mask register value
gokmenascioglu 0:a8fa94490a0a 236 */
gokmenascioglu 0:a8fa94490a0a 237 static __INLINE uint32_t __get_FAULTMASK(void)
gokmenascioglu 0:a8fa94490a0a 238 {
gokmenascioglu 0:a8fa94490a0a 239 register uint32_t __regFaultMask __ASM("faultmask");
gokmenascioglu 0:a8fa94490a0a 240 return(__regFaultMask);
gokmenascioglu 0:a8fa94490a0a 241 }
gokmenascioglu 0:a8fa94490a0a 242
gokmenascioglu 0:a8fa94490a0a 243
gokmenascioglu 0:a8fa94490a0a 244 /** \brief Set Fault Mask
gokmenascioglu 0:a8fa94490a0a 245
gokmenascioglu 0:a8fa94490a0a 246 This function assigns the given value to the Fault Mask register.
gokmenascioglu 0:a8fa94490a0a 247
gokmenascioglu 0:a8fa94490a0a 248 \param [in] faultMask Fault Mask value to set
gokmenascioglu 0:a8fa94490a0a 249 */
gokmenascioglu 0:a8fa94490a0a 250 static __INLINE void __set_FAULTMASK(uint32_t faultMask)
gokmenascioglu 0:a8fa94490a0a 251 {
gokmenascioglu 0:a8fa94490a0a 252 register uint32_t __regFaultMask __ASM("faultmask");
gokmenascioglu 0:a8fa94490a0a 253 __regFaultMask = (faultMask & (uint32_t)1);
gokmenascioglu 0:a8fa94490a0a 254 }
gokmenascioglu 0:a8fa94490a0a 255
gokmenascioglu 0:a8fa94490a0a 256 #endif /* (__CORTEX_M >= 0x03) */
gokmenascioglu 0:a8fa94490a0a 257
gokmenascioglu 0:a8fa94490a0a 258
gokmenascioglu 0:a8fa94490a0a 259 #if (__CORTEX_M == 0x04)
gokmenascioglu 0:a8fa94490a0a 260
gokmenascioglu 0:a8fa94490a0a 261 /** \brief Get FPSCR
gokmenascioglu 0:a8fa94490a0a 262
gokmenascioglu 0:a8fa94490a0a 263 This function returns the current value of the Floating Point Status/Control register.
gokmenascioglu 0:a8fa94490a0a 264
gokmenascioglu 0:a8fa94490a0a 265 \return Floating Point Status/Control register value
gokmenascioglu 0:a8fa94490a0a 266 */
gokmenascioglu 0:a8fa94490a0a 267 static __INLINE uint32_t __get_FPSCR(void)
gokmenascioglu 0:a8fa94490a0a 268 {
gokmenascioglu 0:a8fa94490a0a 269 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gokmenascioglu 0:a8fa94490a0a 270 register uint32_t __regfpscr __ASM("fpscr");
gokmenascioglu 0:a8fa94490a0a 271 return(__regfpscr);
gokmenascioglu 0:a8fa94490a0a 272 #else
gokmenascioglu 0:a8fa94490a0a 273 return(0);
gokmenascioglu 0:a8fa94490a0a 274 #endif
gokmenascioglu 0:a8fa94490a0a 275 }
gokmenascioglu 0:a8fa94490a0a 276
gokmenascioglu 0:a8fa94490a0a 277
gokmenascioglu 0:a8fa94490a0a 278 /** \brief Set FPSCR
gokmenascioglu 0:a8fa94490a0a 279
gokmenascioglu 0:a8fa94490a0a 280 This function assigns the given value to the Floating Point Status/Control register.
gokmenascioglu 0:a8fa94490a0a 281
gokmenascioglu 0:a8fa94490a0a 282 \param [in] fpscr Floating Point Status/Control value to set
gokmenascioglu 0:a8fa94490a0a 283 */
gokmenascioglu 0:a8fa94490a0a 284 static __INLINE void __set_FPSCR(uint32_t fpscr)
gokmenascioglu 0:a8fa94490a0a 285 {
gokmenascioglu 0:a8fa94490a0a 286 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gokmenascioglu 0:a8fa94490a0a 287 register uint32_t __regfpscr __ASM("fpscr");
gokmenascioglu 0:a8fa94490a0a 288 __regfpscr = (fpscr);
gokmenascioglu 0:a8fa94490a0a 289 #endif
gokmenascioglu 0:a8fa94490a0a 290 }
gokmenascioglu 0:a8fa94490a0a 291
gokmenascioglu 0:a8fa94490a0a 292 #endif /* (__CORTEX_M == 0x04) */
gokmenascioglu 0:a8fa94490a0a 293
gokmenascioglu 0:a8fa94490a0a 294
gokmenascioglu 0:a8fa94490a0a 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
gokmenascioglu 0:a8fa94490a0a 296 /* IAR iccarm specific functions */
gokmenascioglu 0:a8fa94490a0a 297
gokmenascioglu 0:a8fa94490a0a 298 #include <cmsis_iar.h>
gokmenascioglu 0:a8fa94490a0a 299
gokmenascioglu 0:a8fa94490a0a 300 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
gokmenascioglu 0:a8fa94490a0a 301 /* GNU gcc specific functions */
gokmenascioglu 0:a8fa94490a0a 302
gokmenascioglu 0:a8fa94490a0a 303 /** \brief Enable IRQ Interrupts
gokmenascioglu 0:a8fa94490a0a 304
gokmenascioglu 0:a8fa94490a0a 305 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
gokmenascioglu 0:a8fa94490a0a 306 Can only be executed in Privileged modes.
gokmenascioglu 0:a8fa94490a0a 307 */
gokmenascioglu 0:a8fa94490a0a 308 __attribute__( ( always_inline ) ) static __INLINE void __enable_irq(void)
gokmenascioglu 0:a8fa94490a0a 309 {
gokmenascioglu 0:a8fa94490a0a 310 __ASM volatile ("cpsie i");
gokmenascioglu 0:a8fa94490a0a 311 }
gokmenascioglu 0:a8fa94490a0a 312
gokmenascioglu 0:a8fa94490a0a 313
gokmenascioglu 0:a8fa94490a0a 314 /** \brief Disable IRQ Interrupts
gokmenascioglu 0:a8fa94490a0a 315
gokmenascioglu 0:a8fa94490a0a 316 This function disables IRQ interrupts by setting the I-bit in the CPSR.
gokmenascioglu 0:a8fa94490a0a 317 Can only be executed in Privileged modes.
gokmenascioglu 0:a8fa94490a0a 318 */
gokmenascioglu 0:a8fa94490a0a 319 __attribute__( ( always_inline ) ) static __INLINE void __disable_irq(void)
gokmenascioglu 0:a8fa94490a0a 320 {
gokmenascioglu 0:a8fa94490a0a 321 __ASM volatile ("cpsid i");
gokmenascioglu 0:a8fa94490a0a 322 }
gokmenascioglu 0:a8fa94490a0a 323
gokmenascioglu 0:a8fa94490a0a 324
gokmenascioglu 0:a8fa94490a0a 325 /** \brief Get Control Register
gokmenascioglu 0:a8fa94490a0a 326
gokmenascioglu 0:a8fa94490a0a 327 This function returns the content of the Control Register.
gokmenascioglu 0:a8fa94490a0a 328
gokmenascioglu 0:a8fa94490a0a 329 \return Control Register value
gokmenascioglu 0:a8fa94490a0a 330 */
gokmenascioglu 0:a8fa94490a0a 331 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_CONTROL(void)
gokmenascioglu 0:a8fa94490a0a 332 {
gokmenascioglu 0:a8fa94490a0a 333 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 334
gokmenascioglu 0:a8fa94490a0a 335 __ASM volatile ("MRS %0, control" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 336 return(result);
gokmenascioglu 0:a8fa94490a0a 337 }
gokmenascioglu 0:a8fa94490a0a 338
gokmenascioglu 0:a8fa94490a0a 339
gokmenascioglu 0:a8fa94490a0a 340 /** \brief Set Control Register
gokmenascioglu 0:a8fa94490a0a 341
gokmenascioglu 0:a8fa94490a0a 342 This function writes the given value to the Control Register.
gokmenascioglu 0:a8fa94490a0a 343
gokmenascioglu 0:a8fa94490a0a 344 \param [in] control Control Register value to set
gokmenascioglu 0:a8fa94490a0a 345 */
gokmenascioglu 0:a8fa94490a0a 346 __attribute__( ( always_inline ) ) static __INLINE void __set_CONTROL(uint32_t control)
gokmenascioglu 0:a8fa94490a0a 347 {
gokmenascioglu 0:a8fa94490a0a 348 __ASM volatile ("MSR control, %0" : : "r" (control) );
gokmenascioglu 0:a8fa94490a0a 349 }
gokmenascioglu 0:a8fa94490a0a 350
gokmenascioglu 0:a8fa94490a0a 351
gokmenascioglu 0:a8fa94490a0a 352 /** \brief Get IPSR Register
gokmenascioglu 0:a8fa94490a0a 353
gokmenascioglu 0:a8fa94490a0a 354 This function returns the content of the IPSR Register.
gokmenascioglu 0:a8fa94490a0a 355
gokmenascioglu 0:a8fa94490a0a 356 \return IPSR Register value
gokmenascioglu 0:a8fa94490a0a 357 */
gokmenascioglu 0:a8fa94490a0a 358 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_IPSR(void)
gokmenascioglu 0:a8fa94490a0a 359 {
gokmenascioglu 0:a8fa94490a0a 360 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 361
gokmenascioglu 0:a8fa94490a0a 362 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 363 return(result);
gokmenascioglu 0:a8fa94490a0a 364 }
gokmenascioglu 0:a8fa94490a0a 365
gokmenascioglu 0:a8fa94490a0a 366
gokmenascioglu 0:a8fa94490a0a 367 /** \brief Get APSR Register
gokmenascioglu 0:a8fa94490a0a 368
gokmenascioglu 0:a8fa94490a0a 369 This function returns the content of the APSR Register.
gokmenascioglu 0:a8fa94490a0a 370
gokmenascioglu 0:a8fa94490a0a 371 \return APSR Register value
gokmenascioglu 0:a8fa94490a0a 372 */
gokmenascioglu 0:a8fa94490a0a 373 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_APSR(void)
gokmenascioglu 0:a8fa94490a0a 374 {
gokmenascioglu 0:a8fa94490a0a 375 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 376
gokmenascioglu 0:a8fa94490a0a 377 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 378 return(result);
gokmenascioglu 0:a8fa94490a0a 379 }
gokmenascioglu 0:a8fa94490a0a 380
gokmenascioglu 0:a8fa94490a0a 381
gokmenascioglu 0:a8fa94490a0a 382 /** \brief Get xPSR Register
gokmenascioglu 0:a8fa94490a0a 383
gokmenascioglu 0:a8fa94490a0a 384 This function returns the content of the xPSR Register.
gokmenascioglu 0:a8fa94490a0a 385
gokmenascioglu 0:a8fa94490a0a 386 \return xPSR Register value
gokmenascioglu 0:a8fa94490a0a 387 */
gokmenascioglu 0:a8fa94490a0a 388 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_xPSR(void)
gokmenascioglu 0:a8fa94490a0a 389 {
gokmenascioglu 0:a8fa94490a0a 390 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 391
gokmenascioglu 0:a8fa94490a0a 392 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 393 return(result);
gokmenascioglu 0:a8fa94490a0a 394 }
gokmenascioglu 0:a8fa94490a0a 395
gokmenascioglu 0:a8fa94490a0a 396
gokmenascioglu 0:a8fa94490a0a 397 /** \brief Get Process Stack Pointer
gokmenascioglu 0:a8fa94490a0a 398
gokmenascioglu 0:a8fa94490a0a 399 This function returns the current value of the Process Stack Pointer (PSP).
gokmenascioglu 0:a8fa94490a0a 400
gokmenascioglu 0:a8fa94490a0a 401 \return PSP Register value
gokmenascioglu 0:a8fa94490a0a 402 */
gokmenascioglu 0:a8fa94490a0a 403 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PSP(void)
gokmenascioglu 0:a8fa94490a0a 404 {
gokmenascioglu 0:a8fa94490a0a 405 register uint32_t result;
gokmenascioglu 0:a8fa94490a0a 406
gokmenascioglu 0:a8fa94490a0a 407 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 408 return(result);
gokmenascioglu 0:a8fa94490a0a 409 }
gokmenascioglu 0:a8fa94490a0a 410
gokmenascioglu 0:a8fa94490a0a 411
gokmenascioglu 0:a8fa94490a0a 412 /** \brief Set Process Stack Pointer
gokmenascioglu 0:a8fa94490a0a 413
gokmenascioglu 0:a8fa94490a0a 414 This function assigns the given value to the Process Stack Pointer (PSP).
gokmenascioglu 0:a8fa94490a0a 415
gokmenascioglu 0:a8fa94490a0a 416 \param [in] topOfProcStack Process Stack Pointer value to set
gokmenascioglu 0:a8fa94490a0a 417 */
gokmenascioglu 0:a8fa94490a0a 418 __attribute__( ( always_inline ) ) static __INLINE void __set_PSP(uint32_t topOfProcStack)
gokmenascioglu 0:a8fa94490a0a 419 {
gokmenascioglu 0:a8fa94490a0a 420 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
gokmenascioglu 0:a8fa94490a0a 421 }
gokmenascioglu 0:a8fa94490a0a 422
gokmenascioglu 0:a8fa94490a0a 423
gokmenascioglu 0:a8fa94490a0a 424 /** \brief Get Main Stack Pointer
gokmenascioglu 0:a8fa94490a0a 425
gokmenascioglu 0:a8fa94490a0a 426 This function returns the current value of the Main Stack Pointer (MSP).
gokmenascioglu 0:a8fa94490a0a 427
gokmenascioglu 0:a8fa94490a0a 428 \return MSP Register value
gokmenascioglu 0:a8fa94490a0a 429 */
gokmenascioglu 0:a8fa94490a0a 430 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_MSP(void)
gokmenascioglu 0:a8fa94490a0a 431 {
gokmenascioglu 0:a8fa94490a0a 432 register uint32_t result;
gokmenascioglu 0:a8fa94490a0a 433
gokmenascioglu 0:a8fa94490a0a 434 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 435 return(result);
gokmenascioglu 0:a8fa94490a0a 436 }
gokmenascioglu 0:a8fa94490a0a 437
gokmenascioglu 0:a8fa94490a0a 438
gokmenascioglu 0:a8fa94490a0a 439 /** \brief Set Main Stack Pointer
gokmenascioglu 0:a8fa94490a0a 440
gokmenascioglu 0:a8fa94490a0a 441 This function assigns the given value to the Main Stack Pointer (MSP).
gokmenascioglu 0:a8fa94490a0a 442
gokmenascioglu 0:a8fa94490a0a 443 \param [in] topOfMainStack Main Stack Pointer value to set
gokmenascioglu 0:a8fa94490a0a 444 */
gokmenascioglu 0:a8fa94490a0a 445 __attribute__( ( always_inline ) ) static __INLINE void __set_MSP(uint32_t topOfMainStack)
gokmenascioglu 0:a8fa94490a0a 446 {
gokmenascioglu 0:a8fa94490a0a 447 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
gokmenascioglu 0:a8fa94490a0a 448 }
gokmenascioglu 0:a8fa94490a0a 449
gokmenascioglu 0:a8fa94490a0a 450
gokmenascioglu 0:a8fa94490a0a 451 /** \brief Get Priority Mask
gokmenascioglu 0:a8fa94490a0a 452
gokmenascioglu 0:a8fa94490a0a 453 This function returns the current state of the priority mask bit from the Priority Mask Register.
gokmenascioglu 0:a8fa94490a0a 454
gokmenascioglu 0:a8fa94490a0a 455 \return Priority Mask value
gokmenascioglu 0:a8fa94490a0a 456 */
gokmenascioglu 0:a8fa94490a0a 457 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_PRIMASK(void)
gokmenascioglu 0:a8fa94490a0a 458 {
gokmenascioglu 0:a8fa94490a0a 459 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 460
gokmenascioglu 0:a8fa94490a0a 461 __ASM volatile ("MRS %0, primask" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 462 return(result);
gokmenascioglu 0:a8fa94490a0a 463 }
gokmenascioglu 0:a8fa94490a0a 464
gokmenascioglu 0:a8fa94490a0a 465
gokmenascioglu 0:a8fa94490a0a 466 /** \brief Set Priority Mask
gokmenascioglu 0:a8fa94490a0a 467
gokmenascioglu 0:a8fa94490a0a 468 This function assigns the given value to the Priority Mask Register.
gokmenascioglu 0:a8fa94490a0a 469
gokmenascioglu 0:a8fa94490a0a 470 \param [in] priMask Priority Mask
gokmenascioglu 0:a8fa94490a0a 471 */
gokmenascioglu 0:a8fa94490a0a 472 __attribute__( ( always_inline ) ) static __INLINE void __set_PRIMASK(uint32_t priMask)
gokmenascioglu 0:a8fa94490a0a 473 {
gokmenascioglu 0:a8fa94490a0a 474 __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
gokmenascioglu 0:a8fa94490a0a 475 }
gokmenascioglu 0:a8fa94490a0a 476
gokmenascioglu 0:a8fa94490a0a 477
gokmenascioglu 0:a8fa94490a0a 478 #if (__CORTEX_M >= 0x03)
gokmenascioglu 0:a8fa94490a0a 479
gokmenascioglu 0:a8fa94490a0a 480 /** \brief Enable FIQ
gokmenascioglu 0:a8fa94490a0a 481
gokmenascioglu 0:a8fa94490a0a 482 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
gokmenascioglu 0:a8fa94490a0a 483 Can only be executed in Privileged modes.
gokmenascioglu 0:a8fa94490a0a 484 */
gokmenascioglu 0:a8fa94490a0a 485 __attribute__( ( always_inline ) ) static __INLINE void __enable_fault_irq(void)
gokmenascioglu 0:a8fa94490a0a 486 {
gokmenascioglu 0:a8fa94490a0a 487 __ASM volatile ("cpsie f");
gokmenascioglu 0:a8fa94490a0a 488 }
gokmenascioglu 0:a8fa94490a0a 489
gokmenascioglu 0:a8fa94490a0a 490
gokmenascioglu 0:a8fa94490a0a 491 /** \brief Disable FIQ
gokmenascioglu 0:a8fa94490a0a 492
gokmenascioglu 0:a8fa94490a0a 493 This function disables FIQ interrupts by setting the F-bit in the CPSR.
gokmenascioglu 0:a8fa94490a0a 494 Can only be executed in Privileged modes.
gokmenascioglu 0:a8fa94490a0a 495 */
gokmenascioglu 0:a8fa94490a0a 496 __attribute__( ( always_inline ) ) static __INLINE void __disable_fault_irq(void)
gokmenascioglu 0:a8fa94490a0a 497 {
gokmenascioglu 0:a8fa94490a0a 498 __ASM volatile ("cpsid f");
gokmenascioglu 0:a8fa94490a0a 499 }
gokmenascioglu 0:a8fa94490a0a 500
gokmenascioglu 0:a8fa94490a0a 501
gokmenascioglu 0:a8fa94490a0a 502 /** \brief Get Base Priority
gokmenascioglu 0:a8fa94490a0a 503
gokmenascioglu 0:a8fa94490a0a 504 This function returns the current value of the Base Priority register.
gokmenascioglu 0:a8fa94490a0a 505
gokmenascioglu 0:a8fa94490a0a 506 \return Base Priority register value
gokmenascioglu 0:a8fa94490a0a 507 */
gokmenascioglu 0:a8fa94490a0a 508 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_BASEPRI(void)
gokmenascioglu 0:a8fa94490a0a 509 {
gokmenascioglu 0:a8fa94490a0a 510 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 511
gokmenascioglu 0:a8fa94490a0a 512 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 513 return(result);
gokmenascioglu 0:a8fa94490a0a 514 }
gokmenascioglu 0:a8fa94490a0a 515
gokmenascioglu 0:a8fa94490a0a 516
gokmenascioglu 0:a8fa94490a0a 517 /** \brief Set Base Priority
gokmenascioglu 0:a8fa94490a0a 518
gokmenascioglu 0:a8fa94490a0a 519 This function assigns the given value to the Base Priority register.
gokmenascioglu 0:a8fa94490a0a 520
gokmenascioglu 0:a8fa94490a0a 521 \param [in] basePri Base Priority value to set
gokmenascioglu 0:a8fa94490a0a 522 */
gokmenascioglu 0:a8fa94490a0a 523 __attribute__( ( always_inline ) ) static __INLINE void __set_BASEPRI(uint32_t value)
gokmenascioglu 0:a8fa94490a0a 524 {
gokmenascioglu 0:a8fa94490a0a 525 __ASM volatile ("MSR basepri, %0" : : "r" (value) );
gokmenascioglu 0:a8fa94490a0a 526 }
gokmenascioglu 0:a8fa94490a0a 527
gokmenascioglu 0:a8fa94490a0a 528
gokmenascioglu 0:a8fa94490a0a 529 /** \brief Get Fault Mask
gokmenascioglu 0:a8fa94490a0a 530
gokmenascioglu 0:a8fa94490a0a 531 This function returns the current value of the Fault Mask register.
gokmenascioglu 0:a8fa94490a0a 532
gokmenascioglu 0:a8fa94490a0a 533 \return Fault Mask register value
gokmenascioglu 0:a8fa94490a0a 534 */
gokmenascioglu 0:a8fa94490a0a 535 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FAULTMASK(void)
gokmenascioglu 0:a8fa94490a0a 536 {
gokmenascioglu 0:a8fa94490a0a 537 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 538
gokmenascioglu 0:a8fa94490a0a 539 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 540 return(result);
gokmenascioglu 0:a8fa94490a0a 541 }
gokmenascioglu 0:a8fa94490a0a 542
gokmenascioglu 0:a8fa94490a0a 543
gokmenascioglu 0:a8fa94490a0a 544 /** \brief Set Fault Mask
gokmenascioglu 0:a8fa94490a0a 545
gokmenascioglu 0:a8fa94490a0a 546 This function assigns the given value to the Fault Mask register.
gokmenascioglu 0:a8fa94490a0a 547
gokmenascioglu 0:a8fa94490a0a 548 \param [in] faultMask Fault Mask value to set
gokmenascioglu 0:a8fa94490a0a 549 */
gokmenascioglu 0:a8fa94490a0a 550 __attribute__( ( always_inline ) ) static __INLINE void __set_FAULTMASK(uint32_t faultMask)
gokmenascioglu 0:a8fa94490a0a 551 {
gokmenascioglu 0:a8fa94490a0a 552 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
gokmenascioglu 0:a8fa94490a0a 553 }
gokmenascioglu 0:a8fa94490a0a 554
gokmenascioglu 0:a8fa94490a0a 555 #endif /* (__CORTEX_M >= 0x03) */
gokmenascioglu 0:a8fa94490a0a 556
gokmenascioglu 0:a8fa94490a0a 557
gokmenascioglu 0:a8fa94490a0a 558 #if (__CORTEX_M == 0x04)
gokmenascioglu 0:a8fa94490a0a 559
gokmenascioglu 0:a8fa94490a0a 560 /** \brief Get FPSCR
gokmenascioglu 0:a8fa94490a0a 561
gokmenascioglu 0:a8fa94490a0a 562 This function returns the current value of the Floating Point Status/Control register.
gokmenascioglu 0:a8fa94490a0a 563
gokmenascioglu 0:a8fa94490a0a 564 \return Floating Point Status/Control register value
gokmenascioglu 0:a8fa94490a0a 565 */
gokmenascioglu 0:a8fa94490a0a 566 __attribute__( ( always_inline ) ) static __INLINE uint32_t __get_FPSCR(void)
gokmenascioglu 0:a8fa94490a0a 567 {
gokmenascioglu 0:a8fa94490a0a 568 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gokmenascioglu 0:a8fa94490a0a 569 uint32_t result;
gokmenascioglu 0:a8fa94490a0a 570
gokmenascioglu 0:a8fa94490a0a 571 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
gokmenascioglu 0:a8fa94490a0a 572 return(result);
gokmenascioglu 0:a8fa94490a0a 573 #else
gokmenascioglu 0:a8fa94490a0a 574 return(0);
gokmenascioglu 0:a8fa94490a0a 575 #endif
gokmenascioglu 0:a8fa94490a0a 576 }
gokmenascioglu 0:a8fa94490a0a 577
gokmenascioglu 0:a8fa94490a0a 578
gokmenascioglu 0:a8fa94490a0a 579 /** \brief Set FPSCR
gokmenascioglu 0:a8fa94490a0a 580
gokmenascioglu 0:a8fa94490a0a 581 This function assigns the given value to the Floating Point Status/Control register.
gokmenascioglu 0:a8fa94490a0a 582
gokmenascioglu 0:a8fa94490a0a 583 \param [in] fpscr Floating Point Status/Control value to set
gokmenascioglu 0:a8fa94490a0a 584 */
gokmenascioglu 0:a8fa94490a0a 585 __attribute__( ( always_inline ) ) static __INLINE void __set_FPSCR(uint32_t fpscr)
gokmenascioglu 0:a8fa94490a0a 586 {
gokmenascioglu 0:a8fa94490a0a 587 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
gokmenascioglu 0:a8fa94490a0a 588 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
gokmenascioglu 0:a8fa94490a0a 589 #endif
gokmenascioglu 0:a8fa94490a0a 590 }
gokmenascioglu 0:a8fa94490a0a 591
gokmenascioglu 0:a8fa94490a0a 592 #endif /* (__CORTEX_M == 0x04) */
gokmenascioglu 0:a8fa94490a0a 593
gokmenascioglu 0:a8fa94490a0a 594
gokmenascioglu 0:a8fa94490a0a 595 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
gokmenascioglu 0:a8fa94490a0a 596 /* TASKING carm specific functions */
gokmenascioglu 0:a8fa94490a0a 597
gokmenascioglu 0:a8fa94490a0a 598 /*
gokmenascioglu 0:a8fa94490a0a 599 * The CMSIS functions have been implemented as intrinsics in the compiler.
gokmenascioglu 0:a8fa94490a0a 600 * Please use "carm -?i" to get an up to date list of all instrinsics,
gokmenascioglu 0:a8fa94490a0a 601 * Including the CMSIS ones.
gokmenascioglu 0:a8fa94490a0a 602 */
gokmenascioglu 0:a8fa94490a0a 603
gokmenascioglu 0:a8fa94490a0a 604 #endif
gokmenascioglu 0:a8fa94490a0a 605
gokmenascioglu 0:a8fa94490a0a 606 /*@} end of CMSIS_Core_RegAccFunctions */
gokmenascioglu 0:a8fa94490a0a 607
gokmenascioglu 0:a8fa94490a0a 608
gokmenascioglu 0:a8fa94490a0a 609 #endif /* __CORE_CMFUNC_H */