Release 1.01
mcp23s08.h@0:b6d729ae4f27, 2019-07-25 (annotated)
- Committer:
- foxbrianr
- Date:
- Thu Jul 25 00:43:08 2019 +0000
- Revision:
- 0:b6d729ae4f27
- Child:
- 2:1d5204d29bc5
Baseline for testing
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
foxbrianr | 0:b6d729ae4f27 | 1 | /* |
foxbrianr | 0:b6d729ae4f27 | 2 | ___ _ _ _ __ ___ ___ | |_ ___ _ _ |
foxbrianr | 0:b6d729ae4f27 | 3 | / __|| | | || '_ ` _ \ / _ \ | __|/ _ \ | | | | |
foxbrianr | 0:b6d729ae4f27 | 4 | \__ \| |_| || | | | | || (_) || |_| (_) || |_| | |
foxbrianr | 0:b6d729ae4f27 | 5 | |___/ \__,_||_| |_| |_| \___/ \__|\___/ \__, | |
foxbrianr | 0:b6d729ae4f27 | 6 | |___/ |
foxbrianr | 0:b6d729ae4f27 | 7 | |
foxbrianr | 0:b6d729ae4f27 | 8 | gpio_expander - An attemp to create a fast and universal library for drive many GPIO chips |
foxbrianr | 0:b6d729ae4f27 | 9 | |
foxbrianr | 0:b6d729ae4f27 | 10 | model: company: pins: protocol: Special Features: |
foxbrianr | 0:b6d729ae4f27 | 11 | --------------------------------------------------------------------------------------------------------------------- |
foxbrianr | 0:b6d729ae4f27 | 12 | mcp23s08 Microchip 8 SPI INT/HAEN |
foxbrianr | 0:b6d729ae4f27 | 13 | --------------------------------------------------------------------------------------------------------------------- |
foxbrianr | 0:b6d729ae4f27 | 14 | Version history: |
foxbrianr | 0:b6d729ae4f27 | 15 | 0.5b1: first release, just coded and never tested |
foxbrianr | 0:b6d729ae4f27 | 16 | 0.5b2: fixed 2wire version, added portPullup, tested output mode (ok) |
foxbrianr | 0:b6d729ae4f27 | 17 | 0.5b3: added some drivers |
foxbrianr | 0:b6d729ae4f27 | 18 | 0.5b4: ability to include library inside other libraries. |
foxbrianr | 0:b6d729ae4f27 | 19 | 0.5b7: Changed functionalities of some function. |
foxbrianr | 0:b6d729ae4f27 | 20 | 0.6b1: Changed gpioRegisterRead to gpioRegisterReadByte. Added gpioRegisterReadWord (for some GPIO) |
foxbrianr | 0:b6d729ae4f27 | 21 | 0.6b3: Added basic support for SPI transactions, small optimizations. |
foxbrianr | 0:b6d729ae4f27 | 22 | 0.8b3: Added 2 more commands and 2 gpio chip. |
foxbrianr | 0:b6d729ae4f27 | 23 | 0.8b4: Support for SPI Transaction post setup |
foxbrianr | 0:b6d729ae4f27 | 24 | --------------------------------------------------------------------------------------------------------------------- |
foxbrianr | 0:b6d729ae4f27 | 25 | Copyright (c) 2013-2014, s.u.m.o.t.o.y [sumotoy(at)gmail.com] |
foxbrianr | 0:b6d729ae4f27 | 26 | --------------------------------------------------------------------------------------------------------------------- |
foxbrianr | 0:b6d729ae4f27 | 27 | gpio_expander Library is free software: you can redistribute it and/or modify |
foxbrianr | 0:b6d729ae4f27 | 28 | it under the terms of the GNU General Public License as published by |
foxbrianr | 0:b6d729ae4f27 | 29 | the Free Software Foundation, either version 3 of the License, or |
foxbrianr | 0:b6d729ae4f27 | 30 | (at your option) any later version. |
foxbrianr | 0:b6d729ae4f27 | 31 | gpio_expander Library is distributed in the hope that it will be useful, |
foxbrianr | 0:b6d729ae4f27 | 32 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
foxbrianr | 0:b6d729ae4f27 | 33 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
foxbrianr | 0:b6d729ae4f27 | 34 | GNU General Public License for more details. |
foxbrianr | 0:b6d729ae4f27 | 35 | You should have received a copy of the GNU General Public License |
foxbrianr | 0:b6d729ae4f27 | 36 | along with Foobar. If not, see <http://www.gnu.org/licenses/>. |
foxbrianr | 0:b6d729ae4f27 | 37 | |
foxbrianr | 0:b6d729ae4f27 | 38 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
foxbrianr | 0:b6d729ae4f27 | 39 | Version:0.8b3: Added 2 more commands and 2 gpio chip. |
foxbrianr | 0:b6d729ae4f27 | 40 | +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ |
foxbrianr | 0:b6d729ae4f27 | 41 | */ |
foxbrianr | 0:b6d729ae4f27 | 42 | |
foxbrianr | 0:b6d729ae4f27 | 43 | /* ------------------------------ MCP23S08 WIRING ------------------------------------ |
foxbrianr | 0:b6d729ae4f27 | 44 | This chip has a very useful feature called HAEN that allow you to share the same CS pin trough |
foxbrianr | 0:b6d729ae4f27 | 45 | 4 different addresses. Of course chip has to be Microchip and should be assigned to different addresses! |
foxbrianr | 0:b6d729ae4f27 | 46 | Basic Address: 001000 A1 A0 (from 0x20 to 0x23) |
foxbrianr | 0:b6d729ae4f27 | 47 | A1,A0 tied to ground = 0x20 |
foxbrianr | 0:b6d729ae4f27 | 48 | __ __ |
foxbrianr | 0:b6d729ae4f27 | 49 | -> sck [| U |] ++++ |
foxbrianr | 0:b6d729ae4f27 | 50 | -> mosi [| |] IO-7 |
foxbrianr | 0:b6d729ae4f27 | 51 | <- miso [| |] IO-6 |
foxbrianr | 0:b6d729ae4f27 | 52 | A1 [| |] IO-5 |
foxbrianr | 0:b6d729ae4f27 | 53 | A0 [| |] IO-4 |
foxbrianr | 0:b6d729ae4f27 | 54 | rst (con.+) [| |] IO-3 |
foxbrianr | 0:b6d729ae4f27 | 55 | cs [| |] IO-2 |
foxbrianr | 0:b6d729ae4f27 | 56 | int [| |] IO-1 |
foxbrianr | 0:b6d729ae4f27 | 57 | GND [|_____|] IO-0 |
foxbrianr | 0:b6d729ae4f27 | 58 | */ |
foxbrianr | 0:b6d729ae4f27 | 59 | #ifndef _MCP23S08_H_ |
foxbrianr | 0:b6d729ae4f27 | 60 | #define _MCP23S08_H_ |
foxbrianr | 0:b6d729ae4f27 | 61 | |
foxbrianr | 0:b6d729ae4f27 | 62 | #include <inttypes.h> |
foxbrianr | 0:b6d729ae4f27 | 63 | |
foxbrianr | 0:b6d729ae4f27 | 64 | class mcp23s08 : public SPI |
foxbrianr | 0:b6d729ae4f27 | 65 | { |
foxbrianr | 0:b6d729ae4f27 | 66 | |
foxbrianr | 0:b6d729ae4f27 | 67 | public: |
foxbrianr | 0:b6d729ae4f27 | 68 | mcp23s08(PinName mosi, PinName miso, PinName clk, PinName cs_pin,const uint8_t haenAdrs); |
foxbrianr | 0:b6d729ae4f27 | 69 | void postSetup(const uint8_t haenAdrs);//used with other libraries only |
foxbrianr | 0:b6d729ae4f27 | 70 | virtual void begin(bool protocolInitOverride=false); //protocolInitOverride=true will not init the SPI |
foxbrianr | 0:b6d729ae4f27 | 71 | |
foxbrianr | 0:b6d729ae4f27 | 72 | |
foxbrianr | 0:b6d729ae4f27 | 73 | void gpioPinMode(uint8_t mode); //set all pins to INPUT or OUTPUT |
foxbrianr | 0:b6d729ae4f27 | 74 | void gpioPinMode(uint8_t pin, bool mode); //set a unique pin as IN(1) or OUT (0) |
foxbrianr | 0:b6d729ae4f27 | 75 | void gpioPort(uint8_t value); //write data to all pins |
foxbrianr | 0:b6d729ae4f27 | 76 | //void gpioPort(uint8_t lowByte, uint8_t highByte); //same as abowe but uses 2 separate bytes (not applicable to this chip) |
foxbrianr | 0:b6d729ae4f27 | 77 | uint8_t readGpioPort(); //read the state of the pins (all) |
foxbrianr | 0:b6d729ae4f27 | 78 | uint8_t readGpioPortFast(); |
foxbrianr | 0:b6d729ae4f27 | 79 | |
foxbrianr | 0:b6d729ae4f27 | 80 | void gpioDigitalWrite(uint8_t pin, bool value); //write data to one pin |
foxbrianr | 0:b6d729ae4f27 | 81 | void gpioDigitalWriteFast(uint8_t pin, bool value); |
foxbrianr | 0:b6d729ae4f27 | 82 | int gpioDigitalRead(uint8_t pin); //read data from one pin |
foxbrianr | 0:b6d729ae4f27 | 83 | uint8_t gpioRegisterReadByte(uint8_t reg); //read a uint8_t from chip register |
foxbrianr | 0:b6d729ae4f27 | 84 | int gpioDigitalReadFast(uint8_t pin); |
foxbrianr | 0:b6d729ae4f27 | 85 | void gpioRegisterWriteByte(uint8_t reg,uint8_t data); //write a chip register |
foxbrianr | 0:b6d729ae4f27 | 86 | void portPullup(uint8_t data); // true=pullup, false=pulldown all pins |
foxbrianr | 0:b6d729ae4f27 | 87 | void gpioPortUpdate(); |
foxbrianr | 0:b6d729ae4f27 | 88 | // direct access commands |
foxbrianr | 0:b6d729ae4f27 | 89 | uint8_t readAddress(uint8_t addr); |
foxbrianr | 0:b6d729ae4f27 | 90 | |
foxbrianr | 0:b6d729ae4f27 | 91 | void setSPIspeed(uint32_t spispeed);//for SPI transactions |
foxbrianr | 0:b6d729ae4f27 | 92 | |
foxbrianr | 0:b6d729ae4f27 | 93 | //------------------------- REGISTERS |
foxbrianr | 0:b6d729ae4f27 | 94 | uint8_t IOCON; |
foxbrianr | 0:b6d729ae4f27 | 95 | uint8_t IODIR; |
foxbrianr | 0:b6d729ae4f27 | 96 | uint8_t GPPU; |
foxbrianr | 0:b6d729ae4f27 | 97 | uint8_t GPIO; |
foxbrianr | 0:b6d729ae4f27 | 98 | uint8_t GPINTEN; |
foxbrianr | 0:b6d729ae4f27 | 99 | uint8_t IPOL; |
foxbrianr | 0:b6d729ae4f27 | 100 | uint8_t DEFVAL; |
foxbrianr | 0:b6d729ae4f27 | 101 | uint8_t INTF; |
foxbrianr | 0:b6d729ae4f27 | 102 | uint8_t INTCAP; |
foxbrianr | 0:b6d729ae4f27 | 103 | uint8_t OLAT; |
foxbrianr | 0:b6d729ae4f27 | 104 | uint8_t INTCON; |
foxbrianr | 0:b6d729ae4f27 | 105 | |
foxbrianr | 0:b6d729ae4f27 | 106 | private: |
foxbrianr | 0:b6d729ae4f27 | 107 | DigitalOut cs; |
foxbrianr | 0:b6d729ae4f27 | 108 | |
foxbrianr | 0:b6d729ae4f27 | 109 | uint8_t _cs; |
foxbrianr | 0:b6d729ae4f27 | 110 | uint8_t _adrs; |
foxbrianr | 0:b6d729ae4f27 | 111 | |
foxbrianr | 0:b6d729ae4f27 | 112 | uint32_t _spiTransactionsSpeed;//for SPI transactions |
foxbrianr | 0:b6d729ae4f27 | 113 | |
foxbrianr | 0:b6d729ae4f27 | 114 | uint8_t _useHaen; |
foxbrianr | 0:b6d729ae4f27 | 115 | uint8_t _readCmd; |
foxbrianr | 0:b6d729ae4f27 | 116 | uint8_t _writeCmd; |
foxbrianr | 0:b6d729ae4f27 | 117 | void startSend(bool mode); |
foxbrianr | 0:b6d729ae4f27 | 118 | void endSend(); |
foxbrianr | 0:b6d729ae4f27 | 119 | uint8_t _gpioDirection; |
foxbrianr | 0:b6d729ae4f27 | 120 | uint8_t _gpioState; |
foxbrianr | 0:b6d729ae4f27 | 121 | void writeByte(uint8_t addr, uint8_t data); |
foxbrianr | 0:b6d729ae4f27 | 122 | }; |
foxbrianr | 0:b6d729ae4f27 | 123 | #endif |