Dependencies: X_NUCLEO_COMMON
Fork of X_NUCLEO_IKS01A1-f2df by
X_NUCLEO_IKS01A1-f255a2c75ecb/Components/hts221/hts221.h@1:7f97780b8ad4, 2017-02-09 (annotated)
- Committer:
- Salvatore94
- Date:
- Thu Feb 09 16:40:33 2017 +0000
- Revision:
- 1:7f97780b8ad4
- Parent:
- 0:5a49275457c6
Per peppe;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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antseggs | 0:5a49275457c6 | 1 | /** |
antseggs | 0:5a49275457c6 | 2 | ****************************************************************************** |
antseggs | 0:5a49275457c6 | 3 | * @file hts221.h |
antseggs | 0:5a49275457c6 | 4 | * @author MEMS Application Team |
antseggs | 0:5a49275457c6 | 5 | * @version V1.2.0 |
antseggs | 0:5a49275457c6 | 6 | * @date 11-February-2015 |
antseggs | 0:5a49275457c6 | 7 | * @brief This file contains definitions for the hts221.c |
antseggs | 0:5a49275457c6 | 8 | * firmware driver. |
antseggs | 0:5a49275457c6 | 9 | ****************************************************************************** |
antseggs | 0:5a49275457c6 | 10 | * @attention |
antseggs | 0:5a49275457c6 | 11 | * |
antseggs | 0:5a49275457c6 | 12 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
antseggs | 0:5a49275457c6 | 13 | * |
antseggs | 0:5a49275457c6 | 14 | * Redistribution and use in source and binary forms, with or without modification, |
antseggs | 0:5a49275457c6 | 15 | * are permitted provided that the following conditions are met: |
antseggs | 0:5a49275457c6 | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
antseggs | 0:5a49275457c6 | 17 | * this list of conditions and the following disclaimer. |
antseggs | 0:5a49275457c6 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
antseggs | 0:5a49275457c6 | 19 | * this list of conditions and the following disclaimer in the documentation |
antseggs | 0:5a49275457c6 | 20 | * and/or other materials provided with the distribution. |
antseggs | 0:5a49275457c6 | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
antseggs | 0:5a49275457c6 | 22 | * may be used to endorse or promote products derived from this software |
antseggs | 0:5a49275457c6 | 23 | * without specific prior written permission. |
antseggs | 0:5a49275457c6 | 24 | * |
antseggs | 0:5a49275457c6 | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
antseggs | 0:5a49275457c6 | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
antseggs | 0:5a49275457c6 | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
antseggs | 0:5a49275457c6 | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
antseggs | 0:5a49275457c6 | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
antseggs | 0:5a49275457c6 | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
antseggs | 0:5a49275457c6 | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
antseggs | 0:5a49275457c6 | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
antseggs | 0:5a49275457c6 | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
antseggs | 0:5a49275457c6 | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
antseggs | 0:5a49275457c6 | 35 | * |
antseggs | 0:5a49275457c6 | 36 | ****************************************************************************** |
antseggs | 0:5a49275457c6 | 37 | */ |
antseggs | 0:5a49275457c6 | 38 | |
antseggs | 0:5a49275457c6 | 39 | |
antseggs | 0:5a49275457c6 | 40 | /* Define to prevent recursive inclusion -------------------------------------*/ |
antseggs | 0:5a49275457c6 | 41 | #ifndef __HTS221_H |
antseggs | 0:5a49275457c6 | 42 | #define __HTS221_H |
antseggs | 0:5a49275457c6 | 43 | |
antseggs | 0:5a49275457c6 | 44 | #ifdef __cplusplus |
antseggs | 0:5a49275457c6 | 45 | extern "C" { |
antseggs | 0:5a49275457c6 | 46 | #endif |
antseggs | 0:5a49275457c6 | 47 | |
antseggs | 0:5a49275457c6 | 48 | /* Includes ------------------------------------------------------------------*/ |
antseggs | 0:5a49275457c6 | 49 | #include "hum_temp.h" |
antseggs | 0:5a49275457c6 | 50 | |
antseggs | 0:5a49275457c6 | 51 | /** @addtogroup BSP |
antseggs | 0:5a49275457c6 | 52 | * @{ |
antseggs | 0:5a49275457c6 | 53 | */ |
antseggs | 0:5a49275457c6 | 54 | |
antseggs | 0:5a49275457c6 | 55 | /** @addtogroup Components |
antseggs | 0:5a49275457c6 | 56 | * @{ |
antseggs | 0:5a49275457c6 | 57 | */ |
antseggs | 0:5a49275457c6 | 58 | |
antseggs | 0:5a49275457c6 | 59 | /** @addtogroup HTS221 |
antseggs | 0:5a49275457c6 | 60 | * @{ |
antseggs | 0:5a49275457c6 | 61 | */ |
antseggs | 0:5a49275457c6 | 62 | |
antseggs | 0:5a49275457c6 | 63 | /** @defgroup HTS221_Exported_Defines HTS221_Exported_Defines |
antseggs | 0:5a49275457c6 | 64 | * @{ |
antseggs | 0:5a49275457c6 | 65 | */ |
antseggs | 0:5a49275457c6 | 66 | #ifndef NULL |
antseggs | 0:5a49275457c6 | 67 | #define NULL (void *) 0 |
antseggs | 0:5a49275457c6 | 68 | #endif |
antseggs | 0:5a49275457c6 | 69 | |
antseggs | 0:5a49275457c6 | 70 | /** |
antseggs | 0:5a49275457c6 | 71 | * @brief Device Address |
antseggs | 0:5a49275457c6 | 72 | */ |
antseggs | 0:5a49275457c6 | 73 | #define HTS221_ADDRESS 0xBE |
antseggs | 0:5a49275457c6 | 74 | |
antseggs | 0:5a49275457c6 | 75 | /******************************************************************************/ |
antseggs | 0:5a49275457c6 | 76 | /*************************** START REGISTER MAPPING **************************/ |
antseggs | 0:5a49275457c6 | 77 | /******************************************************************************/ |
antseggs | 0:5a49275457c6 | 78 | |
antseggs | 0:5a49275457c6 | 79 | |
antseggs | 0:5a49275457c6 | 80 | /** |
antseggs | 0:5a49275457c6 | 81 | * @brief Device identification register. |
antseggs | 0:5a49275457c6 | 82 | * \code |
antseggs | 0:5a49275457c6 | 83 | * Read |
antseggs | 0:5a49275457c6 | 84 | * Default value: 0xBC |
antseggs | 0:5a49275457c6 | 85 | * 7:0 This read-only register contains the device identifier that, for HTS221, is set to BCh. |
antseggs | 0:5a49275457c6 | 86 | * \endcode |
antseggs | 0:5a49275457c6 | 87 | */ |
antseggs | 0:5a49275457c6 | 88 | #define HTS221_WHO_AM_I_ADDR 0x0F |
antseggs | 0:5a49275457c6 | 89 | |
antseggs | 0:5a49275457c6 | 90 | |
antseggs | 0:5a49275457c6 | 91 | /** |
antseggs | 0:5a49275457c6 | 92 | * @brief Humidity resolution Register |
antseggs | 0:5a49275457c6 | 93 | * \code |
antseggs | 0:5a49275457c6 | 94 | * Read/write |
antseggs | 0:5a49275457c6 | 95 | * Default value: 0x1B |
antseggs | 0:5a49275457c6 | 96 | * 7:6 RFU |
antseggs | 0:5a49275457c6 | 97 | * 5:3 AVGT2-AVGT0: Temperature internal average. |
antseggs | 0:5a49275457c6 | 98 | * AVGT2 | AVGT1 | AVGT0 | Nr. Internal Average |
antseggs | 0:5a49275457c6 | 99 | * ------------------------------------------------------ |
antseggs | 0:5a49275457c6 | 100 | * 0 | 0 | 0 | 2 |
antseggs | 0:5a49275457c6 | 101 | * 0 | 0 | 1 | 4 |
antseggs | 0:5a49275457c6 | 102 | * 0 | 1 | 0 | 8 |
antseggs | 0:5a49275457c6 | 103 | * 0 | 1 | 1 | 16 |
antseggs | 0:5a49275457c6 | 104 | * 1 | 0 | 0 | 32 |
antseggs | 0:5a49275457c6 | 105 | * 1 | 0 | 1 | 64 |
antseggs | 0:5a49275457c6 | 106 | * 1 | 1 | 0 | 128 |
antseggs | 0:5a49275457c6 | 107 | * 1 | 1 | 1 | 256 |
antseggs | 0:5a49275457c6 | 108 | * |
antseggs | 0:5a49275457c6 | 109 | * 2:0 AVGH2-AVGH0: Humidity internal average. |
antseggs | 0:5a49275457c6 | 110 | * AVGH2 | AVGH1 | AVGH0 | Nr. Internal Average |
antseggs | 0:5a49275457c6 | 111 | * ------------------------------------------------------ |
antseggs | 0:5a49275457c6 | 112 | * 0 | 0 | 0 | 4 |
antseggs | 0:5a49275457c6 | 113 | * 0 | 0 | 1 | 8 |
antseggs | 0:5a49275457c6 | 114 | * 0 | 1 | 0 | 16 |
antseggs | 0:5a49275457c6 | 115 | * 0 | 1 | 1 | 32 |
antseggs | 0:5a49275457c6 | 116 | * 1 | 0 | 0 | 64 |
antseggs | 0:5a49275457c6 | 117 | * 1 | 0 | 1 | 128 |
antseggs | 0:5a49275457c6 | 118 | * 1 | 1 | 0 | 256 |
antseggs | 0:5a49275457c6 | 119 | * 1 | 1 | 1 | 512 |
antseggs | 0:5a49275457c6 | 120 | * |
antseggs | 0:5a49275457c6 | 121 | * \endcode |
antseggs | 0:5a49275457c6 | 122 | */ |
antseggs | 0:5a49275457c6 | 123 | #define HTS221_RES_CONF_ADDR 0x10 |
antseggs | 0:5a49275457c6 | 124 | |
antseggs | 0:5a49275457c6 | 125 | |
antseggs | 0:5a49275457c6 | 126 | /** |
antseggs | 0:5a49275457c6 | 127 | * @brief INFO Register (LSB data) |
antseggs | 0:5a49275457c6 | 128 | * \code |
antseggs | 0:5a49275457c6 | 129 | * Read/write |
antseggs | 0:5a49275457c6 | 130 | * Default value: 0x00 |
antseggs | 0:5a49275457c6 | 131 | * 7:0 INFO7-INFO0: Lower part of the INFO reference |
antseggs | 0:5a49275457c6 | 132 | * used for traceability of the sample. |
antseggs | 0:5a49275457c6 | 133 | * \endcode |
antseggs | 0:5a49275457c6 | 134 | */ |
antseggs | 0:5a49275457c6 | 135 | #define HTS221_INFO_L_ADDR 0x1E |
antseggs | 0:5a49275457c6 | 136 | |
antseggs | 0:5a49275457c6 | 137 | |
antseggs | 0:5a49275457c6 | 138 | /** |
antseggs | 0:5a49275457c6 | 139 | * @brief INFO & Calibration Version Register (LSB data) |
antseggs | 0:5a49275457c6 | 140 | * \code |
antseggs | 0:5a49275457c6 | 141 | * Read/write |
antseggs | 0:5a49275457c6 | 142 | * Default value: 0x00 |
antseggs | 0:5a49275457c6 | 143 | * 7:6 CALVER1:CALVER0 |
antseggs | 0:5a49275457c6 | 144 | * 5:0 INFO13-INFO8: Higher part of the INFO reference |
antseggs | 0:5a49275457c6 | 145 | * used for traceability of the sample. |
antseggs | 0:5a49275457c6 | 146 | * \endcode |
antseggs | 0:5a49275457c6 | 147 | */ |
antseggs | 0:5a49275457c6 | 148 | #define HTS221_INFO_H_ADDR 0x1F |
antseggs | 0:5a49275457c6 | 149 | |
antseggs | 0:5a49275457c6 | 150 | |
antseggs | 0:5a49275457c6 | 151 | /** |
antseggs | 0:5a49275457c6 | 152 | * @brief Humidity sensor control register 1 |
antseggs | 0:5a49275457c6 | 153 | * \code |
antseggs | 0:5a49275457c6 | 154 | * Read/write |
antseggs | 0:5a49275457c6 | 155 | * Default value: 0x00 |
antseggs | 0:5a49275457c6 | 156 | * 7 PD: power down control. 0 - disable; 1 - enable |
antseggs | 0:5a49275457c6 | 157 | * 6:3 RFU |
antseggs | 0:5a49275457c6 | 158 | * 2 BDU: block data update. 0 - disable; 1 - enable |
antseggs | 0:5a49275457c6 | 159 | * 1:0 RFU |
antseggs | 0:5a49275457c6 | 160 | * \endcode |
antseggs | 0:5a49275457c6 | 161 | */ |
antseggs | 0:5a49275457c6 | 162 | |
antseggs | 0:5a49275457c6 | 163 | #define HTS221_CTRL_REG1_ADDR 0x20 |
antseggs | 0:5a49275457c6 | 164 | |
antseggs | 0:5a49275457c6 | 165 | |
antseggs | 0:5a49275457c6 | 166 | /** |
antseggs | 0:5a49275457c6 | 167 | * @brief Humidity sensor control register 2 |
antseggs | 0:5a49275457c6 | 168 | * \code |
antseggs | 0:5a49275457c6 | 169 | * Read/write |
antseggs | 0:5a49275457c6 | 170 | * Default value: 0x00 |
antseggs | 0:5a49275457c6 | 171 | * 7 BOOT: Reboot memory content. 0: normal mode; 1: reboot memory content |
antseggs | 0:5a49275457c6 | 172 | * 6:3 Reserved. |
antseggs | 0:5a49275457c6 | 173 | * 2 Reserved. |
antseggs | 0:5a49275457c6 | 174 | * 1 Reserved. |
antseggs | 0:5a49275457c6 | 175 | * 0 ONE_SHOT: One shot enable. 0: waiting for start of conversion; 1: start for a new dataset |
antseggs | 0:5a49275457c6 | 176 | * \endcode |
antseggs | 0:5a49275457c6 | 177 | */ |
antseggs | 0:5a49275457c6 | 178 | #define HTS221_CTRL_REG2_ADDR 0x21 |
antseggs | 0:5a49275457c6 | 179 | |
antseggs | 0:5a49275457c6 | 180 | |
antseggs | 0:5a49275457c6 | 181 | /** |
antseggs | 0:5a49275457c6 | 182 | * @brief Humidity sensor control register 3 |
antseggs | 0:5a49275457c6 | 183 | * \code |
antseggs | 0:5a49275457c6 | 184 | * Read/write |
antseggs | 0:5a49275457c6 | 185 | * Default value: 0x00 |
antseggs | 0:5a49275457c6 | 186 | * [7] DRDY_H_L: Data Ready output signal active high, low (0: active high -default;1: active low) |
antseggs | 0:5a49275457c6 | 187 | * [6] PP_OD: Push-pull / Open Drain selection on pin 3 (DRDY) (0: push-pull - default; 1: open drain) |
antseggs | 0:5a49275457c6 | 188 | * [5:3] Reserved |
antseggs | 0:5a49275457c6 | 189 | * [2] DRDY_EN: Data Ready enable (0: Data Ready disabled - default;1: Data Ready signal available on pin 3) |
antseggs | 0:5a49275457c6 | 190 | * [1:0] Reserved |
antseggs | 0:5a49275457c6 | 191 | * \endcode |
antseggs | 0:5a49275457c6 | 192 | */ |
antseggs | 0:5a49275457c6 | 193 | #define HTS221_CTRL_REG3_ADDR 0x22 |
antseggs | 0:5a49275457c6 | 194 | |
antseggs | 0:5a49275457c6 | 195 | |
antseggs | 0:5a49275457c6 | 196 | /** |
antseggs | 0:5a49275457c6 | 197 | * @brief Status Register |
antseggs | 0:5a49275457c6 | 198 | * \code |
antseggs | 0:5a49275457c6 | 199 | * Read |
antseggs | 0:5a49275457c6 | 200 | * Default value: 0x00 |
antseggs | 0:5a49275457c6 | 201 | * 7:2 RFU |
antseggs | 0:5a49275457c6 | 202 | * 1 H_DA: Humidity data available. 0: new data for Humidity is not yet available; 1: new data for Humidity is available. |
antseggs | 0:5a49275457c6 | 203 | * 0 T_DA: Temperature data available. 0: new data for temperature is not yet available; 1: new data for temperature is available. |
antseggs | 0:5a49275457c6 | 204 | * \endcode |
antseggs | 0:5a49275457c6 | 205 | */ |
antseggs | 0:5a49275457c6 | 206 | #define HTS221_STATUS_REG_ADDR 0x27 |
antseggs | 0:5a49275457c6 | 207 | |
antseggs | 0:5a49275457c6 | 208 | |
antseggs | 0:5a49275457c6 | 209 | /** |
antseggs | 0:5a49275457c6 | 210 | * @brief Humidity data (LSB). |
antseggs | 0:5a49275457c6 | 211 | * \code |
antseggs | 0:5a49275457c6 | 212 | * Read |
antseggs | 0:5a49275457c6 | 213 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 214 | * POUT7 - POUT0: Humidity data LSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 215 | * RAW Humidity output data: Hout(%)=(HUMIDITY_OUT_H & HUMIDITY_OUT_L). |
antseggs | 0:5a49275457c6 | 216 | * \endcode |
antseggs | 0:5a49275457c6 | 217 | */ |
antseggs | 0:5a49275457c6 | 218 | #define HTS221_HUMIDITY_OUT_L_ADDR 0x28 |
antseggs | 0:5a49275457c6 | 219 | |
antseggs | 0:5a49275457c6 | 220 | |
antseggs | 0:5a49275457c6 | 221 | /** |
antseggs | 0:5a49275457c6 | 222 | * @brief Humidity data (MSB). |
antseggs | 0:5a49275457c6 | 223 | * \code |
antseggs | 0:5a49275457c6 | 224 | * Read |
antseggs | 0:5a49275457c6 | 225 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 226 | * POUT7 - POUT0: Humidity data LSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 227 | * RAW Humidity output data: Hout(%)=(HUMIDITY_OUT_H & HUMIDITY_OUT_L). |
antseggs | 0:5a49275457c6 | 228 | * \endcode |
antseggs | 0:5a49275457c6 | 229 | */ |
antseggs | 0:5a49275457c6 | 230 | #define HTS221_HUMIDITY_OUT_H_ADDR 0x29 |
antseggs | 0:5a49275457c6 | 231 | |
antseggs | 0:5a49275457c6 | 232 | |
antseggs | 0:5a49275457c6 | 233 | /** |
antseggs | 0:5a49275457c6 | 234 | * @brief Temperature data (LSB). |
antseggs | 0:5a49275457c6 | 235 | * \code |
antseggs | 0:5a49275457c6 | 236 | * Read |
antseggs | 0:5a49275457c6 | 237 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 238 | * TOUT7 - TOUT0: temperature data LSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 239 | * RAW Temperature output data: Tout (LSB)=(TEMP_OUT_H & TEMP_OUT_L). |
antseggs | 0:5a49275457c6 | 240 | * \endcode |
antseggs | 0:5a49275457c6 | 241 | */ |
antseggs | 0:5a49275457c6 | 242 | #define HTS221_TEMP_OUT_L_ADDR 0x2A |
antseggs | 0:5a49275457c6 | 243 | |
antseggs | 0:5a49275457c6 | 244 | |
antseggs | 0:5a49275457c6 | 245 | /** |
antseggs | 0:5a49275457c6 | 246 | * @brief Temperature data (MSB). |
antseggs | 0:5a49275457c6 | 247 | * \code |
antseggs | 0:5a49275457c6 | 248 | * Read |
antseggs | 0:5a49275457c6 | 249 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 250 | * TOUT15 - TOUT8: temperature data MSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 251 | * RAW Temperature output data: Tout (LSB)=(TEMP_OUT_H & TEMP_OUT_L). |
antseggs | 0:5a49275457c6 | 252 | * \endcode |
antseggs | 0:5a49275457c6 | 253 | */ |
antseggs | 0:5a49275457c6 | 254 | #define HTS221_TEMP_OUT_H_ADDR 0x2B |
antseggs | 0:5a49275457c6 | 255 | |
antseggs | 0:5a49275457c6 | 256 | |
antseggs | 0:5a49275457c6 | 257 | /** |
antseggs | 0:5a49275457c6 | 258 | *@brief Humidity 0 Register in %RH with sensitivity=2 |
antseggs | 0:5a49275457c6 | 259 | *\code |
antseggs | 0:5a49275457c6 | 260 | * Read |
antseggs | 0:5a49275457c6 | 261 | * Value: (Unsigned 8 Bit)/2 |
antseggs | 0:5a49275457c6 | 262 | *\endcode |
antseggs | 0:5a49275457c6 | 263 | */ |
antseggs | 0:5a49275457c6 | 264 | #define HTS221_H0_RH_X2_ADDR 0x30 |
antseggs | 0:5a49275457c6 | 265 | |
antseggs | 0:5a49275457c6 | 266 | |
antseggs | 0:5a49275457c6 | 267 | /** |
antseggs | 0:5a49275457c6 | 268 | *@brief Humidity 1 Register in %RH with sensitivity=2 |
antseggs | 0:5a49275457c6 | 269 | *\code |
antseggs | 0:5a49275457c6 | 270 | * Read |
antseggs | 0:5a49275457c6 | 271 | * Value: (Unsigned 8 Bit)/2 |
antseggs | 0:5a49275457c6 | 272 | *\endcode |
antseggs | 0:5a49275457c6 | 273 | */ |
antseggs | 0:5a49275457c6 | 274 | #define HTS221_H1_RH_X2_ADDR 0x31 |
antseggs | 0:5a49275457c6 | 275 | |
antseggs | 0:5a49275457c6 | 276 | |
antseggs | 0:5a49275457c6 | 277 | /** |
antseggs | 0:5a49275457c6 | 278 | *@brief Temperature 0 Register in deg with sensitivity=8 |
antseggs | 0:5a49275457c6 | 279 | *\code |
antseggs | 0:5a49275457c6 | 280 | * Read |
antseggs | 0:5a49275457c6 | 281 | * Value: (Unsigned 16 Bit)/2 |
antseggs | 0:5a49275457c6 | 282 | *\endcode |
antseggs | 0:5a49275457c6 | 283 | */ |
antseggs | 0:5a49275457c6 | 284 | #define HTS221_T0_degC_X8_ADDR 0x32 |
antseggs | 0:5a49275457c6 | 285 | |
antseggs | 0:5a49275457c6 | 286 | |
antseggs | 0:5a49275457c6 | 287 | /** |
antseggs | 0:5a49275457c6 | 288 | *@brief Temperature 1 Register in deg with sensitivity=8 |
antseggs | 0:5a49275457c6 | 289 | *\code |
antseggs | 0:5a49275457c6 | 290 | * Read |
antseggs | 0:5a49275457c6 | 291 | * Value: (Unsigned 16 Bit)/2 |
antseggs | 0:5a49275457c6 | 292 | *\endcode |
antseggs | 0:5a49275457c6 | 293 | */ |
antseggs | 0:5a49275457c6 | 294 | #define HTS221_T1_degC_X8_ADDR 0x33 |
antseggs | 0:5a49275457c6 | 295 | |
antseggs | 0:5a49275457c6 | 296 | |
antseggs | 0:5a49275457c6 | 297 | /** |
antseggs | 0:5a49275457c6 | 298 | *@brief Temperature 1/0 MSB Register in deg with sensitivity=8 |
antseggs | 0:5a49275457c6 | 299 | *\code |
antseggs | 0:5a49275457c6 | 300 | * Read |
antseggs | 0:5a49275457c6 | 301 | * Value: (Unsigned 16 Bit)/2 |
antseggs | 0:5a49275457c6 | 302 | * 3:2 T1(9):T1(8) MSB T1_degC_X8 bits |
antseggs | 0:5a49275457c6 | 303 | * 1:0 T0(9):T0(8) MSB T0_degC_X8 bits |
antseggs | 0:5a49275457c6 | 304 | *\endcode |
antseggs | 0:5a49275457c6 | 305 | */ |
antseggs | 0:5a49275457c6 | 306 | #define HTS221_T1_T0_MSB_X8_ADDR 0x35 |
antseggs | 0:5a49275457c6 | 307 | |
antseggs | 0:5a49275457c6 | 308 | |
antseggs | 0:5a49275457c6 | 309 | /** |
antseggs | 0:5a49275457c6 | 310 | *@brief Humidity LOW CALIBRATION Register |
antseggs | 0:5a49275457c6 | 311 | *\code |
antseggs | 0:5a49275457c6 | 312 | * Read |
antseggs | 0:5a49275457c6 | 313 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 314 | * H0_T0_TOUT7 - H0_T0_TOUT0: HUMIDITY data lSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 315 | *\endcode |
antseggs | 0:5a49275457c6 | 316 | */ |
antseggs | 0:5a49275457c6 | 317 | #define HTS221_H0_T0_OUT_L_ADDR 0x36 |
antseggs | 0:5a49275457c6 | 318 | |
antseggs | 0:5a49275457c6 | 319 | |
antseggs | 0:5a49275457c6 | 320 | /** |
antseggs | 0:5a49275457c6 | 321 | *@brief Humidity LOW CALIBRATION Register |
antseggs | 0:5a49275457c6 | 322 | *\code |
antseggs | 0:5a49275457c6 | 323 | * Read |
antseggs | 0:5a49275457c6 | 324 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 325 | * H0_T0_TOUT15 - H0_T0_TOUT8: HUMIDITY data mSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 326 | *\endcode |
antseggs | 0:5a49275457c6 | 327 | */ |
antseggs | 0:5a49275457c6 | 328 | #define HTS221_H0_T0_OUT_H_ADDR 0x37 |
antseggs | 0:5a49275457c6 | 329 | |
antseggs | 0:5a49275457c6 | 330 | |
antseggs | 0:5a49275457c6 | 331 | /** |
antseggs | 0:5a49275457c6 | 332 | *@brief Humidity HIGH CALIBRATION Register |
antseggs | 0:5a49275457c6 | 333 | *\code |
antseggs | 0:5a49275457c6 | 334 | * Read |
antseggs | 0:5a49275457c6 | 335 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 336 | * H1_T0_TOUT7 - H1_T0_TOUT0: HUMIDITY data lSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 337 | *\endcode |
antseggs | 0:5a49275457c6 | 338 | */ |
antseggs | 0:5a49275457c6 | 339 | #define HTS221_H1_T0_OUT_L_ADDR 0x3A |
antseggs | 0:5a49275457c6 | 340 | |
antseggs | 0:5a49275457c6 | 341 | |
antseggs | 0:5a49275457c6 | 342 | /** |
antseggs | 0:5a49275457c6 | 343 | *@brief Humidity HIGH CALIBRATION Register |
antseggs | 0:5a49275457c6 | 344 | *\code |
antseggs | 0:5a49275457c6 | 345 | * Read |
antseggs | 0:5a49275457c6 | 346 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 347 | * H1_T0_TOUT15 - H1_T0_TOUT8: HUMIDITY data mSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 348 | *\endcode |
antseggs | 0:5a49275457c6 | 349 | */ |
antseggs | 0:5a49275457c6 | 350 | #define HTS221_H1_T0_OUT_H_ADDR 0x3B |
antseggs | 0:5a49275457c6 | 351 | |
antseggs | 0:5a49275457c6 | 352 | |
antseggs | 0:5a49275457c6 | 353 | /** |
antseggs | 0:5a49275457c6 | 354 | * @brief Low Calibration Temperature Register (LSB). |
antseggs | 0:5a49275457c6 | 355 | * \code |
antseggs | 0:5a49275457c6 | 356 | * Read |
antseggs | 0:5a49275457c6 | 357 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 358 | * T0_OUT7 - T0_OUT0: temperature data LSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 359 | * RAW LOW Calibration data: T0_OUT (LSB)=(T0_OUT_H & T0_OUT_L). |
antseggs | 0:5a49275457c6 | 360 | * \endcode |
antseggs | 0:5a49275457c6 | 361 | */ |
antseggs | 0:5a49275457c6 | 362 | #define HTS221_T0_OUT_L_ADDR 0x3C |
antseggs | 0:5a49275457c6 | 363 | |
antseggs | 0:5a49275457c6 | 364 | |
antseggs | 0:5a49275457c6 | 365 | /** |
antseggs | 0:5a49275457c6 | 366 | * @brief Low Calibration Temperature Register (MSB) |
antseggs | 0:5a49275457c6 | 367 | * \code |
antseggs | 0:5a49275457c6 | 368 | * Read |
antseggs | 0:5a49275457c6 | 369 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 370 | * T0_OUT15 - T0_OUT8: temperature data MSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 371 | * RAW LOW Calibration data: T0_OUT (LSB)=(T0_OUT_H & T0_OUT_L). |
antseggs | 0:5a49275457c6 | 372 | * \endcode |
antseggs | 0:5a49275457c6 | 373 | */ |
antseggs | 0:5a49275457c6 | 374 | #define HTS221_T0_OUT_H_ADDR 0x3D |
antseggs | 0:5a49275457c6 | 375 | |
antseggs | 0:5a49275457c6 | 376 | |
antseggs | 0:5a49275457c6 | 377 | /** |
antseggs | 0:5a49275457c6 | 378 | * @brief Low Calibration Temperature Register (LSB). |
antseggs | 0:5a49275457c6 | 379 | * \code |
antseggs | 0:5a49275457c6 | 380 | * Read |
antseggs | 0:5a49275457c6 | 381 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 382 | * T1_OUT7 - T1_OUT0: temperature data LSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 383 | * RAW LOW Calibration data: T1_OUT (LSB)=(T1_OUT_H & T1_OUT_L). |
antseggs | 0:5a49275457c6 | 384 | * \endcode |
antseggs | 0:5a49275457c6 | 385 | */ |
antseggs | 0:5a49275457c6 | 386 | #define HTS221_T1_OUT_L_ADDR 0x3E |
antseggs | 0:5a49275457c6 | 387 | |
antseggs | 0:5a49275457c6 | 388 | |
antseggs | 0:5a49275457c6 | 389 | /** |
antseggs | 0:5a49275457c6 | 390 | * @brief Low Calibration Temperature Register (MSB) |
antseggs | 0:5a49275457c6 | 391 | * \code |
antseggs | 0:5a49275457c6 | 392 | * Read |
antseggs | 0:5a49275457c6 | 393 | * Default value: 0x00. |
antseggs | 0:5a49275457c6 | 394 | * T1_OUT15 - T1_OUT8: temperature data MSB (2's complement) => signed 16 bits |
antseggs | 0:5a49275457c6 | 395 | * RAW LOW Calibration data: T1_OUT (LSB)=(T1_OUT_H & T1_OUT_L). |
antseggs | 0:5a49275457c6 | 396 | * \endcode |
antseggs | 0:5a49275457c6 | 397 | */ |
antseggs | 0:5a49275457c6 | 398 | #define HTS221_T1_OUT_H_ADDR 0x3F |
antseggs | 0:5a49275457c6 | 399 | |
antseggs | 0:5a49275457c6 | 400 | |
antseggs | 0:5a49275457c6 | 401 | /******************************************************************************/ |
antseggs | 0:5a49275457c6 | 402 | /**************************** END REGISTER MAPPING ***************************/ |
antseggs | 0:5a49275457c6 | 403 | /******************************************************************************/ |
antseggs | 0:5a49275457c6 | 404 | |
antseggs | 0:5a49275457c6 | 405 | /** |
antseggs | 0:5a49275457c6 | 406 | * @brief Multiple Byte. Mask for enabling multiple byte read/write command. |
antseggs | 0:5a49275457c6 | 407 | */ |
antseggs | 0:5a49275457c6 | 408 | #define HTS221_I2C_MULTIPLEBYTE_CMD ((uint8_t)0x80) |
antseggs | 0:5a49275457c6 | 409 | |
antseggs | 0:5a49275457c6 | 410 | /** |
antseggs | 0:5a49275457c6 | 411 | * @brief Device Identifier. Default value of the WHO_AM_I register. |
antseggs | 0:5a49275457c6 | 412 | */ |
antseggs | 0:5a49275457c6 | 413 | #define I_AM_HTS221 ((uint8_t)0xBC) |
antseggs | 0:5a49275457c6 | 414 | |
antseggs | 0:5a49275457c6 | 415 | |
antseggs | 0:5a49275457c6 | 416 | /** @defgroup HTS221_Power_Mode_Selection_CTRL_REG1 HTS221_Power_Mode_Selection_CTRL_REG1 |
antseggs | 0:5a49275457c6 | 417 | * @{ |
antseggs | 0:5a49275457c6 | 418 | */ |
antseggs | 0:5a49275457c6 | 419 | #define HTS221_MODE_POWERDOWN ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 420 | #define HTS221_MODE_ACTIVE ((uint8_t)0x80) |
antseggs | 0:5a49275457c6 | 421 | |
antseggs | 0:5a49275457c6 | 422 | #define HTS221_MODE_MASK ((uint8_t)0x80) |
antseggs | 0:5a49275457c6 | 423 | /** |
antseggs | 0:5a49275457c6 | 424 | * @} |
antseggs | 0:5a49275457c6 | 425 | */ |
antseggs | 0:5a49275457c6 | 426 | |
antseggs | 0:5a49275457c6 | 427 | |
antseggs | 0:5a49275457c6 | 428 | /** @defgroup HTS221_Block_Data_Update_Mode_Selection_CTRL_REG1 HTS221_Block_Data_Update_Mode_Selection_CTRL_REG1 |
antseggs | 0:5a49275457c6 | 429 | * @{ |
antseggs | 0:5a49275457c6 | 430 | */ |
antseggs | 0:5a49275457c6 | 431 | #define HTS221_BDU_CONTINUOUS ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 432 | #define HTS221_BDU_NOT_UNTIL_READING ((uint8_t)0x04) |
antseggs | 0:5a49275457c6 | 433 | |
antseggs | 0:5a49275457c6 | 434 | #define HTS221_BDU_MASK ((uint8_t)0x04) |
antseggs | 0:5a49275457c6 | 435 | /** |
antseggs | 0:5a49275457c6 | 436 | * @} |
antseggs | 0:5a49275457c6 | 437 | */ |
antseggs | 0:5a49275457c6 | 438 | |
antseggs | 0:5a49275457c6 | 439 | /** @defgroup HTS221_Output_Data_Rate_Selection_CTRL_REG1 HTS221_Output_Data_Rate_Selection_CTRL_REG1 |
antseggs | 0:5a49275457c6 | 440 | * @{ |
antseggs | 0:5a49275457c6 | 441 | */ |
antseggs | 0:5a49275457c6 | 442 | #define HTS221_ODR_ONE_SHOT ((uint8_t)0x00) /*!< Output Data Rate: H - one shot, T - one shot */ |
antseggs | 0:5a49275457c6 | 443 | #define HTS221_ODR_1Hz ((uint8_t)0x01) /*!< Output Data Rate: H - 1Hz, T - 1Hz */ |
antseggs | 0:5a49275457c6 | 444 | #define HTS221_ODR_7Hz ((uint8_t)0x02) /*!< Output Data Rate: H - 7Hz, T - 7Hz */ |
antseggs | 0:5a49275457c6 | 445 | #define HTS221_ODR_12_5Hz ((uint8_t)0x03) /*!< Output Data Rate: H - 12.5Hz, T - 12.5Hz */ |
antseggs | 0:5a49275457c6 | 446 | |
antseggs | 0:5a49275457c6 | 447 | #define HTS221_ODR_MASK ((uint8_t)0x03) |
antseggs | 0:5a49275457c6 | 448 | /** |
antseggs | 0:5a49275457c6 | 449 | * @} |
antseggs | 0:5a49275457c6 | 450 | */ |
antseggs | 0:5a49275457c6 | 451 | |
antseggs | 0:5a49275457c6 | 452 | |
antseggs | 0:5a49275457c6 | 453 | /** @defgroup HTS221_Boot_Mode_Selection_CTRL_REG2 HTS221_Boot_Mode_Selection_CTRL_REG2 |
antseggs | 0:5a49275457c6 | 454 | * @{ |
antseggs | 0:5a49275457c6 | 455 | */ |
antseggs | 0:5a49275457c6 | 456 | #define HTS221_BOOT_NORMALMODE ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 457 | #define HTS221_BOOT_REBOOTMEMORY ((uint8_t)0x80) |
antseggs | 0:5a49275457c6 | 458 | |
antseggs | 0:5a49275457c6 | 459 | #define HTS221_BOOT_MASK ((uint8_t)0x80) |
antseggs | 0:5a49275457c6 | 460 | /** |
antseggs | 0:5a49275457c6 | 461 | * @} |
antseggs | 0:5a49275457c6 | 462 | */ |
antseggs | 0:5a49275457c6 | 463 | |
antseggs | 0:5a49275457c6 | 464 | |
antseggs | 0:5a49275457c6 | 465 | /** @defgroup HTS221_One_Shot_Selection_CTRL_REG2 HTS221_One_Shot_Selection_CTRL_REG2 |
antseggs | 0:5a49275457c6 | 466 | * @{ |
antseggs | 0:5a49275457c6 | 467 | */ |
antseggs | 0:5a49275457c6 | 468 | #define HTS221_ONE_SHOT_START ((uint8_t)0x01) |
antseggs | 0:5a49275457c6 | 469 | |
antseggs | 0:5a49275457c6 | 470 | #define HTS221_ONE_SHOT_MASK ((uint8_t)0x01) |
antseggs | 0:5a49275457c6 | 471 | /** |
antseggs | 0:5a49275457c6 | 472 | * @} |
antseggs | 0:5a49275457c6 | 473 | */ |
antseggs | 0:5a49275457c6 | 474 | |
antseggs | 0:5a49275457c6 | 475 | /** @defgroup HTS221_PushPull_OpenDrain_Selection_CTRL_REG3 HTS221_PushPull_OpenDrain_Selection_CTRL_REG3 |
antseggs | 0:5a49275457c6 | 476 | * @{ |
antseggs | 0:5a49275457c6 | 477 | */ |
antseggs | 0:5a49275457c6 | 478 | #define HTS221_PP_OD_PUSH_PULL ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 479 | #define HTS221_PP_OD_OPEN_DRAIN ((uint8_t)0x40) |
antseggs | 0:5a49275457c6 | 480 | |
antseggs | 0:5a49275457c6 | 481 | #define HTS221_PP_OD_MASK ((uint8_t)0x40) |
antseggs | 0:5a49275457c6 | 482 | /** |
antseggs | 0:5a49275457c6 | 483 | * @} |
antseggs | 0:5a49275457c6 | 484 | */ |
antseggs | 0:5a49275457c6 | 485 | |
antseggs | 0:5a49275457c6 | 486 | |
antseggs | 0:5a49275457c6 | 487 | /** @defgroup HTS221_Data_Ready_Selection_CTRL_REG3 HTS221_Data_Ready_Selection_CTRL_REG3 |
antseggs | 0:5a49275457c6 | 488 | * @{ |
antseggs | 0:5a49275457c6 | 489 | */ |
antseggs | 0:5a49275457c6 | 490 | #define HTS221_DRDY_DISABLE ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 491 | #define HTS221_DRDY_AVAILABLE ((uint8_t)0x04) |
antseggs | 0:5a49275457c6 | 492 | |
antseggs | 0:5a49275457c6 | 493 | #define HTS221_DRDY_MASK ((uint8_t)0x04) |
antseggs | 0:5a49275457c6 | 494 | /** |
antseggs | 0:5a49275457c6 | 495 | * @} |
antseggs | 0:5a49275457c6 | 496 | */ |
antseggs | 0:5a49275457c6 | 497 | |
antseggs | 0:5a49275457c6 | 498 | |
antseggs | 0:5a49275457c6 | 499 | /** @defgroup HTS221_Humidity_Resolution_Selection_RES_CONF HTS221_Humidity_Resolution_Selection_RES_CONF |
antseggs | 0:5a49275457c6 | 500 | * @{ |
antseggs | 0:5a49275457c6 | 501 | */ |
antseggs | 0:5a49275457c6 | 502 | #define HTS221_H_RES_AVG_4 ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 503 | #define HTS221_H_RES_AVG_8 ((uint8_t)0x01) |
antseggs | 0:5a49275457c6 | 504 | #define HTS221_H_RES_AVG_16 ((uint8_t)0x02) |
antseggs | 0:5a49275457c6 | 505 | #define HTS221_H_RES_AVG_32 ((uint8_t)0x03) |
antseggs | 0:5a49275457c6 | 506 | #define HTS221_H_RES_AVG_64 ((uint8_t)0x04) |
antseggs | 0:5a49275457c6 | 507 | #define HTS221_H_RES_AVG_128 ((uint8_t)0x05) |
antseggs | 0:5a49275457c6 | 508 | |
antseggs | 0:5a49275457c6 | 509 | #define HTS221_H_RES_MASK ((uint8_t)0x07) |
antseggs | 0:5a49275457c6 | 510 | /** |
antseggs | 0:5a49275457c6 | 511 | * @} |
antseggs | 0:5a49275457c6 | 512 | */ |
antseggs | 0:5a49275457c6 | 513 | |
antseggs | 0:5a49275457c6 | 514 | |
antseggs | 0:5a49275457c6 | 515 | /** @defgroup HTS221_Temperature_Resolution_Selection_RES_CONF HTS221_Temperature_Resolution_Selection_RES_CONF |
antseggs | 0:5a49275457c6 | 516 | * @{ |
antseggs | 0:5a49275457c6 | 517 | */ |
antseggs | 0:5a49275457c6 | 518 | #define HTS221_T_RES_AVG_2 ((uint8_t)0x00) |
antseggs | 0:5a49275457c6 | 519 | #define HTS221_T_RES_AVG_4 ((uint8_t)0x08) |
antseggs | 0:5a49275457c6 | 520 | #define HTS221_T_RES_AVG_8 ((uint8_t)0x10) |
antseggs | 0:5a49275457c6 | 521 | #define HTS221_T_RES_AVG_16 ((uint8_t)0x18) |
antseggs | 0:5a49275457c6 | 522 | #define HTS221_T_RES_AVG_32 ((uint8_t)0x20) |
antseggs | 0:5a49275457c6 | 523 | #define HTS221_T_RES_AVG_64 ((uint8_t)0x28) |
antseggs | 0:5a49275457c6 | 524 | |
antseggs | 0:5a49275457c6 | 525 | #define HTS221_T_RES_MASK ((uint8_t)0x38) |
antseggs | 0:5a49275457c6 | 526 | /** |
antseggs | 0:5a49275457c6 | 527 | * @} |
antseggs | 0:5a49275457c6 | 528 | */ |
antseggs | 0:5a49275457c6 | 529 | |
antseggs | 0:5a49275457c6 | 530 | |
antseggs | 0:5a49275457c6 | 531 | /** @defgroup HTS221_Temperature_Humidity_Data_Available_STATUS_REG HTS221_Temperature_Humidity_Data_Available_STATUS_REG |
antseggs | 0:5a49275457c6 | 532 | * @{ |
antseggs | 0:5a49275457c6 | 533 | */ |
antseggs | 0:5a49275457c6 | 534 | #define HTS221_H_DATA_AVAILABLE_MASK ((uint8_t)0x02) |
antseggs | 0:5a49275457c6 | 535 | #define HTS221_T_DATA_AVAILABLE_MASK ((uint8_t)0x01) |
antseggs | 0:5a49275457c6 | 536 | /** |
antseggs | 0:5a49275457c6 | 537 | * @} |
antseggs | 0:5a49275457c6 | 538 | */ |
antseggs | 0:5a49275457c6 | 539 | |
antseggs | 0:5a49275457c6 | 540 | /* Data resolution */ |
antseggs | 0:5a49275457c6 | 541 | #define HUM_DECIMAL_DIGITS (2) |
antseggs | 0:5a49275457c6 | 542 | #define TEMP_DECIMAL_DIGITS (2) |
antseggs | 0:5a49275457c6 | 543 | |
antseggs | 0:5a49275457c6 | 544 | /** |
antseggs | 0:5a49275457c6 | 545 | * @} |
antseggs | 0:5a49275457c6 | 546 | */ |
antseggs | 0:5a49275457c6 | 547 | |
antseggs | 0:5a49275457c6 | 548 | |
antseggs | 0:5a49275457c6 | 549 | /** @defgroup HTS221_Imported_Functions HTS221_Imported_Functions |
antseggs | 0:5a49275457c6 | 550 | * @{ |
antseggs | 0:5a49275457c6 | 551 | */ |
antseggs | 0:5a49275457c6 | 552 | /* HUM_TEMP sensor IO functions */ |
antseggs | 0:5a49275457c6 | 553 | extern HUM_TEMP_StatusTypeDef HTS221_IO_Init(void); |
antseggs | 0:5a49275457c6 | 554 | extern HUM_TEMP_StatusTypeDef HTS221_IO_Write(uint8_t* pBuffer, uint8_t DeviceAddr, uint8_t RegisterAddr, |
antseggs | 0:5a49275457c6 | 555 | uint16_t NumByteToWrite); |
antseggs | 0:5a49275457c6 | 556 | extern HUM_TEMP_StatusTypeDef HTS221_IO_Read(uint8_t* pBuffer, uint8_t DeviceAddr, uint8_t RegisterAddr, |
antseggs | 0:5a49275457c6 | 557 | uint16_t NumByteToRead); |
antseggs | 0:5a49275457c6 | 558 | extern void HTS221_IO_ITConfig( void ); |
antseggs | 0:5a49275457c6 | 559 | |
antseggs | 0:5a49275457c6 | 560 | /** |
antseggs | 0:5a49275457c6 | 561 | * @} |
antseggs | 0:5a49275457c6 | 562 | */ |
antseggs | 0:5a49275457c6 | 563 | |
antseggs | 0:5a49275457c6 | 564 | /* ------------------------------------------------------- */ |
antseggs | 0:5a49275457c6 | 565 | /* Here you should declare the internal struct of */ |
antseggs | 0:5a49275457c6 | 566 | /* extended features of HTS221. See the example of */ |
antseggs | 0:5a49275457c6 | 567 | /* LSM6DS3 in lsm6ds3.h */ |
antseggs | 0:5a49275457c6 | 568 | /* ------------------------------------------------------- */ |
antseggs | 0:5a49275457c6 | 569 | |
antseggs | 0:5a49275457c6 | 570 | /** @addtogroup HTS221_Exported_Variables HTS221_Exported_Variables |
antseggs | 0:5a49275457c6 | 571 | * @{ |
antseggs | 0:5a49275457c6 | 572 | */ |
antseggs | 0:5a49275457c6 | 573 | /* HUM_TEMP sensor driver structure */ |
antseggs | 0:5a49275457c6 | 574 | extern HUM_TEMP_DrvTypeDef Hts221Drv; |
antseggs | 0:5a49275457c6 | 575 | extern HUM_TEMP_DrvExtTypeDef Hts221Drv_ext; |
antseggs | 0:5a49275457c6 | 576 | /** |
antseggs | 0:5a49275457c6 | 577 | * @} |
antseggs | 0:5a49275457c6 | 578 | */ |
antseggs | 0:5a49275457c6 | 579 | |
antseggs | 0:5a49275457c6 | 580 | /** |
antseggs | 0:5a49275457c6 | 581 | * @} |
antseggs | 0:5a49275457c6 | 582 | */ |
antseggs | 0:5a49275457c6 | 583 | |
antseggs | 0:5a49275457c6 | 584 | /** |
antseggs | 0:5a49275457c6 | 585 | * @} |
antseggs | 0:5a49275457c6 | 586 | */ |
antseggs | 0:5a49275457c6 | 587 | |
antseggs | 0:5a49275457c6 | 588 | /** |
antseggs | 0:5a49275457c6 | 589 | * @} |
antseggs | 0:5a49275457c6 | 590 | */ |
antseggs | 0:5a49275457c6 | 591 | |
antseggs | 0:5a49275457c6 | 592 | #ifdef __cplusplus |
antseggs | 0:5a49275457c6 | 593 | } |
antseggs | 0:5a49275457c6 | 594 | #endif |
antseggs | 0:5a49275457c6 | 595 | |
antseggs | 0:5a49275457c6 | 596 | #endif /* __HTS221_H */ |
antseggs | 0:5a49275457c6 | 597 | |
antseggs | 0:5a49275457c6 | 598 | |
antseggs | 0:5a49275457c6 | 599 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |