Revision 23:ba0727e15160, committed 2017-06-19

Comitter:

tsungta

Date:

Mon Jun 19 17:39:35 2017 +0000

Parent:

22:5b38592bc0e6

Child:

24:a588c7f472ba

Commit message:

44:2a253f7; Change to use native spi LLD for this lib to prevent the conflict with other SPI/I2C interface used in application

Changed in this revision

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/wifi_host_driver/bsp/include/nrf51_spi_master.h	Mon Jun 19 17:39:35 2017 +0000
@@ -0,0 +1,117 @@
+ /* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+
+#ifndef NRF51_SPI_MASTER_H
+#define NRF51_SPI_MASTER_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+/* @file
+* @brief Software controlled SPI Master driver.
+*
+*
+* @defgroup lib_driver_spi_master Software controlled SPI Master driver
+* @{
+* @ingroup nrf_drivers
+* @brief Software controlled SPI Master driver.
+*
+* Supported features:
+* - Operate two SPI masters independently or in parallel.
+* - Transmit and Receive given size of data through SPI.
+* - configure each SPI module separately through @ref spi_master_init.
+*/
+
+/**
+ *  SPI master operating frequency
+ */
+typedef enum
+{
+    Freq_125Kbps = 0,        /*!< drive SClk with frequency 125Kbps */
+    Freq_250Kbps,            /*!< drive SClk with frequency 250Kbps */
+    Freq_500Kbps,            /*!< drive SClk with frequency 500Kbps */
+    Freq_1Mbps,              /*!< drive SClk with frequency 1Mbps */
+    Freq_2Mbps,              /*!< drive SClk with frequency 2Mbps */
+    Freq_4Mbps,              /*!< drive SClk with frequency 4Mbps */
+    Freq_8Mbps               /*!< drive SClk with frequency 8Mbps */
+} SPIFrequency_t;
+
+/**
+ *  SPI master module number
+ */
+typedef enum
+{
+    SPI0 = 0,               /*!< SPI module 0 */
+    SPI1                    /*!< SPI module 1 */
+} SPIModuleNumber;
+
+/**
+ *  SPI mode
+ */
+typedef enum
+{
+    //------------------------Clock polarity 0, Clock starts with level 0-------------------------------------------
+    SPI_MODE0 = 0,          /*!< Sample data at rising edge of clock and shift serial data at falling edge */
+    SPI_MODE1,              /*!< sample data at falling edge of clock and shift serial data at rising edge */
+    //------------------------Clock polarity 1, Clock starts with level 1-------------------------------------------
+    SPI_MODE2,              /*!< sample data at falling edge of clock and shift serial data at rising edge */
+    SPI_MODE3               /*!< Sample data at rising edge of clock and shift serial data at falling edge */
+} SPIMode;
+
+#ifdef __cplusplus//Tsungta, 2015/10/04, added so spi_master.c can convert to cpp (mbed SPI)
+extern "C"
+{
+#endif
+/**
+ * @brief Function for initializing given SPI master with given configuration.
+ *
+ * After initializing the given SPI master with given configuration, this function also test if the
+ * SPI slave is responding with the configurations by transmitting few test bytes. If the slave did not
+ * respond then error is returned and contents of the rx_data are invalid.
+ *
+ * @param module_number SPI master number (SPIModuleNumber) to initialize.
+ * @param mode SPI master mode (mode 0, 1, 2 or 3 from SPIMode)
+ * @param lsb_first true if lsb is first bit to shift in/out as serial data on MISO/MOSI pins.
+ * @return
+ * @retval pointer to direct physical address of the requested SPI module if init was successful
+ * @retval 0, if either init failed or slave did not respond to the test transfer
+ */
+uint32_t* spi_master_init(SPIModuleNumber module_number, SPIMode mode, bool lsb_first);
+
+/**
+ * @brief Function for transferring/receiving data over SPI bus.
+ *
+ * If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued
+ * and the function returns false.
+ *
+ * @note Make sure at least transfer_size number of bytes is allocated in tx_data/rx_data.
+ *
+ * @param spi_base_address  register base address of the selected SPI master module
+ * @param transfer_size  number of bytes to transmit/receive over SPI master
+ * @param tx_data pointer to the data that needs to be transmitted
+ * @param rx_data pointer to the data that needs to be received
+ * @return
+ * @retval true if transmit/reveive of transfer_size were completed.
+ * @retval false if transmit/reveive of transfer_size were not complete and tx_data/rx_data points to invalid data.
+ */
+//bool spi_master_tx_rx(uint32_t *spi_base_address, uint16_t transfer_size, const uint8_t *tx_data, uint8_t *rx_data);
+bool spi_master_tx_rx(SPIModuleNumber module_number, uint16_t transfer_size, const uint8_t *tx_data, uint8_t *rx_data);
+#ifdef __cplusplus
+}
+#endif
+/**
+ *@}
+ **/
+ 
+#endif /* SPI_MASTER_H */
+
+

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/wifi_host_driver/bsp/include/nrf51_spi_master_config.h	Mon Jun 19 17:39:35 2017 +0000
@@ -0,0 +1,61 @@
+/* Copyright (c) 2012 Nordic Semiconductor. All Rights Reserved.
+ *
+ * The information contained herein is property of Nordic Semiconductor ASA.
+ * Terms and conditions of usage are described in detail in NORDIC
+ * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
+ *
+ * Licensees are granted free, non-transferable use of the information. NO
+ * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
+ * the file.
+ *
+ */
+#ifndef SPI_MASTER_CONFIG_H
+#define SPI_MASTER_CONFIG_H
+
+#define SPI_OPERATING_FREQUENCY_8M  ( 0x02000000UL << (uint32_t)Freq_8Mbps )  /*!< Slave clock frequency. */
+#define SPI_OPERATING_FREQUENCY_4M  ( 0x02000000UL << (uint32_t)Freq_4Mbps )  /*!< Slave clock frequency. */
+#define SPI_OPERATING_FREQUENCY_1M  ( 0x02000000UL << (uint32_t)Freq_1Mbps )  /*!< Slave clock frequency. */
+
+/*  SPI0 */ 
+																	//modified by Tsungta, SCK/MOSI/MISO are shared
+#define SPI_PSELSCK0              11//25//31   /*!< GPIO pin number for SPI clock (note that setting this to 31 will only work for loopback purposes as it not connected to a pin) */
+#define SPI_PSELMOSI0             15//24//20   /*!< GPIO pin number for Master Out Slave In    */
+#define SPI_PSELMISO0             9//29//22   /*!< GPIO pin number for Master In Slave Out    */
+#define SPI_PSELSS0               12//30   /*!< GPIO pin number for Slave Select           */
+
+/*  SPI1 */
+#define SPI_PSELSCK1              11//29   /*!< GPIO pin number for SPI clock              */
+#define SPI_PSELMOSI1             15//21   /*!< GPIO pin number for Master Out Slave In    */
+#define SPI_PSELMISO1             9//23   /*!< GPIO pin number for Master In Slave Out    */
+#define SPI_PSELSS1               12//28   /*!< GPIO pin number for Slave Select           */
+
+//#define DEBUG
+#ifdef DEBUG
+#define DEBUG_EVENT_READY_PIN0    10    /*!< when DEBUG is enabled, this GPIO pin is toggled everytime READY_EVENT is set for SPI0, no toggling means something has gone wrong */
+#define DEBUG_EVENT_READY_PIN1    11    /*!< when DEBUG is enabled, this GPIO pin is toggled everytime READY_EVENT is set for SPI1, no toggling means something has gone wrong */
+#endif
+
+#define NUMBER_OF_TEST_BYTES     2    /*!< number of bytes to send to slave to test if Initialization was successful */
+#define TEST_BYTE                0xBB /*!< Randomly chosen test byte to transmit to spi slave */
+#define TIMEOUT_COUNTER          0x3000UL  /*!< timeout for getting rx bytes from slave */
+
+/** @def  TX_RX_MSG_LENGTH
+ * number of bytes to transmit and receive. This amount of bytes will also be tested to see that
+ * the received bytes from slave are the same as the transmitted bytes from the master */
+#define TX_RX_MSG_LENGTH   100
+
+/** @def ERROR_PIN_SPI0
+ * This pin is set active high when there is an error either in TX/RX for SPI0 or if the received bytes does not totally match the transmitted bytes.
+ * This functionality can be tested by temporarily disconnecting the MISO pin while running this example.
+ */
+#define ERROR_PIN_SPI0   8UL
+
+/** @def ERROR_PIN_SPI1
+ * This pin is set active high when there is an error either in TX/RX for SPI1 or if the received bytes does not totally match the transmitted bytes.
+ * This functionality can be tested by temporarily disconnecting the MISO pin while running this example.
+ */
+#define ERROR_PIN_SPI1   9UL
+
+#endif /* SPI_MASTER_CONFIG_H */
+
+

Binary file wifi_host_driver/bsp/source/nm_bsp_mbed_platform.o has changed

Binary file wifi_host_driver/bsp/source/nrf51_spi_master.o has changed

--- a/wifi_host_driver/bus_wrapper/include/nm_bus_wrapper.h	Mon Apr 17 14:08:42 2017 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,179 +0,0 @@
-/**
- *
- * \file
- *
- * \brief This module contains NMC1000 bus wrapper APIs declarations.
- *
- * Copyright (c) 2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-
-#ifndef _NM_BUS_WRAPPER_H_
-#define _NM_BUS_WRAPPER_H_
-
-#include "common/include/nm_common.h"
-
-/**
-	BUS Type
-**/
-#define  NM_BUS_TYPE_I2C	((uint8)0)
-#define  NM_BUS_TYPE_SPI	((uint8)1)
-#define  NM_BUS_TYPE_UART	((uint8)2)
-/**
-	IOCTL commands
-**/
-#define NM_BUS_IOCTL_R			((uint8)0)	/*!< Read only ==> I2C/UART. Parameter:tstrNmI2cDefault/tstrNmUartDefault */
-#define NM_BUS_IOCTL_W			((uint8)1)	/*!< Write only ==> I2C/UART. Parameter type tstrNmI2cDefault/tstrNmUartDefault*/
-#define NM_BUS_IOCTL_W_SPECIAL	((uint8)2)	/*!< Write two buffers within the same transaction
-												(same start/stop conditions) ==> I2C only. Parameter:tstrNmI2cSpecial */
-#define NM_BUS_IOCTL_RW			((uint8)3)	/*!< Read/Write at the same time ==> SPI only. Parameter:tstrNmSpiRw */
-
-#define NM_BUS_IOCTL_WR_RESTART	((uint8)4)				/*!< Write buffer then made restart condition then read ==> I2C only. parameter:tstrNmI2cSpecial */ 
-/**
-*	@struct	tstrNmBusCapabilities
-*	@brief	Structure holding bus capabilities information
-*	@sa	NM_BUS_TYPE_I2C, NM_BUS_TYPE_SPI
-*/ 
-typedef struct
-{
-	uint16	u16MaxTrxSz;	/*!< Maximum transfer size. Must be >= 16 bytes*/
-} tstrNmBusCapabilities;
-
-/**
-*	@struct	tstrNmI2cDefault
-*	@brief	Structure holding I2C default operation parameters
-*	@sa		NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
-*/ 
-typedef struct
-{
-	uint8 u8SlaveAdr;
-	uint8	*pu8Buf;	/*!< Operation buffer */
-	uint16	u16Sz;		/*!< Operation size */
-} tstrNmI2cDefault;
-
-/**
-*	@struct	tstrNmI2cSpecial
-*	@brief	Structure holding I2C special operation parameters
-*	@sa		NM_BUS_IOCTL_W_SPECIAL
-*/ 
-typedef struct
-{
-	uint8 u8SlaveAdr;
-	uint8	*pu8Buf1;	/*!< pointer to the 1st buffer */
-	uint8	*pu8Buf2;	/*!< pointer to the 2nd buffer */	
-	uint16	u16Sz1;		/*!< 1st buffer size */
-	uint16	u16Sz2;		/*!< 2nd buffer size */
-} tstrNmI2cSpecial;
-
-/**
-*	@struct	tstrNmSpiRw
-*	@brief	Structure holding SPI R/W parameters
-*	@sa		NM_BUS_IOCTL_RW
-*/ 
-typedef struct
-{
-	uint8	*pu8InBuf;		/*!< pointer to input buffer. 
-							Can be set to null and in this case zeros should be sent at MOSI */
-	uint8	*pu8OutBuf;		/*!< pointer to output buffer. 
-							Can be set to null and in this case data from MISO can be ignored  */
-	uint16	u16Sz;			/*!< Transfere size */	
-} tstrNmSpiRw;
-
-
-/**
-*	@struct	tstrNmUartDefault
-*	@brief	Structure holding UART default operation parameters
-*	@sa		NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
-*/ 
-typedef struct
-{
-	uint8	*pu8Buf;	/*!< Operation buffer */
-	uint16	u16Sz;		/*!< Operation size */
-} tstrNmUartDefault;
-/*!< Bus capabilities. This structure must be declared at platform specific bus wrapper */
-extern tstrNmBusCapabilities egstrNmBusCapabilities;
-
-
-#ifdef __cplusplus
-     extern "C" {
- #endif
-/**
-*	@fn		nm_bus_init
-*	@brief	Initialize the bus wrapper
-*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
-*/ 
-sint8 nm_bus_init(void *);
-
-/**
-*	@fn		nm_bus_ioctl
-*	@brief	send/receive from the bus
-*	@param [in]	u8Cmd
-*					IOCTL command for the operation
-*	@param [in]	pvParameter
-*					Arbitrary parameter depending on IOCTL
-*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
-*	@note	For SPI only, it's important to be able to send/receive at the same time
-*/ 
-sint8 nm_bus_ioctl(uint8 u8Cmd, void* pvParameter);
-
-/**
-*	@fn		nm_bus_deinit
-*	@brief	De-initialize the bus wrapper
-*	@return	ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
-*/ 
-sint8 nm_bus_deinit(void);
-
-/*
-*	@fn			nm_bus_reinit
-*	@brief		re-initialize the bus wrapper
-*	@param [in]	void *config
-*					re-init configuration data
-*	@return		ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
-*/
-sint8 nm_bus_reinit(void *);
-/*
-*	@fn			nm_bus_get_chip_type
-*	@brief		get chip type
-*	@return		ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
-*/ 
-#ifdef CONF_WINC_USE_UART
-uint8 nm_bus_get_chip_type(void);
-#endif
-#ifdef __cplusplus
-	 }
- #endif
-
-#endif	/*_NM_BUS_WRAPPER_H_*/
-
-

Binary file wifi_host_driver/bus_wrapper/source/nm_bus_wrapper_mbed_platform.o has changed

--- a/wifi_host_driver/common/include/nm_debug.h	Mon Apr 17 14:08:42 2017 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,97 +0,0 @@
-/**
- *
- * \file
- *
- * \brief This module contains debug APIs declarations.
- *
- * Copyright (c) 2015 Atmel Corporation. All rights reserved.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- *
- * 3. The name of Atmel may not be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
- * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- * \asf_license_stop
- *
- */
-
-#ifndef _NM_DEBUG_H_
-#define _NM_DEBUG_H_
-
-#include "bsp/include/nm_bsp.h"
-//Tsungta	#include "bsp/include/nm_bsp_internal.h"
-
-/**@defgroup  DebugDefines DebugDefines
- * @ingroup WlanDefines
- */
-/**@{*/
-
-
-#define M2M_LOG_NONE									0
-#define M2M_LOG_ERROR									1
-#define M2M_LOG_INFO									2
-#define M2M_LOG_REQ										3
-#define M2M_LOG_DBG										4
-
-#if (defined __APS3_CORTUS__)
-#define M2M_LOG_LEVEL									M2M_LOG_INFO
-#else
-#define M2M_LOG_LEVEL									M2M_LOG_REQ
-#endif
-
-
-#define M2M_ERR(...)
-#define M2M_INFO(...)
-#define M2M_REQ(...)
-#define M2M_DBG(...)
-#define M2M_PRINT(...)
-
-#if (CONF_WINC_DEBUG == 1)
-#undef M2M_PRINT
-#define M2M_PRINT(...)							do{CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
-#if (M2M_LOG_LEVEL >= M2M_LOG_ERROR)
-#undef M2M_ERR
-#define M2M_ERR(...)							do{CONF_WINC_PRINTF("(APP)(ERR)[%s][%d]",__FUNCTION__,__LINE__); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
-#if (M2M_LOG_LEVEL >= M2M_LOG_INFO)
-#undef M2M_INFO
-#define M2M_INFO(...)							do{CONF_WINC_PRINTF("(APP)(INFO)"); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
-#if (M2M_LOG_LEVEL >= M2M_LOG_REQ)
-#undef M2M_REQ
-#define M2M_REQ(...)							do{CONF_WINC_PRINTF("(APP)(R)"); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
-#if (M2M_LOG_LEVEL >= M2M_LOG_DBG)
-#undef M2M_DBG
-#define M2M_DBG(...)							do{CONF_WINC_PRINTF("(APP)(DBG)[%s][%d]",__FUNCTION__,__LINE__); CONF_WINC_PRINTF(__VA_ARGS__);CONF_WINC_PRINTF("\r");}while(0)
-#endif /*M2M_LOG_DBG*/
-#endif /*M2M_LOG_REQ*/
-#endif /*M2M_LOG_INFO*/
-#endif /*M2M_LOG_ERROR*/
-#endif /*CONF_WINC_DEBUG */
-
-/**@}*/
-#endif /* _NM_DEBUG_H_ */
-
-