NNN50 WIFI_API library

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Show/hide line numbers nrf51_spi_master.h Source File

nrf51_spi_master.h

00001  /* Copyright (c) 2009 Nordic Semiconductor. All Rights Reserved.
00002  *
00003  * The information contained herein is property of Nordic Semiconductor ASA.
00004  * Terms and conditions of usage are described in detail in NORDIC
00005  * SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
00006  *
00007  * Licensees are granted free, non-transferable use of the information. NO
00008  * WARRANTY of ANY KIND is provided. This heading must NOT be removed from
00009  * the file.
00010  *
00011  */
00012 
00013 #ifndef NRF51_SPI_MASTER_H
00014 #define NRF51_SPI_MASTER_H
00015 
00016 #include <stdbool.h>
00017 #include <stdint.h>
00018 
00019 /* @file
00020 * @brief Software controlled SPI Master driver.
00021 *
00022 *
00023 * @defgroup lib_driver_spi_master Software controlled SPI Master driver
00024 * @{
00025 * @ingroup nrf_drivers
00026 * @brief Software controlled SPI Master driver.
00027 *
00028 * Supported features:
00029 * - Operate two SPI masters independently or in parallel.
00030 * - Transmit and Receive given size of data through SPI.
00031 * - configure each SPI module separately through @ref spi_master_init.
00032 */
00033 
00034 /**
00035  *  SPI master operating frequency
00036  */
00037 typedef enum
00038 {
00039     Freq_125Kbps = 0,        /*!< drive SClk with frequency 125Kbps */
00040     Freq_250Kbps,            /*!< drive SClk with frequency 250Kbps */
00041     Freq_500Kbps,            /*!< drive SClk with frequency 500Kbps */
00042     Freq_1Mbps,              /*!< drive SClk with frequency 1Mbps */
00043     Freq_2Mbps,              /*!< drive SClk with frequency 2Mbps */
00044     Freq_4Mbps,              /*!< drive SClk with frequency 4Mbps */
00045     Freq_8Mbps               /*!< drive SClk with frequency 8Mbps */
00046 } SPIFrequency_t;
00047 
00048 /**
00049  *  SPI master module number
00050  */
00051 typedef enum
00052 {
00053     SPI0 = 0,               /*!< SPI module 0 */
00054     SPI1                    /*!< SPI module 1 */
00055 } SPIModuleNumber;
00056 
00057 /**
00058  *  SPI mode
00059  */
00060 typedef enum
00061 {
00062     //------------------------Clock polarity 0, Clock starts with level 0-------------------------------------------
00063     SPI_MODE0 = 0,          /*!< Sample data at rising edge of clock and shift serial data at falling edge */
00064     SPI_MODE1,              /*!< sample data at falling edge of clock and shift serial data at rising edge */
00065     //------------------------Clock polarity 1, Clock starts with level 1-------------------------------------------
00066     SPI_MODE2,              /*!< sample data at falling edge of clock and shift serial data at rising edge */
00067     SPI_MODE3               /*!< Sample data at rising edge of clock and shift serial data at falling edge */
00068 } SPIMode;
00069 
00070 #ifdef __cplusplus//Tsungta, 2015/10/04, added so spi_master.c can convert to cpp (mbed SPI)
00071 extern "C"
00072 {
00073 #endif
00074 /**
00075  * @brief Function for initializing given SPI master with given configuration.
00076  *
00077  * After initializing the given SPI master with given configuration, this function also test if the
00078  * SPI slave is responding with the configurations by transmitting few test bytes. If the slave did not
00079  * respond then error is returned and contents of the rx_data are invalid.
00080  *
00081  * @param module_number SPI master number (SPIModuleNumber) to initialize.
00082  * @param mode SPI master mode (mode 0, 1, 2 or 3 from SPIMode)
00083  * @param lsb_first true if lsb is first bit to shift in/out as serial data on MISO/MOSI pins.
00084  * @return
00085  * @retval pointer to direct physical address of the requested SPI module if init was successful
00086  * @retval 0, if either init failed or slave did not respond to the test transfer
00087  */
00088 uint32_t* spi_master_init(SPIModuleNumber module_number, SPIMode mode, bool lsb_first);
00089 
00090 /**
00091  * @brief Function for transferring/receiving data over SPI bus.
00092  *
00093  * If TWI master detects even one NACK from the slave or timeout occurs, STOP condition is issued
00094  * and the function returns false.
00095  *
00096  * @note Make sure at least transfer_size number of bytes is allocated in tx_data/rx_data.
00097  *
00098  * @param spi_base_address  register base address of the selected SPI master module
00099  * @param transfer_size  number of bytes to transmit/receive over SPI master
00100  * @param tx_data pointer to the data that needs to be transmitted
00101  * @param rx_data pointer to the data that needs to be received
00102  * @return
00103  * @retval true if transmit/reveive of transfer_size were completed.
00104  * @retval false if transmit/reveive of transfer_size were not complete and tx_data/rx_data points to invalid data.
00105  */
00106 //bool spi_master_tx_rx(uint32_t *spi_base_address, uint16_t transfer_size, const uint8_t *tx_data, uint8_t *rx_data);
00107 bool spi_master_tx_rx(SPIModuleNumber module_number, uint16_t transfer_size, const uint8_t *tx_data, uint8_t *rx_data);
00108 #ifdef __cplusplus
00109 }
00110 #endif
00111 /**
00112  *@}
00113  **/
00114  
00115 #endif /* SPI_MASTER_H */
00116 
00117