nm_bus_wrapper.h

00001 /**
00002  *
00003  * \file
00004  *
00005  * \brief This module contains NMC1000 bus wrapper APIs declarations.
00006  *
00007  * Copyright (c) 2016-2017 Atmel Corporation. All rights reserved.
00008  *
00009  * \asf_license_start
00010  *
00011  * \page License
00012  *
00013  * Redistribution and use in source and binary forms, with or without
00014  * modification, are permitted provided that the following conditions are met:
00015  *
00016  * 1. Redistributions of source code must retain the above copyright notice,
00017  *    this list of conditions and the following disclaimer.
00018  *
00019  * 2. Redistributions in binary form must reproduce the above copyright notice,
00020  *    this list of conditions and the following disclaimer in the documentation
00021  *    and/or other materials provided with the distribution.
00022  *
00023  * 3. The name of Atmel may not be used to endorse or promote products derived
00024  *    from this software without specific prior written permission.
00025  *
00026  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
00027  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
00028  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
00029  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
00030  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00031  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
00032  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
00033  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
00034  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
00035  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
00036  * POSSIBILITY OF SUCH DAMAGE.
00037  *
00038  * \asf_license_stop
00039  *
00040  */
00041 
00042 #ifndef _NM_BUS_WRAPPER_H_
00043 #define _NM_BUS_WRAPPER_H_
00044 
00045 #define USE_MBED_SPI_API    0
00046 
00047 #include "common/include/nm_common.h"
00048 
00049 /**
00050     BUS Type
00051 **/
00052 #define  NM_BUS_TYPE_I2C    ((uint8)0)
00053 #define  NM_BUS_TYPE_SPI    ((uint8)1)
00054 #define  NM_BUS_TYPE_UART   ((uint8)2)
00055 /**
00056     IOCTL commands
00057 **/
00058 #define NM_BUS_IOCTL_R          ((uint8)0)  /*!< Read only ==> I2C/UART. Parameter:tstrNmI2cDefault/tstrNmUartDefault */
00059 #define NM_BUS_IOCTL_W          ((uint8)1)  /*!< Write only ==> I2C/UART. Parameter type tstrNmI2cDefault/tstrNmUartDefault*/
00060 #define NM_BUS_IOCTL_W_SPECIAL  ((uint8)2)  /*!< Write two buffers within the same transaction
00061                                                 (same start/stop conditions) ==> I2C only. Parameter:tstrNmI2cSpecial */
00062 #define NM_BUS_IOCTL_RW         ((uint8)3)  /*!< Read/Write at the same time ==> SPI only. Parameter:tstrNmSpiRw */
00063 
00064 #define NM_BUS_IOCTL_WR_RESTART ((uint8)4)              /*!< Write buffer then made restart condition then read ==> I2C only. parameter:tstrNmI2cSpecial */
00065 /**
00066 *   @struct tstrNmBusCapabilities
00067 *   @brief  Structure holding bus capabilities information
00068 *   @sa NM_BUS_TYPE_I2C, NM_BUS_TYPE_SPI
00069 */
00070 typedef struct
00071 {
00072     uint16  u16MaxTrxSz ;    /*!< Maximum transfer size. Must be >= 16 bytes*/
00073 } tstrNmBusCapabilities;
00074 
00075 /**
00076 *   @struct tstrNmI2cDefault
00077 *   @brief  Structure holding I2C default operation parameters
00078 *   @sa     NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
00079 */
00080 typedef struct
00081 {
00082     uint8 u8SlaveAdr;
00083     uint8   *pu8Buf ;    /*!< Operation buffer */
00084     uint16  u16Sz ;      /*!< Operation size */
00085 } tstrNmI2cDefault;
00086 
00087 /**
00088 *   @struct tstrNmI2cSpecial
00089 *   @brief  Structure holding I2C special operation parameters
00090 *   @sa     NM_BUS_IOCTL_W_SPECIAL
00091 */
00092 typedef struct
00093 {
00094     uint8 u8SlaveAdr;
00095     uint8   *pu8Buf1 ;   /*!< pointer to the 1st buffer */
00096     uint8   *pu8Buf2 ;   /*!< pointer to the 2nd buffer */
00097     uint16  u16Sz1 ;     /*!< 1st buffer size */
00098     uint16  u16Sz2 ;     /*!< 2nd buffer size */
00099 } tstrNmI2cSpecial;
00100 
00101 /**
00102 *   @struct tstrNmSpiRw
00103 *   @brief  Structure holding SPI R/W parameters
00104 *   @sa     NM_BUS_IOCTL_RW
00105 */
00106 typedef struct
00107 {
00108     uint8   *pu8InBuf;      /*!< pointer to input buffer.
00109                             Can be set to null and in this case zeros should be sent at MOSI */
00110     uint8   *pu8OutBuf;     /*!< pointer to output buffer.
00111                             Can be set to null and in this case data from MISO can be ignored  */
00112     uint16  u16Sz ;          /*!< Transfere size */
00113 } tstrNmSpiRw;
00114 
00115 
00116 /**
00117 *   @struct tstrNmUartDefault
00118 *   @brief  Structure holding UART default operation parameters
00119 *   @sa     NM_BUS_IOCTL_R, NM_BUS_IOCTL_W
00120 */
00121 typedef struct
00122 {
00123     uint8   *pu8Buf ;    /*!< Operation buffer */
00124     uint16  u16Sz ;      /*!< Operation size */
00125 } tstrNmUartDefault;
00126 /*!< Bus capabilities. This structure must be declared at platform specific bus wrapper */
00127 extern tstrNmBusCapabilities egstrNmBusCapabilities;
00128 
00129 
00130 #ifdef __cplusplus
00131      extern "C" {
00132  #endif
00133 /**
00134 *   @fn     nm_bus_init
00135 *   @brief  Initialize the bus wrapper
00136 *   @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
00137 */
00138 sint8 nm_bus_init(void *);
00139 
00140 /**
00141 *   @fn     nm_bus_ioctl
00142 *   @brief  send/receive from the bus
00143 *   @param [in] u8Cmd
00144 *                   IOCTL command for the operation
00145 *   @param [in] pvParameter
00146 *                   Arbitrary parameter depending on IOCTL
00147 *   @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
00148 *   @note   For SPI only, it's important to be able to send/receive at the same time
00149 */
00150 sint8 nm_bus_ioctl(uint8 u8Cmd, void* pvParameter);
00151 
00152 /**
00153 *   @fn     nm_bus_deinit
00154 *   @brief  De-initialize the bus wrapper
00155 *   @return ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
00156 */
00157 sint8 nm_bus_deinit(void);
00158 
00159 /*
00160 *   @fn         nm_bus_reinit
00161 *   @brief      re-initialize the bus wrapper
00162 *   @param [in] void *config
00163 *                   re-init configuration data
00164 *   @return     ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
00165 */
00166 sint8 nm_bus_reinit(void *);
00167 /*
00168 *   @fn         nm_bus_get_chip_type
00169 *   @brief      get chip type
00170 *   @return     ZERO in case of success and M2M_ERR_BUS_FAIL in case of failure
00171 */
00172 #ifdef CONF_WINC_USE_UART
00173 uint8 nm_bus_get_chip_type(void);
00174 sint8 nm_bus_break(void);
00175 #endif
00176 #ifdef __cplusplus
00177      }
00178  #endif
00179 
00180 #endif  /*_NM_BUS_WRAPPER_H_*/
00181