File content as of revision 12:5790e56a056f:

#include "stm32f4xx.h" 

    // PA_1 is A of right
    // PA_0 is B of right
    // PA_5 is A of left
    // PB_3 is B of left

#define ALT_FUNC_MODE 0x03
//#define 
 
// set GPIO pins to alternate for the pins corresponding to A/B for eacah encoder, and 2 alternate function registers need to be selected for each type
// of alternate function specified
// 4 modes sets AHB1ENR
// Now TMR: enable clock with timer, APB1ENR
// set period, autoreload value, ARR value 2^32-1, CR1 - TMR resets itself, ARPE and EN
//
// Encoder mode: disable timer before changing timer to encoder
// CCMR1/2 1/2 depends on channel 1/2 or 3/4, depends on upper bits, depending which channels you use
// CCMR sets sample rate and set the channel to input
// CCER, which edge to trigger on, cannot be 11(not allowed for encoder mode), CCER for both channels
// SMCR - encoder mode
// CR1 reenabales
// then read CNT reg of timer