Mouse code for the MacroRat
mbed-dev/targets/TARGET_NXP/TARGET_LPC11U6X/sleep.c@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2013 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #include "sleep_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "mbed_interface.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | |
sahilmgandhi | 18:6a4db94011d3 | 20 | #if DEVICE_SLEEP |
sahilmgandhi | 18:6a4db94011d3 | 21 | |
sahilmgandhi | 18:6a4db94011d3 | 22 | void hal_sleep(void) { |
sahilmgandhi | 18:6a4db94011d3 | 23 | |
sahilmgandhi | 18:6a4db94011d3 | 24 | #if (DEVICE_SEMIHOST == 1) |
sahilmgandhi | 18:6a4db94011d3 | 25 | // ensure debug is disconnected |
sahilmgandhi | 18:6a4db94011d3 | 26 | mbed_interface_disconnect(); |
sahilmgandhi | 18:6a4db94011d3 | 27 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 28 | |
sahilmgandhi | 18:6a4db94011d3 | 29 | // PCON[PM] (bits 2:0) set to 0 |
sahilmgandhi | 18:6a4db94011d3 | 30 | LPC_PMU->PCON &= ~0x03; |
sahilmgandhi | 18:6a4db94011d3 | 31 | |
sahilmgandhi | 18:6a4db94011d3 | 32 | // SRC[SLEEPDEEP] set to 0 = sleep |
sahilmgandhi | 18:6a4db94011d3 | 33 | SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 34 | |
sahilmgandhi | 18:6a4db94011d3 | 35 | // wait for interrupt |
sahilmgandhi | 18:6a4db94011d3 | 36 | __WFI(); |
sahilmgandhi | 18:6a4db94011d3 | 37 | } |
sahilmgandhi | 18:6a4db94011d3 | 38 | |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | void hal_deepsleep(void) { |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | #if (DEVICE_SEMIHOST == 1) |
sahilmgandhi | 18:6a4db94011d3 | 43 | // ensure debug is disconnected |
sahilmgandhi | 18:6a4db94011d3 | 44 | mbed_interface_disconnect(); |
sahilmgandhi | 18:6a4db94011d3 | 45 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | // PCON[PM] (bits 2:0) set to 1 |
sahilmgandhi | 18:6a4db94011d3 | 48 | LPC_PMU->PCON &= ~0x03; |
sahilmgandhi | 18:6a4db94011d3 | 49 | LPC_PMU->PCON |= 0x01; |
sahilmgandhi | 18:6a4db94011d3 | 50 | |
sahilmgandhi | 18:6a4db94011d3 | 51 | //According to user manual it is kinda picky about reserved bits, so we follow that nicely |
sahilmgandhi | 18:6a4db94011d3 | 52 | //Keep WDOSC and BOD in same state as they are now during deepsleep |
sahilmgandhi | 18:6a4db94011d3 | 53 | LPC_SYSCON->PDSLEEPCFG = 0x00000037 | (LPC_SYSCON->PDRUNCFG & (0x00000048)); |
sahilmgandhi | 18:6a4db94011d3 | 54 | |
sahilmgandhi | 18:6a4db94011d3 | 55 | // Power up same as before powerdown |
sahilmgandhi | 18:6a4db94011d3 | 56 | LPC_SYSCON->PDAWAKECFG = LPC_SYSCON->PDRUNCFG; |
sahilmgandhi | 18:6a4db94011d3 | 57 | |
sahilmgandhi | 18:6a4db94011d3 | 58 | // All interrupts can wake |
sahilmgandhi | 18:6a4db94011d3 | 59 | LPC_SYSCON->STARTERP0 = 0xFF; |
sahilmgandhi | 18:6a4db94011d3 | 60 | LPC_SYSCON->STARTERP1 = 0xFFFFFFFF; |
sahilmgandhi | 18:6a4db94011d3 | 61 | |
sahilmgandhi | 18:6a4db94011d3 | 62 | // SRC[SLEEPDEEP] set to 1 = deep sleep |
sahilmgandhi | 18:6a4db94011d3 | 63 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 64 | |
sahilmgandhi | 18:6a4db94011d3 | 65 | // wait for interrupt |
sahilmgandhi | 18:6a4db94011d3 | 66 | __WFI(); |
sahilmgandhi | 18:6a4db94011d3 | 67 | } |
sahilmgandhi | 18:6a4db94011d3 | 68 | |
sahilmgandhi | 18:6a4db94011d3 | 69 | #endif |