Mouse code for the MacroRat
mbed-dev/platform/mbed_critical.c@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved |
sahilmgandhi | 18:6a4db94011d3 | 3 | * SPDX-License-Identifier: Apache-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 4 | * |
sahilmgandhi | 18:6a4db94011d3 | 5 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
sahilmgandhi | 18:6a4db94011d3 | 6 | * not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 7 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 8 | * |
sahilmgandhi | 18:6a4db94011d3 | 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 10 | * |
sahilmgandhi | 18:6a4db94011d3 | 11 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 12 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
sahilmgandhi | 18:6a4db94011d3 | 13 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 14 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 15 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 16 | */ |
sahilmgandhi | 18:6a4db94011d3 | 17 | |
sahilmgandhi | 18:6a4db94011d3 | 18 | /* Declare __STDC_LIMIT_MACROS so stdint.h defines UINT32_MAX when using C++ */ |
sahilmgandhi | 18:6a4db94011d3 | 19 | #define __STDC_LIMIT_MACROS |
sahilmgandhi | 18:6a4db94011d3 | 20 | #include "platform/mbed_critical.h" |
sahilmgandhi | 18:6a4db94011d3 | 21 | |
sahilmgandhi | 18:6a4db94011d3 | 22 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 23 | #include "platform/mbed_assert.h" |
sahilmgandhi | 18:6a4db94011d3 | 24 | #include "platform/mbed_toolchain.h" |
sahilmgandhi | 18:6a4db94011d3 | 25 | |
sahilmgandhi | 18:6a4db94011d3 | 26 | #define EXCLUSIVE_ACCESS (!defined (__CORTEX_M0) && !defined (__CORTEX_M0PLUS)) |
sahilmgandhi | 18:6a4db94011d3 | 27 | |
sahilmgandhi | 18:6a4db94011d3 | 28 | static volatile uint32_t interrupt_enable_counter = 0; |
sahilmgandhi | 18:6a4db94011d3 | 29 | static volatile bool critical_interrupts_disabled = false; |
sahilmgandhi | 18:6a4db94011d3 | 30 | |
sahilmgandhi | 18:6a4db94011d3 | 31 | bool core_util_are_interrupts_enabled(void) |
sahilmgandhi | 18:6a4db94011d3 | 32 | { |
sahilmgandhi | 18:6a4db94011d3 | 33 | #if defined(__CORTEX_A9) |
sahilmgandhi | 18:6a4db94011d3 | 34 | return ((__get_CPSR() & 0x80) == 0); |
sahilmgandhi | 18:6a4db94011d3 | 35 | #else |
sahilmgandhi | 18:6a4db94011d3 | 36 | return ((__get_PRIMASK() & 0x1) == 0); |
sahilmgandhi | 18:6a4db94011d3 | 37 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 38 | } |
sahilmgandhi | 18:6a4db94011d3 | 39 | |
sahilmgandhi | 18:6a4db94011d3 | 40 | MBED_WEAK void core_util_critical_section_enter(void) |
sahilmgandhi | 18:6a4db94011d3 | 41 | { |
sahilmgandhi | 18:6a4db94011d3 | 42 | bool interrupts_disabled = !core_util_are_interrupts_enabled(); |
sahilmgandhi | 18:6a4db94011d3 | 43 | __disable_irq(); |
sahilmgandhi | 18:6a4db94011d3 | 44 | |
sahilmgandhi | 18:6a4db94011d3 | 45 | /* Save the interrupt disabled state as it was prior to any nested critical section lock use */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | if (!interrupt_enable_counter) { |
sahilmgandhi | 18:6a4db94011d3 | 47 | critical_interrupts_disabled = interrupts_disabled; |
sahilmgandhi | 18:6a4db94011d3 | 48 | } |
sahilmgandhi | 18:6a4db94011d3 | 49 | |
sahilmgandhi | 18:6a4db94011d3 | 50 | /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts |
sahilmgandhi | 18:6a4db94011d3 | 51 | are enabled, then something has gone badly wrong thus assert an error. |
sahilmgandhi | 18:6a4db94011d3 | 52 | */ |
sahilmgandhi | 18:6a4db94011d3 | 53 | MBED_ASSERT(interrupt_enable_counter < UINT32_MAX); |
sahilmgandhi | 18:6a4db94011d3 | 54 | // FIXME |
sahilmgandhi | 18:6a4db94011d3 | 55 | #ifndef FEATURE_UVISOR |
sahilmgandhi | 18:6a4db94011d3 | 56 | if (interrupt_enable_counter > 0) { |
sahilmgandhi | 18:6a4db94011d3 | 57 | MBED_ASSERT(interrupts_disabled); |
sahilmgandhi | 18:6a4db94011d3 | 58 | } |
sahilmgandhi | 18:6a4db94011d3 | 59 | #else |
sahilmgandhi | 18:6a4db94011d3 | 60 | #warning "core_util_critical_section_enter needs fixing to work from unprivileged code" |
sahilmgandhi | 18:6a4db94011d3 | 61 | #endif /* FEATURE_UVISOR */ |
sahilmgandhi | 18:6a4db94011d3 | 62 | interrupt_enable_counter++; |
sahilmgandhi | 18:6a4db94011d3 | 63 | } |
sahilmgandhi | 18:6a4db94011d3 | 64 | |
sahilmgandhi | 18:6a4db94011d3 | 65 | MBED_WEAK void core_util_critical_section_exit(void) |
sahilmgandhi | 18:6a4db94011d3 | 66 | { |
sahilmgandhi | 18:6a4db94011d3 | 67 | /* If critical_section_enter has not previously been called, do nothing */ |
sahilmgandhi | 18:6a4db94011d3 | 68 | if (interrupt_enable_counter) { |
sahilmgandhi | 18:6a4db94011d3 | 69 | |
sahilmgandhi | 18:6a4db94011d3 | 70 | // FIXME |
sahilmgandhi | 18:6a4db94011d3 | 71 | #ifndef FEATURE_UVISOR |
sahilmgandhi | 18:6a4db94011d3 | 72 | bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | |
sahilmgandhi | 18:6a4db94011d3 | 74 | MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */ |
sahilmgandhi | 18:6a4db94011d3 | 75 | #else |
sahilmgandhi | 18:6a4db94011d3 | 76 | #warning "core_util_critical_section_exit needs fixing to work from unprivileged code" |
sahilmgandhi | 18:6a4db94011d3 | 77 | #endif /* FEATURE_UVISOR */ |
sahilmgandhi | 18:6a4db94011d3 | 78 | |
sahilmgandhi | 18:6a4db94011d3 | 79 | interrupt_enable_counter--; |
sahilmgandhi | 18:6a4db94011d3 | 80 | |
sahilmgandhi | 18:6a4db94011d3 | 81 | /* Only re-enable interrupts if we are exiting the last of the nested critical sections and |
sahilmgandhi | 18:6a4db94011d3 | 82 | interrupts were enabled on entry to the first critical section. |
sahilmgandhi | 18:6a4db94011d3 | 83 | */ |
sahilmgandhi | 18:6a4db94011d3 | 84 | if (!interrupt_enable_counter && !critical_interrupts_disabled) { |
sahilmgandhi | 18:6a4db94011d3 | 85 | __enable_irq(); |
sahilmgandhi | 18:6a4db94011d3 | 86 | } |
sahilmgandhi | 18:6a4db94011d3 | 87 | } |
sahilmgandhi | 18:6a4db94011d3 | 88 | } |
sahilmgandhi | 18:6a4db94011d3 | 89 | |
sahilmgandhi | 18:6a4db94011d3 | 90 | #if EXCLUSIVE_ACCESS |
sahilmgandhi | 18:6a4db94011d3 | 91 | |
sahilmgandhi | 18:6a4db94011d3 | 92 | /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */ |
sahilmgandhi | 18:6a4db94011d3 | 93 | #if defined (__CC_ARM) |
sahilmgandhi | 18:6a4db94011d3 | 94 | #pragma diag_suppress 3731 |
sahilmgandhi | 18:6a4db94011d3 | 95 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 96 | |
sahilmgandhi | 18:6a4db94011d3 | 97 | bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue) |
sahilmgandhi | 18:6a4db94011d3 | 98 | { |
sahilmgandhi | 18:6a4db94011d3 | 99 | uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr); |
sahilmgandhi | 18:6a4db94011d3 | 100 | if (currentValue != *expectedCurrentValue) { |
sahilmgandhi | 18:6a4db94011d3 | 101 | *expectedCurrentValue = currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 102 | __CLREX(); |
sahilmgandhi | 18:6a4db94011d3 | 103 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 104 | } |
sahilmgandhi | 18:6a4db94011d3 | 105 | |
sahilmgandhi | 18:6a4db94011d3 | 106 | return !__STREXB(desiredValue, (volatile uint8_t*)ptr); |
sahilmgandhi | 18:6a4db94011d3 | 107 | } |
sahilmgandhi | 18:6a4db94011d3 | 108 | |
sahilmgandhi | 18:6a4db94011d3 | 109 | bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue) |
sahilmgandhi | 18:6a4db94011d3 | 110 | { |
sahilmgandhi | 18:6a4db94011d3 | 111 | uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr); |
sahilmgandhi | 18:6a4db94011d3 | 112 | if (currentValue != *expectedCurrentValue) { |
sahilmgandhi | 18:6a4db94011d3 | 113 | *expectedCurrentValue = currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 114 | __CLREX(); |
sahilmgandhi | 18:6a4db94011d3 | 115 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 116 | } |
sahilmgandhi | 18:6a4db94011d3 | 117 | |
sahilmgandhi | 18:6a4db94011d3 | 118 | return !__STREXH(desiredValue, (volatile uint16_t*)ptr); |
sahilmgandhi | 18:6a4db94011d3 | 119 | } |
sahilmgandhi | 18:6a4db94011d3 | 120 | |
sahilmgandhi | 18:6a4db94011d3 | 121 | |
sahilmgandhi | 18:6a4db94011d3 | 122 | bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue) |
sahilmgandhi | 18:6a4db94011d3 | 123 | { |
sahilmgandhi | 18:6a4db94011d3 | 124 | uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr); |
sahilmgandhi | 18:6a4db94011d3 | 125 | if (currentValue != *expectedCurrentValue) { |
sahilmgandhi | 18:6a4db94011d3 | 126 | *expectedCurrentValue = currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 127 | __CLREX(); |
sahilmgandhi | 18:6a4db94011d3 | 128 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 129 | } |
sahilmgandhi | 18:6a4db94011d3 | 130 | |
sahilmgandhi | 18:6a4db94011d3 | 131 | return !__STREXW(desiredValue, (volatile uint32_t*)ptr); |
sahilmgandhi | 18:6a4db94011d3 | 132 | } |
sahilmgandhi | 18:6a4db94011d3 | 133 | |
sahilmgandhi | 18:6a4db94011d3 | 134 | uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 135 | { |
sahilmgandhi | 18:6a4db94011d3 | 136 | uint8_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 137 | do { |
sahilmgandhi | 18:6a4db94011d3 | 138 | newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta; |
sahilmgandhi | 18:6a4db94011d3 | 139 | } while (__STREXB(newValue, (volatile uint8_t*)valuePtr)); |
sahilmgandhi | 18:6a4db94011d3 | 140 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 141 | } |
sahilmgandhi | 18:6a4db94011d3 | 142 | |
sahilmgandhi | 18:6a4db94011d3 | 143 | uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 144 | { |
sahilmgandhi | 18:6a4db94011d3 | 145 | uint16_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 146 | do { |
sahilmgandhi | 18:6a4db94011d3 | 147 | newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta; |
sahilmgandhi | 18:6a4db94011d3 | 148 | } while (__STREXH(newValue, (volatile uint16_t*)valuePtr)); |
sahilmgandhi | 18:6a4db94011d3 | 149 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 150 | } |
sahilmgandhi | 18:6a4db94011d3 | 151 | |
sahilmgandhi | 18:6a4db94011d3 | 152 | uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 153 | { |
sahilmgandhi | 18:6a4db94011d3 | 154 | uint32_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 155 | do { |
sahilmgandhi | 18:6a4db94011d3 | 156 | newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta; |
sahilmgandhi | 18:6a4db94011d3 | 157 | } while (__STREXW(newValue, (volatile uint32_t*)valuePtr)); |
sahilmgandhi | 18:6a4db94011d3 | 158 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 159 | } |
sahilmgandhi | 18:6a4db94011d3 | 160 | |
sahilmgandhi | 18:6a4db94011d3 | 161 | |
sahilmgandhi | 18:6a4db94011d3 | 162 | uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 163 | { |
sahilmgandhi | 18:6a4db94011d3 | 164 | uint8_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 165 | do { |
sahilmgandhi | 18:6a4db94011d3 | 166 | newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta; |
sahilmgandhi | 18:6a4db94011d3 | 167 | } while (__STREXB(newValue, (volatile uint8_t*)valuePtr)); |
sahilmgandhi | 18:6a4db94011d3 | 168 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 169 | } |
sahilmgandhi | 18:6a4db94011d3 | 170 | |
sahilmgandhi | 18:6a4db94011d3 | 171 | uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 172 | { |
sahilmgandhi | 18:6a4db94011d3 | 173 | uint16_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 174 | do { |
sahilmgandhi | 18:6a4db94011d3 | 175 | newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta; |
sahilmgandhi | 18:6a4db94011d3 | 176 | } while (__STREXH(newValue, (volatile uint16_t*)valuePtr)); |
sahilmgandhi | 18:6a4db94011d3 | 177 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 178 | } |
sahilmgandhi | 18:6a4db94011d3 | 179 | |
sahilmgandhi | 18:6a4db94011d3 | 180 | uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 181 | { |
sahilmgandhi | 18:6a4db94011d3 | 182 | uint32_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 183 | do { |
sahilmgandhi | 18:6a4db94011d3 | 184 | newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta; |
sahilmgandhi | 18:6a4db94011d3 | 185 | } while (__STREXW(newValue, (volatile uint32_t*)valuePtr)); |
sahilmgandhi | 18:6a4db94011d3 | 186 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 187 | } |
sahilmgandhi | 18:6a4db94011d3 | 188 | |
sahilmgandhi | 18:6a4db94011d3 | 189 | #else |
sahilmgandhi | 18:6a4db94011d3 | 190 | |
sahilmgandhi | 18:6a4db94011d3 | 191 | bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue) |
sahilmgandhi | 18:6a4db94011d3 | 192 | { |
sahilmgandhi | 18:6a4db94011d3 | 193 | bool success; |
sahilmgandhi | 18:6a4db94011d3 | 194 | uint8_t currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 195 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 196 | currentValue = *ptr; |
sahilmgandhi | 18:6a4db94011d3 | 197 | if (currentValue == *expectedCurrentValue) { |
sahilmgandhi | 18:6a4db94011d3 | 198 | *ptr = desiredValue; |
sahilmgandhi | 18:6a4db94011d3 | 199 | success = true; |
sahilmgandhi | 18:6a4db94011d3 | 200 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 201 | *expectedCurrentValue = currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 202 | success = false; |
sahilmgandhi | 18:6a4db94011d3 | 203 | } |
sahilmgandhi | 18:6a4db94011d3 | 204 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 205 | return success; |
sahilmgandhi | 18:6a4db94011d3 | 206 | } |
sahilmgandhi | 18:6a4db94011d3 | 207 | |
sahilmgandhi | 18:6a4db94011d3 | 208 | bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue) |
sahilmgandhi | 18:6a4db94011d3 | 209 | { |
sahilmgandhi | 18:6a4db94011d3 | 210 | bool success; |
sahilmgandhi | 18:6a4db94011d3 | 211 | uint16_t currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 212 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 213 | currentValue = *ptr; |
sahilmgandhi | 18:6a4db94011d3 | 214 | if (currentValue == *expectedCurrentValue) { |
sahilmgandhi | 18:6a4db94011d3 | 215 | *ptr = desiredValue; |
sahilmgandhi | 18:6a4db94011d3 | 216 | success = true; |
sahilmgandhi | 18:6a4db94011d3 | 217 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 218 | *expectedCurrentValue = currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 219 | success = false; |
sahilmgandhi | 18:6a4db94011d3 | 220 | } |
sahilmgandhi | 18:6a4db94011d3 | 221 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 222 | return success; |
sahilmgandhi | 18:6a4db94011d3 | 223 | } |
sahilmgandhi | 18:6a4db94011d3 | 224 | |
sahilmgandhi | 18:6a4db94011d3 | 225 | |
sahilmgandhi | 18:6a4db94011d3 | 226 | bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue) |
sahilmgandhi | 18:6a4db94011d3 | 227 | { |
sahilmgandhi | 18:6a4db94011d3 | 228 | bool success; |
sahilmgandhi | 18:6a4db94011d3 | 229 | uint32_t currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 230 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 231 | currentValue = *ptr; |
sahilmgandhi | 18:6a4db94011d3 | 232 | if (currentValue == *expectedCurrentValue) { |
sahilmgandhi | 18:6a4db94011d3 | 233 | *ptr = desiredValue; |
sahilmgandhi | 18:6a4db94011d3 | 234 | success = true; |
sahilmgandhi | 18:6a4db94011d3 | 235 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 236 | *expectedCurrentValue = currentValue; |
sahilmgandhi | 18:6a4db94011d3 | 237 | success = false; |
sahilmgandhi | 18:6a4db94011d3 | 238 | } |
sahilmgandhi | 18:6a4db94011d3 | 239 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 240 | return success; |
sahilmgandhi | 18:6a4db94011d3 | 241 | } |
sahilmgandhi | 18:6a4db94011d3 | 242 | |
sahilmgandhi | 18:6a4db94011d3 | 243 | |
sahilmgandhi | 18:6a4db94011d3 | 244 | uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 245 | { |
sahilmgandhi | 18:6a4db94011d3 | 246 | uint8_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 247 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 248 | newValue = *valuePtr + delta; |
sahilmgandhi | 18:6a4db94011d3 | 249 | *valuePtr = newValue; |
sahilmgandhi | 18:6a4db94011d3 | 250 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 251 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 252 | } |
sahilmgandhi | 18:6a4db94011d3 | 253 | |
sahilmgandhi | 18:6a4db94011d3 | 254 | uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 255 | { |
sahilmgandhi | 18:6a4db94011d3 | 256 | uint16_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 257 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 258 | newValue = *valuePtr + delta; |
sahilmgandhi | 18:6a4db94011d3 | 259 | *valuePtr = newValue; |
sahilmgandhi | 18:6a4db94011d3 | 260 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 261 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 262 | } |
sahilmgandhi | 18:6a4db94011d3 | 263 | |
sahilmgandhi | 18:6a4db94011d3 | 264 | uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 265 | { |
sahilmgandhi | 18:6a4db94011d3 | 266 | uint32_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 267 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 268 | newValue = *valuePtr + delta; |
sahilmgandhi | 18:6a4db94011d3 | 269 | *valuePtr = newValue; |
sahilmgandhi | 18:6a4db94011d3 | 270 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 271 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 272 | } |
sahilmgandhi | 18:6a4db94011d3 | 273 | |
sahilmgandhi | 18:6a4db94011d3 | 274 | |
sahilmgandhi | 18:6a4db94011d3 | 275 | uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 276 | { |
sahilmgandhi | 18:6a4db94011d3 | 277 | uint8_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 278 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 279 | newValue = *valuePtr - delta; |
sahilmgandhi | 18:6a4db94011d3 | 280 | *valuePtr = newValue; |
sahilmgandhi | 18:6a4db94011d3 | 281 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 282 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 283 | } |
sahilmgandhi | 18:6a4db94011d3 | 284 | |
sahilmgandhi | 18:6a4db94011d3 | 285 | uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 286 | { |
sahilmgandhi | 18:6a4db94011d3 | 287 | uint16_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 288 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 289 | newValue = *valuePtr - delta; |
sahilmgandhi | 18:6a4db94011d3 | 290 | *valuePtr = newValue; |
sahilmgandhi | 18:6a4db94011d3 | 291 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 292 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 293 | } |
sahilmgandhi | 18:6a4db94011d3 | 294 | |
sahilmgandhi | 18:6a4db94011d3 | 295 | uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta) |
sahilmgandhi | 18:6a4db94011d3 | 296 | { |
sahilmgandhi | 18:6a4db94011d3 | 297 | uint32_t newValue; |
sahilmgandhi | 18:6a4db94011d3 | 298 | core_util_critical_section_enter(); |
sahilmgandhi | 18:6a4db94011d3 | 299 | newValue = *valuePtr - delta; |
sahilmgandhi | 18:6a4db94011d3 | 300 | *valuePtr = newValue; |
sahilmgandhi | 18:6a4db94011d3 | 301 | core_util_critical_section_exit(); |
sahilmgandhi | 18:6a4db94011d3 | 302 | return newValue; |
sahilmgandhi | 18:6a4db94011d3 | 303 | } |
sahilmgandhi | 18:6a4db94011d3 | 304 | |
sahilmgandhi | 18:6a4db94011d3 | 305 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 306 | |
sahilmgandhi | 18:6a4db94011d3 | 307 | |
sahilmgandhi | 18:6a4db94011d3 | 308 | bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) { |
sahilmgandhi | 18:6a4db94011d3 | 309 | return core_util_atomic_cas_u32( |
sahilmgandhi | 18:6a4db94011d3 | 310 | (uint32_t *)ptr, |
sahilmgandhi | 18:6a4db94011d3 | 311 | (uint32_t *)expectedCurrentValue, |
sahilmgandhi | 18:6a4db94011d3 | 312 | (uint32_t)desiredValue); |
sahilmgandhi | 18:6a4db94011d3 | 313 | } |
sahilmgandhi | 18:6a4db94011d3 | 314 | |
sahilmgandhi | 18:6a4db94011d3 | 315 | void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) { |
sahilmgandhi | 18:6a4db94011d3 | 316 | return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta); |
sahilmgandhi | 18:6a4db94011d3 | 317 | } |
sahilmgandhi | 18:6a4db94011d3 | 318 | |
sahilmgandhi | 18:6a4db94011d3 | 319 | void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) { |
sahilmgandhi | 18:6a4db94011d3 | 320 | return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta); |
sahilmgandhi | 18:6a4db94011d3 | 321 | } |
sahilmgandhi | 18:6a4db94011d3 | 322 |