MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/rtc/TARGET_SAMR21/rtc_count.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 * \file
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * \brief SAM RTC Driver (Count Mode)
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * \asf_license_start
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * \page License
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 13 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 14 *
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 19 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 20 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * 3. The name of Atmel may not be used to endorse or promote products derived
sahilmgandhi 18:6a4db94011d3 23 * from this software without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 24 *
sahilmgandhi 18:6a4db94011d3 25 * 4. This software may only be redistributed and used in connection with an
sahilmgandhi 18:6a4db94011d3 26 * Atmel microcontroller product.
sahilmgandhi 18:6a4db94011d3 27 *
sahilmgandhi 18:6a4db94011d3 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
sahilmgandhi 18:6a4db94011d3 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
sahilmgandhi 18:6a4db94011d3 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
sahilmgandhi 18:6a4db94011d3 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
sahilmgandhi 18:6a4db94011d3 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
sahilmgandhi 18:6a4db94011d3 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
sahilmgandhi 18:6a4db94011d3 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
sahilmgandhi 18:6a4db94011d3 38 * POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 39 *
sahilmgandhi 18:6a4db94011d3 40 * \asf_license_stop
sahilmgandhi 18:6a4db94011d3 41 *
sahilmgandhi 18:6a4db94011d3 42 */
sahilmgandhi 18:6a4db94011d3 43 /*
sahilmgandhi 18:6a4db94011d3 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
sahilmgandhi 18:6a4db94011d3 45 */
sahilmgandhi 18:6a4db94011d3 46 #include "rtc_count.h"
sahilmgandhi 18:6a4db94011d3 47 #include <gclk.h>
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 #if !defined(__DOXYGEN__)
sahilmgandhi 18:6a4db94011d3 50 struct rtc_module *_rtc_instance[RTC_INST_NUM];
sahilmgandhi 18:6a4db94011d3 51 #endif
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /**
sahilmgandhi 18:6a4db94011d3 54 * \brief Determines if the hardware module(s) are currently synchronizing to the bus.
sahilmgandhi 18:6a4db94011d3 55 *
sahilmgandhi 18:6a4db94011d3 56 * Checks to see if the underlying hardware peripheral module(s) are currently
sahilmgandhi 18:6a4db94011d3 57 * synchronizing across multiple clock domains to the hardware bus, This
sahilmgandhi 18:6a4db94011d3 58 * function can be used to delay further operations on a module until such time
sahilmgandhi 18:6a4db94011d3 59 * that it is ready, to prevent blocking delays for synchronization in the
sahilmgandhi 18:6a4db94011d3 60 * user application.
sahilmgandhi 18:6a4db94011d3 61 *
sahilmgandhi 18:6a4db94011d3 62 * \param[in] module RTC hardware module
sahilmgandhi 18:6a4db94011d3 63 *
sahilmgandhi 18:6a4db94011d3 64 * \return Synchronization status of the underlying hardware module(s).
sahilmgandhi 18:6a4db94011d3 65 *
sahilmgandhi 18:6a4db94011d3 66 * \retval true if the module synchronization is ongoing
sahilmgandhi 18:6a4db94011d3 67 * \retval false if the module has completed synchronization
sahilmgandhi 18:6a4db94011d3 68 */
sahilmgandhi 18:6a4db94011d3 69 static bool rtc_count_is_syncing(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 70 {
sahilmgandhi 18:6a4db94011d3 71 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 72 Assert(module);
sahilmgandhi 18:6a4db94011d3 73 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 if (rtc_module->MODE0.STATUS.reg & RTC_STATUS_SYNCBUSY) {
sahilmgandhi 18:6a4db94011d3 78 return true;
sahilmgandhi 18:6a4db94011d3 79 }
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 return false;
sahilmgandhi 18:6a4db94011d3 82 }
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 /**
sahilmgandhi 18:6a4db94011d3 85 * \brief Enables the RTC module.
sahilmgandhi 18:6a4db94011d3 86 *
sahilmgandhi 18:6a4db94011d3 87 * Enables the RTC module once it has been configured, ready for use. Most
sahilmgandhi 18:6a4db94011d3 88 * module configuration parameters cannot be altered while the module is enabled.
sahilmgandhi 18:6a4db94011d3 89 *
sahilmgandhi 18:6a4db94011d3 90 * \param[in,out] module RTC hardware module
sahilmgandhi 18:6a4db94011d3 91 */
sahilmgandhi 18:6a4db94011d3 92 void rtc_count_enable(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 93 {
sahilmgandhi 18:6a4db94011d3 94 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 95 Assert(module);
sahilmgandhi 18:6a4db94011d3 96 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 #if RTC_COUNT_ASYNC == true
sahilmgandhi 18:6a4db94011d3 101 system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_RTC);
sahilmgandhi 18:6a4db94011d3 102 #endif
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 105 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 106 }
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 /* Enable RTC module. */
sahilmgandhi 18:6a4db94011d3 109 rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_ENABLE;
sahilmgandhi 18:6a4db94011d3 110 }
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 /**
sahilmgandhi 18:6a4db94011d3 113 * \brief Disables the RTC module.
sahilmgandhi 18:6a4db94011d3 114 *
sahilmgandhi 18:6a4db94011d3 115 * Disables the RTC module.
sahilmgandhi 18:6a4db94011d3 116 *
sahilmgandhi 18:6a4db94011d3 117 * \param[in,out] module RTC hardware module
sahilmgandhi 18:6a4db94011d3 118 */
sahilmgandhi 18:6a4db94011d3 119 void rtc_count_disable(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 122 Assert(module);
sahilmgandhi 18:6a4db94011d3 123 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 #if RTC_COUNT_ASYNC == true
sahilmgandhi 18:6a4db94011d3 128 system_interrupt_disable(SYSTEM_INTERRUPT_MODULE_RTC);
sahilmgandhi 18:6a4db94011d3 129 #endif
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 132 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 133 }
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 /* Disable RTC module. */
sahilmgandhi 18:6a4db94011d3 136 rtc_module->MODE0.CTRL.reg &= ~RTC_MODE0_CTRL_ENABLE;
sahilmgandhi 18:6a4db94011d3 137 }
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 /**
sahilmgandhi 18:6a4db94011d3 140 * \brief Resets the RTC module.
sahilmgandhi 18:6a4db94011d3 141 * Resets the RTC to hardware defaults.
sahilmgandhi 18:6a4db94011d3 142 *
sahilmgandhi 18:6a4db94011d3 143 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 144 */
sahilmgandhi 18:6a4db94011d3 145 void rtc_count_reset(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 146 {
sahilmgandhi 18:6a4db94011d3 147 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 148 Assert(module);
sahilmgandhi 18:6a4db94011d3 149 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 /* Disable module before reset. */
sahilmgandhi 18:6a4db94011d3 154 rtc_count_disable(module);
sahilmgandhi 18:6a4db94011d3 155
sahilmgandhi 18:6a4db94011d3 156 #if RTC_COUNT_ASYNC == true
sahilmgandhi 18:6a4db94011d3 157 module->registered_callback = 0;
sahilmgandhi 18:6a4db94011d3 158 module->enabled_callback = 0;
sahilmgandhi 18:6a4db94011d3 159 #endif
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 162 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 163 }
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 /* Initiate software reset. */
sahilmgandhi 18:6a4db94011d3 166 rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_SWRST;
sahilmgandhi 18:6a4db94011d3 167 }
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 /**
sahilmgandhi 18:6a4db94011d3 170 * \internal Applies the given configuration.
sahilmgandhi 18:6a4db94011d3 171 *
sahilmgandhi 18:6a4db94011d3 172 * Sets the configurations given from the configuration structure to the
sahilmgandhi 18:6a4db94011d3 173 * hardware module.
sahilmgandhi 18:6a4db94011d3 174 *
sahilmgandhi 18:6a4db94011d3 175 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 176 * \param[in] config Pointer to the configuration structure.
sahilmgandhi 18:6a4db94011d3 177 *
sahilmgandhi 18:6a4db94011d3 178 * \return Status of the configuration procedure.
sahilmgandhi 18:6a4db94011d3 179 * \retval STATUS_OK RTC configurations was set successfully.
sahilmgandhi 18:6a4db94011d3 180 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given.
sahilmgandhi 18:6a4db94011d3 181 */
sahilmgandhi 18:6a4db94011d3 182 static enum status_code _rtc_count_set_config(
sahilmgandhi 18:6a4db94011d3 183 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 184 const struct rtc_count_config *const config)
sahilmgandhi 18:6a4db94011d3 185 {
sahilmgandhi 18:6a4db94011d3 186 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 187 Assert(module);
sahilmgandhi 18:6a4db94011d3 188 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 rtc_module->MODE0.CTRL.reg = RTC_MODE0_CTRL_MODE(0) | config->prescaler;
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /* Set mode and clear on match if applicable. */
sahilmgandhi 18:6a4db94011d3 195 switch (config->mode) {
sahilmgandhi 18:6a4db94011d3 196 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 197 /* Set 32bit mode and clear on match if applicable. */
sahilmgandhi 18:6a4db94011d3 198 rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MODE(0);
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200 /* Check if clear on compare match should be set. */
sahilmgandhi 18:6a4db94011d3 201 if (config->clear_on_match) {
sahilmgandhi 18:6a4db94011d3 202 /* Set clear on match. */
sahilmgandhi 18:6a4db94011d3 203 rtc_module->MODE0.CTRL.reg |= RTC_MODE0_CTRL_MATCHCLR;
sahilmgandhi 18:6a4db94011d3 204 }
sahilmgandhi 18:6a4db94011d3 205 /* Set compare values. */
sahilmgandhi 18:6a4db94011d3 206 for (uint8_t i = 0; i < RTC_NUM_OF_COMP32; i++) {
sahilmgandhi 18:6a4db94011d3 207 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 208 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 209 }
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 rtc_count_set_compare(module, config->compare_values[i],
sahilmgandhi 18:6a4db94011d3 212 (enum rtc_count_compare)i);
sahilmgandhi 18:6a4db94011d3 213 }
sahilmgandhi 18:6a4db94011d3 214 break;
sahilmgandhi 18:6a4db94011d3 215
sahilmgandhi 18:6a4db94011d3 216 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 217 /* Set 16bit mode. */
sahilmgandhi 18:6a4db94011d3 218 rtc_module->MODE1.CTRL.reg |= RTC_MODE1_CTRL_MODE(1);
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 /* Check if match on clear is set, and return invalid
sahilmgandhi 18:6a4db94011d3 221 * argument if set. */
sahilmgandhi 18:6a4db94011d3 222 if (config->clear_on_match) {
sahilmgandhi 18:6a4db94011d3 223 Assert(false);
sahilmgandhi 18:6a4db94011d3 224 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 225 }
sahilmgandhi 18:6a4db94011d3 226 /* Set compare values. */
sahilmgandhi 18:6a4db94011d3 227 for (uint8_t i = 0; i < RTC_NUM_OF_COMP16; i++) {
sahilmgandhi 18:6a4db94011d3 228 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 229 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 230 }
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 rtc_count_set_compare(module, config->compare_values[i],
sahilmgandhi 18:6a4db94011d3 233 (enum rtc_count_compare)i);
sahilmgandhi 18:6a4db94011d3 234 }
sahilmgandhi 18:6a4db94011d3 235 break;
sahilmgandhi 18:6a4db94011d3 236 default:
sahilmgandhi 18:6a4db94011d3 237 Assert(false);
sahilmgandhi 18:6a4db94011d3 238 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 239 }
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 /* Check to set continuously clock read update mode. */
sahilmgandhi 18:6a4db94011d3 242 if (config->continuously_update) {
sahilmgandhi 18:6a4db94011d3 243 /* Set continuously mode. */
sahilmgandhi 18:6a4db94011d3 244 rtc_module->MODE0.READREQ.reg |= RTC_READREQ_RCONT;
sahilmgandhi 18:6a4db94011d3 245 }
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 /* Return status OK if everything was configured. */
sahilmgandhi 18:6a4db94011d3 248 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 249 }
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 /**
sahilmgandhi 18:6a4db94011d3 252 * \brief Initializes the RTC module with given configurations.
sahilmgandhi 18:6a4db94011d3 253 *
sahilmgandhi 18:6a4db94011d3 254 * Initializes the module, setting up all given configurations to provide
sahilmgandhi 18:6a4db94011d3 255 * the desired functionality of the RTC.
sahilmgandhi 18:6a4db94011d3 256 *
sahilmgandhi 18:6a4db94011d3 257 * \param[out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 258 * \param[in] hw Pointer to hardware instance
sahilmgandhi 18:6a4db94011d3 259 * \param[in] config Pointer to the configuration structure
sahilmgandhi 18:6a4db94011d3 260 *
sahilmgandhi 18:6a4db94011d3 261 * \return Status of the initialization procedure.
sahilmgandhi 18:6a4db94011d3 262 * \retval STATUS_OK If the initialization was run stressfully
sahilmgandhi 18:6a4db94011d3 263 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were given
sahilmgandhi 18:6a4db94011d3 264 */
sahilmgandhi 18:6a4db94011d3 265 enum status_code rtc_count_init(
sahilmgandhi 18:6a4db94011d3 266 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 267 Rtc *const hw,
sahilmgandhi 18:6a4db94011d3 268 const struct rtc_count_config *const config)
sahilmgandhi 18:6a4db94011d3 269 {
sahilmgandhi 18:6a4db94011d3 270 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 271 Assert(module);
sahilmgandhi 18:6a4db94011d3 272 Assert(hw);
sahilmgandhi 18:6a4db94011d3 273 Assert(config);
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /* Initialize device instance */
sahilmgandhi 18:6a4db94011d3 276 module->hw = hw;
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 /* Turn on the digital interface clock */
sahilmgandhi 18:6a4db94011d3 279 system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, PM_APBAMASK_RTC);
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 /* Set up GCLK */
sahilmgandhi 18:6a4db94011d3 282 struct system_gclk_chan_config gclk_chan_conf;
sahilmgandhi 18:6a4db94011d3 283 system_gclk_chan_get_config_defaults(&gclk_chan_conf);
sahilmgandhi 18:6a4db94011d3 284 gclk_chan_conf.source_generator = GCLK_GENERATOR_2;
sahilmgandhi 18:6a4db94011d3 285 system_gclk_chan_set_config(RTC_GCLK_ID, &gclk_chan_conf);
sahilmgandhi 18:6a4db94011d3 286 system_gclk_chan_enable(RTC_GCLK_ID);
sahilmgandhi 18:6a4db94011d3 287
sahilmgandhi 18:6a4db94011d3 288 /* Reset module to hardware defaults. */
sahilmgandhi 18:6a4db94011d3 289 rtc_count_reset(module);
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 /* Save conf_struct internally for continued use. */
sahilmgandhi 18:6a4db94011d3 292 module->mode = config->mode;
sahilmgandhi 18:6a4db94011d3 293 module->continuously_update = config->continuously_update;
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 # if (RTC_INST_NUM == 1)
sahilmgandhi 18:6a4db94011d3 296 _rtc_instance[0] = module;
sahilmgandhi 18:6a4db94011d3 297 # else
sahilmgandhi 18:6a4db94011d3 298 /* Register this instance for callbacks*/
sahilmgandhi 18:6a4db94011d3 299 _rtc_instance[_rtc_get_inst_index(hw)] = module;
sahilmgandhi 18:6a4db94011d3 300 # endif
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 /* Set config and return status. */
sahilmgandhi 18:6a4db94011d3 303 return _rtc_count_set_config(module, config);
sahilmgandhi 18:6a4db94011d3 304 }
sahilmgandhi 18:6a4db94011d3 305
sahilmgandhi 18:6a4db94011d3 306 /**
sahilmgandhi 18:6a4db94011d3 307 * \brief Set the current count value to desired value.
sahilmgandhi 18:6a4db94011d3 308 *
sahilmgandhi 18:6a4db94011d3 309 * Sets the value of the counter to the specified value.
sahilmgandhi 18:6a4db94011d3 310 *
sahilmgandhi 18:6a4db94011d3 311 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 312 * \param[in] count_value The value to be set in count register
sahilmgandhi 18:6a4db94011d3 313 *
sahilmgandhi 18:6a4db94011d3 314 * \return Status of setting the register.
sahilmgandhi 18:6a4db94011d3 315 * \retval STATUS_OK If everything was executed correctly
sahilmgandhi 18:6a4db94011d3 316 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 317 */
sahilmgandhi 18:6a4db94011d3 318 enum status_code rtc_count_set_count(
sahilmgandhi 18:6a4db94011d3 319 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 320 const uint32_t count_value)
sahilmgandhi 18:6a4db94011d3 321 {
sahilmgandhi 18:6a4db94011d3 322 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 323 Assert(module);
sahilmgandhi 18:6a4db94011d3 324 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 325
sahilmgandhi 18:6a4db94011d3 326 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 327
sahilmgandhi 18:6a4db94011d3 328 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 329 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 330 }
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332 /* Set count according to mode */
sahilmgandhi 18:6a4db94011d3 333 switch(module->mode) {
sahilmgandhi 18:6a4db94011d3 334 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 335 /* Write value to register. */
sahilmgandhi 18:6a4db94011d3 336 rtc_module->MODE0.COUNT.reg = count_value;
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 break;
sahilmgandhi 18:6a4db94011d3 339
sahilmgandhi 18:6a4db94011d3 340 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 341 /* Check if 16-bit value is provided. */
sahilmgandhi 18:6a4db94011d3 342 if(count_value > 0xffff) {
sahilmgandhi 18:6a4db94011d3 343 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 344 }
sahilmgandhi 18:6a4db94011d3 345
sahilmgandhi 18:6a4db94011d3 346 /* Write value to register. */
sahilmgandhi 18:6a4db94011d3 347 rtc_module->MODE1.COUNT.reg = (uint32_t)count_value;
sahilmgandhi 18:6a4db94011d3 348
sahilmgandhi 18:6a4db94011d3 349 break;
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 default:
sahilmgandhi 18:6a4db94011d3 352 Assert(false);
sahilmgandhi 18:6a4db94011d3 353 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 354 }
sahilmgandhi 18:6a4db94011d3 355 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 356 }
sahilmgandhi 18:6a4db94011d3 357
sahilmgandhi 18:6a4db94011d3 358 /**
sahilmgandhi 18:6a4db94011d3 359 * \brief Get the current count value.
sahilmgandhi 18:6a4db94011d3 360 *
sahilmgandhi 18:6a4db94011d3 361 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 362 *
sahilmgandhi 18:6a4db94011d3 363 * Returns the current count value.
sahilmgandhi 18:6a4db94011d3 364 *
sahilmgandhi 18:6a4db94011d3 365 * \return The current counter value as a 32-bit unsigned integer.
sahilmgandhi 18:6a4db94011d3 366 */
sahilmgandhi 18:6a4db94011d3 367 uint32_t rtc_count_get_count(struct rtc_module *const module)
sahilmgandhi 18:6a4db94011d3 368 {
sahilmgandhi 18:6a4db94011d3 369 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 370 Assert(module);
sahilmgandhi 18:6a4db94011d3 371 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 374
sahilmgandhi 18:6a4db94011d3 375 /* Initialize return value. */
sahilmgandhi 18:6a4db94011d3 376 uint32_t ret_val;
sahilmgandhi 18:6a4db94011d3 377
sahilmgandhi 18:6a4db94011d3 378 /* Change of read method based on value of continuously_update value in
sahilmgandhi 18:6a4db94011d3 379 * the configuration structure. */
sahilmgandhi 18:6a4db94011d3 380 if(!(module->continuously_update)) {
sahilmgandhi 18:6a4db94011d3 381 /* Request read on count register. */
sahilmgandhi 18:6a4db94011d3 382 rtc_module->MODE0.READREQ.reg = RTC_READREQ_RREQ;
sahilmgandhi 18:6a4db94011d3 383
sahilmgandhi 18:6a4db94011d3 384 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 385 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 386 }
sahilmgandhi 18:6a4db94011d3 387 }
sahilmgandhi 18:6a4db94011d3 388
sahilmgandhi 18:6a4db94011d3 389 /* Read value based on mode. */
sahilmgandhi 18:6a4db94011d3 390 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 391 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 392 /* Return count value in 32-bit mode. */
sahilmgandhi 18:6a4db94011d3 393 ret_val = rtc_module->MODE0.COUNT.reg;
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 break;
sahilmgandhi 18:6a4db94011d3 396
sahilmgandhi 18:6a4db94011d3 397 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 398 /* Return count value in 16-bit mode. */
sahilmgandhi 18:6a4db94011d3 399 ret_val = (uint32_t)rtc_module->MODE1.COUNT.reg;
sahilmgandhi 18:6a4db94011d3 400
sahilmgandhi 18:6a4db94011d3 401 break;
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 default:
sahilmgandhi 18:6a4db94011d3 404 Assert(false);
sahilmgandhi 18:6a4db94011d3 405 /* Counter not initialized. Assume counter value 0.*/
sahilmgandhi 18:6a4db94011d3 406 ret_val = 0;
sahilmgandhi 18:6a4db94011d3 407 break;
sahilmgandhi 18:6a4db94011d3 408 }
sahilmgandhi 18:6a4db94011d3 409
sahilmgandhi 18:6a4db94011d3 410 return ret_val;
sahilmgandhi 18:6a4db94011d3 411 }
sahilmgandhi 18:6a4db94011d3 412
sahilmgandhi 18:6a4db94011d3 413 /**
sahilmgandhi 18:6a4db94011d3 414 * \brief Set the compare value for the specified compare.
sahilmgandhi 18:6a4db94011d3 415 *
sahilmgandhi 18:6a4db94011d3 416 * Sets the value specified by the implementer to the requested compare.
sahilmgandhi 18:6a4db94011d3 417 *
sahilmgandhi 18:6a4db94011d3 418 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 419 *
sahilmgandhi 18:6a4db94011d3 420 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 421 * \param[in] comp_value The value to be written to the compare
sahilmgandhi 18:6a4db94011d3 422 * \param[in] comp_index Index of the compare to set
sahilmgandhi 18:6a4db94011d3 423 *
sahilmgandhi 18:6a4db94011d3 424 * \return Status indicating if compare was successfully set.
sahilmgandhi 18:6a4db94011d3 425 * \retval STATUS_OK If compare was successfully set
sahilmgandhi 18:6a4db94011d3 426 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 427 * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode
sahilmgandhi 18:6a4db94011d3 428 */
sahilmgandhi 18:6a4db94011d3 429 enum status_code rtc_count_set_compare(
sahilmgandhi 18:6a4db94011d3 430 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 431 const uint32_t comp_value,
sahilmgandhi 18:6a4db94011d3 432 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 433 {
sahilmgandhi 18:6a4db94011d3 434 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 435 Assert(module);
sahilmgandhi 18:6a4db94011d3 436 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 437
sahilmgandhi 18:6a4db94011d3 438 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 439
sahilmgandhi 18:6a4db94011d3 440 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 441 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 442 }
sahilmgandhi 18:6a4db94011d3 443
sahilmgandhi 18:6a4db94011d3 444 /* Set compare values based on operation mode. */
sahilmgandhi 18:6a4db94011d3 445 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 446 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 447 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 448 if ((uint32_t)comp_index > RTC_NUM_OF_COMP32) {
sahilmgandhi 18:6a4db94011d3 449 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 450 }
sahilmgandhi 18:6a4db94011d3 451
sahilmgandhi 18:6a4db94011d3 452 /* Set compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 453 rtc_module->MODE0.COMP[comp_index].reg = comp_value;
sahilmgandhi 18:6a4db94011d3 454
sahilmgandhi 18:6a4db94011d3 455 break;
sahilmgandhi 18:6a4db94011d3 456
sahilmgandhi 18:6a4db94011d3 457 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 458 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 459 if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 460 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 461 }
sahilmgandhi 18:6a4db94011d3 462
sahilmgandhi 18:6a4db94011d3 463 /* Check that 16-bit value is provided. */
sahilmgandhi 18:6a4db94011d3 464 if (comp_value > 0xffff) {
sahilmgandhi 18:6a4db94011d3 465 Assert(false);
sahilmgandhi 18:6a4db94011d3 466 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 467 }
sahilmgandhi 18:6a4db94011d3 468
sahilmgandhi 18:6a4db94011d3 469 /* Set compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 470 rtc_module->MODE1.COMP[comp_index].reg = comp_value & 0xffff;
sahilmgandhi 18:6a4db94011d3 471
sahilmgandhi 18:6a4db94011d3 472 break;
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474 default:
sahilmgandhi 18:6a4db94011d3 475 Assert(false);
sahilmgandhi 18:6a4db94011d3 476 return STATUS_ERR_BAD_FORMAT;
sahilmgandhi 18:6a4db94011d3 477 }
sahilmgandhi 18:6a4db94011d3 478
sahilmgandhi 18:6a4db94011d3 479 /* Return status if everything is OK. */
sahilmgandhi 18:6a4db94011d3 480 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 481 }
sahilmgandhi 18:6a4db94011d3 482
sahilmgandhi 18:6a4db94011d3 483 /**
sahilmgandhi 18:6a4db94011d3 484 * \brief Get the current compare value of specified compare.
sahilmgandhi 18:6a4db94011d3 485 *
sahilmgandhi 18:6a4db94011d3 486 * Retrieves the current value of the specified compare.
sahilmgandhi 18:6a4db94011d3 487 *
sahilmgandhi 18:6a4db94011d3 488 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 489 *
sahilmgandhi 18:6a4db94011d3 490 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 491 * \param[out] comp_value Pointer to 32-bit integer that will be populated with
sahilmgandhi 18:6a4db94011d3 492 * the current compare value
sahilmgandhi 18:6a4db94011d3 493 * \param[in] comp_index Index of compare to check
sahilmgandhi 18:6a4db94011d3 494 *
sahilmgandhi 18:6a4db94011d3 495 * \return Status of the reading procedure.
sahilmgandhi 18:6a4db94011d3 496 * \retval STATUS_OK If the value was read correctly
sahilmgandhi 18:6a4db94011d3 497 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 498 * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode
sahilmgandhi 18:6a4db94011d3 499 */
sahilmgandhi 18:6a4db94011d3 500 enum status_code rtc_count_get_compare(
sahilmgandhi 18:6a4db94011d3 501 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 502 uint32_t *const comp_value,
sahilmgandhi 18:6a4db94011d3 503 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 504 {
sahilmgandhi 18:6a4db94011d3 505 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 506 Assert(module);
sahilmgandhi 18:6a4db94011d3 507 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 508
sahilmgandhi 18:6a4db94011d3 509 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 510
sahilmgandhi 18:6a4db94011d3 511 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 512 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 513 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 514 if ((uint32_t)comp_index > RTC_NUM_OF_COMP32) {
sahilmgandhi 18:6a4db94011d3 515 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 516 }
sahilmgandhi 18:6a4db94011d3 517
sahilmgandhi 18:6a4db94011d3 518 /* Get compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 519 *comp_value = rtc_module->MODE0.COMP[comp_index].reg;
sahilmgandhi 18:6a4db94011d3 520
sahilmgandhi 18:6a4db94011d3 521 break;
sahilmgandhi 18:6a4db94011d3 522
sahilmgandhi 18:6a4db94011d3 523 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 524 /* Check sanity of comp_index. */
sahilmgandhi 18:6a4db94011d3 525 if ((uint32_t)comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 526 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 527 }
sahilmgandhi 18:6a4db94011d3 528
sahilmgandhi 18:6a4db94011d3 529 /* Get compare value for COMP. */
sahilmgandhi 18:6a4db94011d3 530 *comp_value = (uint32_t)rtc_module->MODE1.COMP[comp_index].reg;
sahilmgandhi 18:6a4db94011d3 531
sahilmgandhi 18:6a4db94011d3 532 break;
sahilmgandhi 18:6a4db94011d3 533
sahilmgandhi 18:6a4db94011d3 534 default:
sahilmgandhi 18:6a4db94011d3 535 Assert(false);
sahilmgandhi 18:6a4db94011d3 536 return STATUS_ERR_BAD_FORMAT;
sahilmgandhi 18:6a4db94011d3 537 }
sahilmgandhi 18:6a4db94011d3 538 /* Return status showing everything is OK. */
sahilmgandhi 18:6a4db94011d3 539 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 540 }
sahilmgandhi 18:6a4db94011d3 541
sahilmgandhi 18:6a4db94011d3 542 /**
sahilmgandhi 18:6a4db94011d3 543 * \brief Retrieves the value of period.
sahilmgandhi 18:6a4db94011d3 544 *
sahilmgandhi 18:6a4db94011d3 545 * Retrieves the value of the period for the 16-bit mode counter.
sahilmgandhi 18:6a4db94011d3 546 *
sahilmgandhi 18:6a4db94011d3 547 * \note Only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 548 *
sahilmgandhi 18:6a4db94011d3 549 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 550 * \param[out] period_value Pointer to value for return argument
sahilmgandhi 18:6a4db94011d3 551 *
sahilmgandhi 18:6a4db94011d3 552 * \return Status of getting the period value.
sahilmgandhi 18:6a4db94011d3 553 * \retval STATUS_OK If the period value was read correctly
sahilmgandhi 18:6a4db94011d3 554 * \retval STATUS_ERR_UNSUPPORTED_DEV If incorrect mode was set
sahilmgandhi 18:6a4db94011d3 555 */
sahilmgandhi 18:6a4db94011d3 556 enum status_code rtc_count_get_period(
sahilmgandhi 18:6a4db94011d3 557 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 558 uint16_t *const period_value)
sahilmgandhi 18:6a4db94011d3 559 {
sahilmgandhi 18:6a4db94011d3 560 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 561 Assert(module);
sahilmgandhi 18:6a4db94011d3 562 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 563
sahilmgandhi 18:6a4db94011d3 564 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 565
sahilmgandhi 18:6a4db94011d3 566 /* Check that correct mode is set. */
sahilmgandhi 18:6a4db94011d3 567 if (module->mode != RTC_COUNT_MODE_16BIT) {
sahilmgandhi 18:6a4db94011d3 568 return STATUS_ERR_UNSUPPORTED_DEV;
sahilmgandhi 18:6a4db94011d3 569 }
sahilmgandhi 18:6a4db94011d3 570
sahilmgandhi 18:6a4db94011d3 571 /* Returns the value. */
sahilmgandhi 18:6a4db94011d3 572 *period_value = rtc_module->MODE1.PER.reg;
sahilmgandhi 18:6a4db94011d3 573
sahilmgandhi 18:6a4db94011d3 574 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 575 }
sahilmgandhi 18:6a4db94011d3 576
sahilmgandhi 18:6a4db94011d3 577 /**
sahilmgandhi 18:6a4db94011d3 578 * \brief Set the given value to the period.
sahilmgandhi 18:6a4db94011d3 579 *
sahilmgandhi 18:6a4db94011d3 580 * Sets the given value to the period.
sahilmgandhi 18:6a4db94011d3 581 *
sahilmgandhi 18:6a4db94011d3 582 * \note Only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 583 *
sahilmgandhi 18:6a4db94011d3 584 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 585 * \param[in] period_value The value to set to the period
sahilmgandhi 18:6a4db94011d3 586 *
sahilmgandhi 18:6a4db94011d3 587 * \return Status of setting the period value.
sahilmgandhi 18:6a4db94011d3 588 * \retval STATUS_OK If the period was set correctly
sahilmgandhi 18:6a4db94011d3 589 * \retval STATUS_ERR_UNSUPPORTED_DEV If module is not operated in 16-bit mode
sahilmgandhi 18:6a4db94011d3 590 */
sahilmgandhi 18:6a4db94011d3 591 enum status_code rtc_count_set_period(
sahilmgandhi 18:6a4db94011d3 592 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 593 const uint16_t period_value)
sahilmgandhi 18:6a4db94011d3 594 {
sahilmgandhi 18:6a4db94011d3 595 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 596 Assert(module);
sahilmgandhi 18:6a4db94011d3 597 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 598
sahilmgandhi 18:6a4db94011d3 599 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 600
sahilmgandhi 18:6a4db94011d3 601 /* Check that correct mode is set. */
sahilmgandhi 18:6a4db94011d3 602 if (module->mode != RTC_COUNT_MODE_16BIT) {
sahilmgandhi 18:6a4db94011d3 603 return STATUS_ERR_UNSUPPORTED_DEV;
sahilmgandhi 18:6a4db94011d3 604 }
sahilmgandhi 18:6a4db94011d3 605
sahilmgandhi 18:6a4db94011d3 606 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 607 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 608 }
sahilmgandhi 18:6a4db94011d3 609
sahilmgandhi 18:6a4db94011d3 610 /* Write value to register. */
sahilmgandhi 18:6a4db94011d3 611 rtc_module->MODE1.PER.reg = period_value;
sahilmgandhi 18:6a4db94011d3 612
sahilmgandhi 18:6a4db94011d3 613 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 614 }
sahilmgandhi 18:6a4db94011d3 615
sahilmgandhi 18:6a4db94011d3 616 /**
sahilmgandhi 18:6a4db94011d3 617 * \brief Check if RTC compare match has occurred.
sahilmgandhi 18:6a4db94011d3 618 *
sahilmgandhi 18:6a4db94011d3 619 * Checks the compare flag to see if a match has occurred. The compare flag is
sahilmgandhi 18:6a4db94011d3 620 * set when there is a compare match between counter and the compare.
sahilmgandhi 18:6a4db94011d3 621 *
sahilmgandhi 18:6a4db94011d3 622 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 623 *
sahilmgandhi 18:6a4db94011d3 624 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 625 * \param[in] comp_index Index of compare to check current flag
sahilmgandhi 18:6a4db94011d3 626 */
sahilmgandhi 18:6a4db94011d3 627 bool rtc_count_is_compare_match(
sahilmgandhi 18:6a4db94011d3 628 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 629 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 630 {
sahilmgandhi 18:6a4db94011d3 631 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 632 Assert(module);
sahilmgandhi 18:6a4db94011d3 633 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 634
sahilmgandhi 18:6a4db94011d3 635 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 636
sahilmgandhi 18:6a4db94011d3 637 /* Check sanity. */
sahilmgandhi 18:6a4db94011d3 638 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 639 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 640 /* Check sanity for 32-bit mode. */
sahilmgandhi 18:6a4db94011d3 641 if (comp_index > RTC_NUM_OF_COMP32) {
sahilmgandhi 18:6a4db94011d3 642 return false;
sahilmgandhi 18:6a4db94011d3 643 }
sahilmgandhi 18:6a4db94011d3 644
sahilmgandhi 18:6a4db94011d3 645 break;
sahilmgandhi 18:6a4db94011d3 646
sahilmgandhi 18:6a4db94011d3 647 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 648 /* Check sanity for 16-bit mode. */
sahilmgandhi 18:6a4db94011d3 649 if (comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 650 return false;
sahilmgandhi 18:6a4db94011d3 651 }
sahilmgandhi 18:6a4db94011d3 652
sahilmgandhi 18:6a4db94011d3 653 break;
sahilmgandhi 18:6a4db94011d3 654
sahilmgandhi 18:6a4db94011d3 655 default:
sahilmgandhi 18:6a4db94011d3 656 Assert(false);
sahilmgandhi 18:6a4db94011d3 657 return false;
sahilmgandhi 18:6a4db94011d3 658 }
sahilmgandhi 18:6a4db94011d3 659
sahilmgandhi 18:6a4db94011d3 660 /* Set status of INTFLAG as return argument. */
sahilmgandhi 18:6a4db94011d3 661 return (rtc_module->MODE0.INTFLAG.reg & (1 << comp_index)) ? true : false;
sahilmgandhi 18:6a4db94011d3 662 }
sahilmgandhi 18:6a4db94011d3 663
sahilmgandhi 18:6a4db94011d3 664 /**
sahilmgandhi 18:6a4db94011d3 665 * \brief Clears RTC compare match flag.
sahilmgandhi 18:6a4db94011d3 666 *
sahilmgandhi 18:6a4db94011d3 667 * Clears the compare flag. The compare flag is set when there is a compare
sahilmgandhi 18:6a4db94011d3 668 * match between the counter and the compare.
sahilmgandhi 18:6a4db94011d3 669 *
sahilmgandhi 18:6a4db94011d3 670 * \note Compare 4 and 5 are only available in 16-bit mode.
sahilmgandhi 18:6a4db94011d3 671 *
sahilmgandhi 18:6a4db94011d3 672 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 673 * \param[in] comp_index Index of compare to check current flag
sahilmgandhi 18:6a4db94011d3 674 *
sahilmgandhi 18:6a4db94011d3 675 * \return Status indicating if flag was successfully cleared.
sahilmgandhi 18:6a4db94011d3 676 * \retval STATUS_OK If flag was successfully cleared
sahilmgandhi 18:6a4db94011d3 677 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 678 * \retval STATUS_ERR_BAD_FORMAT If the module was not initialized in a mode
sahilmgandhi 18:6a4db94011d3 679 */
sahilmgandhi 18:6a4db94011d3 680 enum status_code rtc_count_clear_compare_match(
sahilmgandhi 18:6a4db94011d3 681 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 682 const enum rtc_count_compare comp_index)
sahilmgandhi 18:6a4db94011d3 683 {
sahilmgandhi 18:6a4db94011d3 684 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 685 Assert(module);
sahilmgandhi 18:6a4db94011d3 686 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 687
sahilmgandhi 18:6a4db94011d3 688 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 689
sahilmgandhi 18:6a4db94011d3 690 /* Check sanity. */
sahilmgandhi 18:6a4db94011d3 691 switch (module->mode) {
sahilmgandhi 18:6a4db94011d3 692 case RTC_COUNT_MODE_32BIT:
sahilmgandhi 18:6a4db94011d3 693 /* Check sanity for 32-bit mode. */
sahilmgandhi 18:6a4db94011d3 694 if (comp_index > RTC_NUM_OF_COMP32) {
sahilmgandhi 18:6a4db94011d3 695 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 696 }
sahilmgandhi 18:6a4db94011d3 697
sahilmgandhi 18:6a4db94011d3 698 break;
sahilmgandhi 18:6a4db94011d3 699
sahilmgandhi 18:6a4db94011d3 700 case RTC_COUNT_MODE_16BIT:
sahilmgandhi 18:6a4db94011d3 701 /* Check sanity for 16-bit mode. */
sahilmgandhi 18:6a4db94011d3 702 if (comp_index > RTC_NUM_OF_COMP16) {
sahilmgandhi 18:6a4db94011d3 703 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 704 }
sahilmgandhi 18:6a4db94011d3 705
sahilmgandhi 18:6a4db94011d3 706 break;
sahilmgandhi 18:6a4db94011d3 707
sahilmgandhi 18:6a4db94011d3 708 default:
sahilmgandhi 18:6a4db94011d3 709 Assert(false);
sahilmgandhi 18:6a4db94011d3 710 return STATUS_ERR_BAD_FORMAT;
sahilmgandhi 18:6a4db94011d3 711 }
sahilmgandhi 18:6a4db94011d3 712
sahilmgandhi 18:6a4db94011d3 713 /* Clear INTFLAG. */
sahilmgandhi 18:6a4db94011d3 714 rtc_module->MODE0.INTFLAG.reg = RTC_MODE1_INTFLAG_CMP(1 << comp_index);
sahilmgandhi 18:6a4db94011d3 715
sahilmgandhi 18:6a4db94011d3 716 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 717 }
sahilmgandhi 18:6a4db94011d3 718
sahilmgandhi 18:6a4db94011d3 719 /**
sahilmgandhi 18:6a4db94011d3 720 * \brief Calibrate for too-slow or too-fast oscillator.
sahilmgandhi 18:6a4db94011d3 721 *
sahilmgandhi 18:6a4db94011d3 722 * When used, the RTC will compensate for an inaccurate oscillator. The
sahilmgandhi 18:6a4db94011d3 723 * RTC module will add or subtract cycles from the RTC prescaler to adjust the
sahilmgandhi 18:6a4db94011d3 724 * frequency in approximately 1 PPM steps. The provided correction value should
sahilmgandhi 18:6a4db94011d3 725 * be between 0 and 127, allowing for a maximum 127 PPM correction.
sahilmgandhi 18:6a4db94011d3 726 *
sahilmgandhi 18:6a4db94011d3 727 * If no correction is needed, set value to zero.
sahilmgandhi 18:6a4db94011d3 728 *
sahilmgandhi 18:6a4db94011d3 729 * \note Can only be used when the RTC is operated in 1Hz.
sahilmgandhi 18:6a4db94011d3 730 *
sahilmgandhi 18:6a4db94011d3 731 * \param[in,out] module Pointer to the software instance struct
sahilmgandhi 18:6a4db94011d3 732 * \param[in] value Ranging from -127 to 127 used for the correction
sahilmgandhi 18:6a4db94011d3 733 *
sahilmgandhi 18:6a4db94011d3 734 * \return Status of the calibration procedure.
sahilmgandhi 18:6a4db94011d3 735 * \retval STATUS_OK If calibration was executed correctly
sahilmgandhi 18:6a4db94011d3 736 * \retval STATUS_ERR_INVALID_ARG If invalid argument(s) were provided
sahilmgandhi 18:6a4db94011d3 737 */
sahilmgandhi 18:6a4db94011d3 738 enum status_code rtc_count_frequency_correction(
sahilmgandhi 18:6a4db94011d3 739 struct rtc_module *const module,
sahilmgandhi 18:6a4db94011d3 740 const int8_t value)
sahilmgandhi 18:6a4db94011d3 741 {
sahilmgandhi 18:6a4db94011d3 742 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 743 Assert(module);
sahilmgandhi 18:6a4db94011d3 744 Assert(module->hw);
sahilmgandhi 18:6a4db94011d3 745
sahilmgandhi 18:6a4db94011d3 746 Rtc *const rtc_module = module->hw;
sahilmgandhi 18:6a4db94011d3 747
sahilmgandhi 18:6a4db94011d3 748 /* Check if valid argument. */
sahilmgandhi 18:6a4db94011d3 749 if (abs(value) > 0x7F) {
sahilmgandhi 18:6a4db94011d3 750 /* Value bigger than allowed, return invalid argument. */
sahilmgandhi 18:6a4db94011d3 751 return STATUS_ERR_INVALID_ARG;
sahilmgandhi 18:6a4db94011d3 752 }
sahilmgandhi 18:6a4db94011d3 753
sahilmgandhi 18:6a4db94011d3 754 uint32_t new_correction_value;
sahilmgandhi 18:6a4db94011d3 755
sahilmgandhi 18:6a4db94011d3 756 /* Load the new correction value as a positive value, sign added later */
sahilmgandhi 18:6a4db94011d3 757 new_correction_value = abs(value);
sahilmgandhi 18:6a4db94011d3 758
sahilmgandhi 18:6a4db94011d3 759 /* Convert to positive value and adjust register sign bit. */
sahilmgandhi 18:6a4db94011d3 760 if (value < 0) {
sahilmgandhi 18:6a4db94011d3 761 new_correction_value |= RTC_FREQCORR_SIGN;
sahilmgandhi 18:6a4db94011d3 762 }
sahilmgandhi 18:6a4db94011d3 763
sahilmgandhi 18:6a4db94011d3 764 while (rtc_count_is_syncing(module)) {
sahilmgandhi 18:6a4db94011d3 765 /* Wait for synchronization */
sahilmgandhi 18:6a4db94011d3 766 }
sahilmgandhi 18:6a4db94011d3 767
sahilmgandhi 18:6a4db94011d3 768 /* Set value. */
sahilmgandhi 18:6a4db94011d3 769 rtc_module->MODE0.FREQCORR.reg = new_correction_value;
sahilmgandhi 18:6a4db94011d3 770
sahilmgandhi 18:6a4db94011d3 771 return STATUS_OK;
sahilmgandhi 18:6a4db94011d3 772 }
sahilmgandhi 18:6a4db94011d3 773