DCS_TEAM / GSM_PUSHING_BOX_STATE_MACHINE

uses pushing box to publish to google spreadsheets with a state machine instead of a while loop

Fork of GSM_Library by DCS_TEAM

GSMLibrary.cpp@22:a5adf9331032, 2015-03-24 (annotated)

Committer:
danilob
Date:
Tue Mar 24 17:57:22 2015 +0000
Revision:
22:a5adf9331032
Parent:
21:fbde9d2fc0ed
Child:
23:5227fb014aad
fiux buffer size

Who changed what in which revision?

UserRevisionLine numberNew contents of line
danilob 0:41904adca656 1 #include "GSMLibrary.h"
danilob 0:41904adca656 2 #include "gsmqueue.h"
danilob 2:8352ad91f2ee 3 #include <string.h>
danilob 0:41904adca656 4
danilob 15:19ae032e2e54 5 #define TIME_CONST .3
danilob 15:19ae032e2e54 6 #define SECONDS_TIMEOUT 40
danilob 15:19ae032e2e54 7 #define TIMEOUTLIMIT SECONDS_TIMEOUT/TIME_CONST //$change check with main code this will set up condition fior timeout.
danilob 0:41904adca656 8
danilob 0:41904adca656 9 //definition for AT comands
danilob 0:41904adca656 10 #define AT_OK "AT"
danilob 0:41904adca656 11 #define AT_CSQ "AT+CSQ"
danilob 0:41904adca656 12 #define AT_CREG "AT+CREG?"
danilob 0:41904adca656 13 #define AT_CMGF "AT+CMGF=1"
bjcrofts 21:fbde9d2fc0ed 14 #define RECEIVER_PHONE_NUMBER "\"+12083608384\""
danilob 0:41904adca656 15 #define AT_CMGS "AT+CMGS=" RECEIVER_PHONE_NUMBER
danilob 15:19ae032e2e54 16 #define MESSAGE_BODY "stress test\32\32"
danilob 22:a5adf9331032 17
danilob 0:41904adca656 18
es_marble 16:6807d437cd48 19 //Definition for AT repsonses
danilob 0:41904adca656 20 //Please notice that after ":" the gsm will usually send aditional information
danilob 0:41904adca656 21 #define AT_OK_RESPONSE "OK" //Response after sending "AT" message
es_marble 6:3ccc86304c2c 22 #define AT_CSQ_RESPONSE "+CSQ:" //+CSQ: <arg1>,<arg2> where <arg1> is signal strength arg1 = 0-30 where a number below 10 means low signal strength and 99 is not knwn or detectable signal and arg2 is bit error rate form 0-7, 99 will represent error
danilob 13:9ac5ff131214 23 #define AT_CREG_RESPONSE "+CREG:"//+CREG: <arg1>,<arg2> where <arg1> = 0-2(see AT command descriptions), <arg2> = 0-5, 0 not registered to nework and not looking for one. 1 is conected to network, 2 is not conected but searching
danilob 0:41904adca656 24 #define AT_CMGF_RESPONSE "OK"
danilob 14:56a2c371ce18 25 #define AT_CMGS_RESPONSE ">" //Message is written aftersymbol
danilob 15:19ae032e2e54 26 #define AT_SENDSMS_RESPONSE ">" // +CMGS: <id> this will include the message id. CMGS ERROR for error and
danilob 17:360afa1e6809 27 #define AT_SUCCESS_RESPONSE "+CMGS:"
danilob 0:41904adca656 28
es_marble 16:6807d437cd48 29 //External variables
danilob 0:41904adca656 30 extern Serial pc;
danilob 0:41904adca656 31 extern Serial gsm;
danilob 0:41904adca656 32 extern uint8_t buffer[BUFFER_LENGTH];//buffer storing char
es_marble 16:6807d437cd48 33
es_marble 16:6807d437cd48 34 //Internal variables
danilob 0:41904adca656 35 gsm_states gsm_current_state = GSM_INITIALIZE;
danilob 0:41904adca656 36 char send = 0;
danilob 12:f3ccc43c4d3c 37 int timeout_count = 0;
es_marble 18:7642909bfcfc 38 char gsm_msg[MSG_SIZE + 1]; //1 extra for Ctrl+Z
danilob 0:41904adca656 39
es_marble 16:6807d437cd48 40 void gsm_tick()
es_marble 16:6807d437cd48 41 {
es_marble 16:6807d437cd48 42 if (getGSMIdleBit() || gsm_timeOut() || (send && gsm_current_state == GSM_INITIALIZE)) //question with send...
es_marble 16:6807d437cd48 43 {
es_marble 16:6807d437cd48 44 resetGSMIdleBit(); //reset GSM idle bit
es_marble 16:6807d437cd48 45 gsm_nextStateLogic(); //Next state
es_marble 16:6807d437cd48 46 gsm_mealyOutputs(); //Mealy outputs
es_marble 16:6807d437cd48 47 flushQueue(); //Flush the queue
es_marble 16:6807d437cd48 48 }
es_marble 16:6807d437cd48 49 }
es_marble 16:6807d437cd48 50
es_marble 16:6807d437cd48 51
es_marble 16:6807d437cd48 52
es_marble 16:6807d437cd48 53 //Advance timeout counter; if timeout, return true
es_marble 16:6807d437cd48 54 bool gsm_timeOut()
es_marble 16:6807d437cd48 55 {
es_marble 16:6807d437cd48 56 if(++timeout_count >= TIMEOUTLIMIT){
danilob 15:19ae032e2e54 57 timeout_count=0;
danilob 15:19ae032e2e54 58 gsm_current_state = GSM_INITIALIZE;
es_marble 16:6807d437cd48 59 return true;
danilob 15:19ae032e2e54 60 }
es_marble 16:6807d437cd48 61 else
es_marble 16:6807d437cd48 62 return false;
es_marble 16:6807d437cd48 63 }
es_marble 16:6807d437cd48 64
es_marble 18:7642909bfcfc 65 //Have the GSM send a message
es_marble 18:7642909bfcfc 66 void gsm_send_sms(char msg[])
es_marble 18:7642909bfcfc 67 {
es_marble 18:7642909bfcfc 68 send = 1;
es_marble 18:7642909bfcfc 69 strcpy(gsm_msg,msg); //If we need to optimize later we can do that, but this is more robust
es_marble 18:7642909bfcfc 70 strcat(gsm_msg,"\x1A");
es_marble 18:7642909bfcfc 71 }
es_marble 18:7642909bfcfc 72
es_marble 18:7642909bfcfc 73 //Return true if gsm is ready
es_marble 18:7642909bfcfc 74 bool gsm_ready()
es_marble 18:7642909bfcfc 75 {
danilob 19:a442b5a0116f 76 return (send == 0) ? true : false;
es_marble 18:7642909bfcfc 77 }
es_marble 18:7642909bfcfc 78
es_marble 18:7642909bfcfc 79 //Reset the gsm
es_marble 18:7642909bfcfc 80 void gsm_reset()
es_marble 18:7642909bfcfc 81 {
es_marble 18:7642909bfcfc 82 gsm_current_state = GSM_INITIALIZE;
es_marble 18:7642909bfcfc 83 }
es_marble 18:7642909bfcfc 84
es_marble 16:6807d437cd48 85 //Next state logic -----------------------------------------------------
es_marble 16:6807d437cd48 86 void gsm_nextStateLogic()
es_marble 16:6807d437cd48 87 {
es_marble 16:6807d437cd48 88 printQueue(); //$debug
es_marble 16:6807d437cd48 89
es_marble 16:6807d437cd48 90 switch(gsm_current_state)
es_marble 16:6807d437cd48 91 {
danilob 0:41904adca656 92 case GSM_INITIALIZE:
es_marble 16:6807d437cd48 93 pc.printf("gsm_initialize state\r\n");//&debug
danilob 2:8352ad91f2ee 94 timeout_count = 0;
es_marble 16:6807d437cd48 95 if (send)
es_marble 16:6807d437cd48 96 gsm_current_state = GSM_AT_OK; //unconditional (check it)
danilob 0:41904adca656 97 break;
danilob 0:41904adca656 98 case GSM_AT_OK:
danilob 12:f3ccc43c4d3c 99 pc.printf("inside AT_OK state\r\n");//&debug
es_marble 16:6807d437cd48 100 if (findInQueue(AT_OK_RESPONSE))
es_marble 16:6807d437cd48 101 gsm_current_state = GSM_AT_CSQ;
danilob 12:f3ccc43c4d3c 102 break;
danilob 12:f3ccc43c4d3c 103 case GSM_AT_CSQ:
danilob 12:f3ccc43c4d3c 104 pc.printf("inside AT_CSQ state \r\n");//&debug
es_marble 16:6807d437cd48 105 if(findInQueue(AT_CSQ_RESPONSE))
es_marble 16:6807d437cd48 106 gsm_current_state = GSM_AT_CREG;
danilob 2:8352ad91f2ee 107 break;
danilob 0:41904adca656 108 case GSM_AT_CREG:
danilob 7:6c0b6ab3cafe 109 pc.printf("gsm_creg state\r\n");//&debug
es_marble 16:6807d437cd48 110 if(findInQueue(AT_CREG_RESPONSE))
es_marble 16:6807d437cd48 111 {
es_marble 16:6807d437cd48 112 pc.printf("creg parse Int1: %d\r\n",parseInt());//&debug
es_marble 16:6807d437cd48 113 int q = parseInt();
es_marble 16:6807d437cd48 114 pc.printf("creg parse Int2: %d\r\n",q);//&debug
es_marble 16:6807d437cd48 115 if(q == 1)
es_marble 16:6807d437cd48 116 gsm_current_state = GSM_AT_CMGF;
danilob 12:f3ccc43c4d3c 117 }
danilob 0:41904adca656 118 break;
danilob 0:41904adca656 119 case GSM_AT_CMGF:
danilob 12:f3ccc43c4d3c 120 pc.printf("gsm_cmgf state\r\n");//&debug
es_marble 16:6807d437cd48 121 if(findInQueue(AT_CMGF_RESPONSE))
es_marble 16:6807d437cd48 122 gsm_current_state = GSM_AT_CMGS;
danilob 0:41904adca656 123 break;
danilob 0:41904adca656 124 case GSM_AT_CMGS:
es_marble 16:6807d437cd48 125 pc.printf("gsm_cmgs state\r\n");//&debug
es_marble 16:6807d437cd48 126 if(findInQueue(AT_CMGS_RESPONSE))
es_marble 16:6807d437cd48 127 gsm_current_state = GSM_AT_SENDSMS;
danilob 0:41904adca656 128 break;
danilob 0:41904adca656 129 case GSM_AT_SENDSMS:
danilob 12:f3ccc43c4d3c 130 pc.printf("gsm_send_sms state\r\n");//&debug
es_marble 18:7642909bfcfc 131 if(findInQueue(AT_SENDSMS_RESPONSE)) //>
es_marble 18:7642909bfcfc 132 {
es_marble 18:7642909bfcfc 133 //Check if the "successfully sent" has also already been received (most likely
es_marble 18:7642909bfcfc 134 //this won't be the case, but if it has been >500 ms there's a possibility
es_marble 18:7642909bfcfc 135 //we've received both the messages during the same call to our state machine.)
es_marble 18:7642909bfcfc 136 if(findInQueue(AT_SUCCESS_RESPONSE))
es_marble 18:7642909bfcfc 137 {
es_marble 18:7642909bfcfc 138 pc.printf("Message SENT! msgID: %iY\r\n",parseInt());//&debug
es_marble 18:7642909bfcfc 139 send = 0;
es_marble 18:7642909bfcfc 140 gsm_current_state = GSM_INITIALIZE; //Skip success state (we've received both)
es_marble 18:7642909bfcfc 141 }
es_marble 18:7642909bfcfc 142 else
es_marble 18:7642909bfcfc 143 gsm_current_state = GSM_SUCCESS; //Go to success state
es_marble 18:7642909bfcfc 144 }
es_marble 16:6807d437cd48 145 else
es_marble 18:7642909bfcfc 146 gsm_current_state = GSM_AT_CMGS; //Try resending the message (until timeout)
danilob 0:41904adca656 147 break;
danilob 0:41904adca656 148 case GSM_SUCCESS:
danilob 7:6c0b6ab3cafe 149 pc.printf("gsm_success state\r\n");//&debug
es_marble 18:7642909bfcfc 150 if(findInQueue(AT_SUCCESS_RESPONSE))
es_marble 18:7642909bfcfc 151 {
es_marble 16:6807d437cd48 152 pc.printf("Message SENT! msgID: %iY\r\n",parseInt());//&debug
es_marble 18:7642909bfcfc 153 }
es_marble 18:7642909bfcfc 154 send = 0;
es_marble 18:7642909bfcfc 155 gsm_current_state = GSM_INITIALIZE; //We will restart regardless of whether it worked
danilob 0:41904adca656 156 break;
danilob 0:41904adca656 157 default:
danilob 0:41904adca656 158 pc.printf("This is a state error");
danilob 0:41904adca656 159 }
danilob 0:41904adca656 160 }
es_marble 16:6807d437cd48 161
es_marble 16:6807d437cd48 162 //Mealy output logic ------------------------------------------------------
es_marble 16:6807d437cd48 163 void gsm_mealyOutputs()
es_marble 16:6807d437cd48 164 {
es_marble 16:6807d437cd48 165 switch(gsm_current_state)
es_marble 16:6807d437cd48 166 {
es_marble 16:6807d437cd48 167 case GSM_INITIALIZE:
es_marble 16:6807d437cd48 168 pc.printf("No Mealy initialize state output\r\n");//&debug
es_marble 16:6807d437cd48 169 break;
es_marble 16:6807d437cd48 170 case GSM_AT_OK:
es_marble 16:6807d437cd48 171 pc.printf("sending AT_OK\r\n");//&debug
es_marble 16:6807d437cd48 172 gsm.puts(AT_OK);
es_marble 16:6807d437cd48 173 gsm.puts("\r\n");
es_marble 16:6807d437cd48 174 break;
es_marble 16:6807d437cd48 175 case GSM_AT_CSQ:
es_marble 16:6807d437cd48 176 pc.printf("sending AT_CSQ\r\n");//&debug
es_marble 16:6807d437cd48 177 gsm.puts(AT_CSQ);
es_marble 16:6807d437cd48 178 gsm.puts("\r\n");
es_marble 16:6807d437cd48 179 break;
es_marble 16:6807d437cd48 180 case GSM_AT_CREG:
es_marble 16:6807d437cd48 181 pc.printf("sending AT_CREG\r\n");//&debug
es_marble 16:6807d437cd48 182 gsm.puts(AT_CREG);
es_marble 16:6807d437cd48 183 gsm.puts("\r\n");
es_marble 16:6807d437cd48 184 break;
es_marble 16:6807d437cd48 185 case GSM_AT_CMGF:
es_marble 16:6807d437cd48 186 pc.printf("sending AT_CMGF\r\n");//&debug
es_marble 16:6807d437cd48 187 gsm.puts(AT_CMGF);
es_marble 16:6807d437cd48 188 gsm.puts("\r\n");
es_marble 16:6807d437cd48 189 break;
es_marble 16:6807d437cd48 190 case GSM_AT_CMGS:
es_marble 16:6807d437cd48 191 pc.printf("sending AT_CMGS\r\n");//&debug
es_marble 16:6807d437cd48 192 gsm.puts(AT_CMGS);
es_marble 16:6807d437cd48 193 gsm.puts("\r\n");
es_marble 16:6807d437cd48 194 break;
es_marble 16:6807d437cd48 195 case GSM_AT_SENDSMS:
es_marble 18:7642909bfcfc 196 pc.printf("sending message\r\n");//&debug
es_marble 18:7642909bfcfc 197 gsm.puts(gsm_msg); //substitute char included
es_marble 16:6807d437cd48 198 gsm.puts("\r\n");
es_marble 16:6807d437cd48 199 break;
es_marble 16:6807d437cd48 200 case GSM_SUCCESS:
es_marble 16:6807d437cd48 201 pc.printf("No Mealy success state output\r\n");//&debug
danilob 19:a442b5a0116f 202 break;
es_marble 16:6807d437cd48 203 default:
es_marble 16:6807d437cd48 204 pc.printf("This is a state error");
es_marble 16:6807d437cd48 205 }
es_marble 16:6807d437cd48 206 }
es_marble 16:6807d437cd48 207
es_marble 16:6807d437cd48 208
es_marble 18:7642909bfcfc 209 //Initialize the GSM
es_marble 16:6807d437cd48 210 void gsm_initialize(){
danilob 7:6c0b6ab3cafe 211 SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK; //enabling dmamux clock
danilob 12:f3ccc43c4d3c 212 SIM_SCGC7 |= SIM_SCGC7_DMA_MASK; // enebaling dma clock
es_marble 18:7642909bfcfc 213 pc.printf("initializing tregisters...!\r\n");
danilob 0:41904adca656 214 // control register mux, enabling uart3 receive
danilob 0:41904adca656 215 DMAMUX_CHCFG0 |= DMAMUX_CHCFG_ENBL_MASK|DMAMUX_CHCFG_SOURCE(8);
danilob 0:41904adca656 216
danilob 0:41904adca656 217 // Enable request signal for channel 0
danilob 0:41904adca656 218 DMA_ERQ = DMA_ERQ_ERQ0_MASK;
danilob 0:41904adca656 219
danilob 0:41904adca656 220 // select round-robin arbitration priority
danilob 0:41904adca656 221 DMA_CR |= DMA_CR_ERCA_MASK;
danilob 0:41904adca656 222
danilob 0:41904adca656 223 //enabled error interrupt for DMA0
danilob 0:41904adca656 224 //DMA_EEI = DMA_EEI_EEI0_MASK ;
danilob 0:41904adca656 225 //Addres for buffer
danilob 0:41904adca656 226 DMA_TCD0_SADDR = (uint32_t) &UART_D_REG(UART3_BASE_PTR);
danilob 0:41904adca656 227 DMA_TCD0_DADDR = (uint32_t) buffer;
danilob 0:41904adca656 228 // Set an offset for source and destination address
danilob 0:41904adca656 229 DMA_TCD0_SOFF = 0x00;
danilob 0:41904adca656 230 DMA_TCD0_DOFF = 0x01; // Destination address offset of 1 byte per transaction
danilob 0:41904adca656 231
danilob 0:41904adca656 232 // Set source and destination data transfer size
danilob 0:41904adca656 233 DMA_TCD0_ATTR = DMA_ATTR_SSIZE(0) | DMA_ATTR_DSIZE(0);
danilob 0:41904adca656 234
danilob 0:41904adca656 235 // Number of bytes to be transfered in each service request of the channel
danilob 0:41904adca656 236 DMA_TCD0_NBYTES_MLNO = 0x01;
danilob 0:41904adca656 237 // Current major iteration count
danilob 0:41904adca656 238 DMA_TCD0_CITER_ELINKNO = DMA_CITER_ELINKNO_CITER(BUFFER_LENGTH);
danilob 0:41904adca656 239 DMA_TCD0_BITER_ELINKNO = DMA_BITER_ELINKNO_BITER(BUFFER_LENGTH);
danilob 0:41904adca656 240 // Adjustment value used to restore the source and destiny address to the initial value
danilob 0:41904adca656 241 // After reading 'len' number of times, the DMA goes back to the beginning by subtracting len*2 from the address (going back to the original address)
es_marble 16:6807d437cd48 242 DMA_TCD0_SLAST = 0; // Source address adjustment
es_marble 16:6807d437cd48 243 DMA_TCD0_DLASTSGA = -BUFFER_LENGTH; // Destination address adjustment
danilob 0:41904adca656 244 // Setup control and status register
danilob 0:41904adca656 245 DMA_TCD0_CSR = 0;
danilob 0:41904adca656 246
danilob 0:41904adca656 247 // enable interrupt call at end of major loop
danilob 0:41904adca656 248 DMA_TCD0_CSR |= DMA_CSR_INTMAJOR_MASK;
danilob 0:41904adca656 249
danilob 0:41904adca656 250 //Activate dma trasnfer rx interrupt
danilob 0:41904adca656 251 UART_C2_REG(UART3) |= UART_C2_RIE_MASK;
danilob 0:41904adca656 252 UART_C5_REG(UART3) |= UART_C5_RDMAS_MASK | UART_C5_ILDMAS_MASK | UART_C5_LBKDDMAS_MASK;
danilob 0:41904adca656 253 //activate p fifo
danilob 0:41904adca656 254 UART_PFIFO_REG(UART3) |= UART_PFIFO_RXFE_MASK; //RXFE and buffer size of 1 word
danilob 7:6c0b6ab3cafe 255 queueInit();
danilob 0:41904adca656 256 pc.printf("Initialization done...\n\r");
danilob 0:41904adca656 257 }
danilob 0:41904adca656 258
danilob 0:41904adca656 259
danilob 0:41904adca656 260
danilob 0:41904adca656 261 //initialization debuging purposes
danilob 0:41904adca656 262 void print_registers() {
danilob 0:41904adca656 263
danilob 0:41904adca656 264
danilob 0:41904adca656 265 pc.printf("\n\rDMA REGISTERS\n\r");
danilob 0:41904adca656 266 pc.printf("DMA_MUX: 0x%08x\r\n",DMAMUX_CHCFG0);
danilob 0:41904adca656 267 pc.printf("SADDR0: 0x%08x\r\n",DMA_TCD0_SADDR);
danilob 0:41904adca656 268 pc.printf("DADDR0: 0x%08x\r\n",DMA_TCD0_DADDR);
danilob 0:41904adca656 269 pc.printf("CITER0: 0x%08x\r\n",DMA_TCD0_CITER_ELINKNO);
danilob 0:41904adca656 270 pc.printf("BITER0: 0x%08x\r\n",DMA_TCD0_BITER_ELINKNO);
danilob 0:41904adca656 271 pc.printf("DMA_CR: %08x\r\n", DMA_CR);
danilob 0:41904adca656 272 pc.printf("DMA_ES: %08x\r\n", DMA_ES);
danilob 0:41904adca656 273 pc.printf("DMA_ERQ: %08x\r\n", DMA_ERQ);
danilob 0:41904adca656 274 pc.printf("DMA_EEI: %08x\r\n", DMA_EEI);
danilob 0:41904adca656 275 pc.printf("DMA_CEEI: %02x\r\n", DMA_CEEI);
danilob 0:41904adca656 276 pc.printf("DMA_SEEI: %02x\r\n", DMA_SEEI);
danilob 0:41904adca656 277 pc.printf("DMA_CERQ: %02x\r\n", DMA_CERQ);
danilob 0:41904adca656 278 pc.printf("DMA_SERQ: %02x\r\n", DMA_SERQ);
danilob 0:41904adca656 279 pc.printf("DMA_CDNE: %02x\r\n", DMA_CDNE);
danilob 0:41904adca656 280 pc.printf("DMA_SSRT: %02x\r\n", DMA_SSRT);
danilob 0:41904adca656 281 pc.printf("DMA_CERR: %02x\r\n", DMA_CERR);
danilob 0:41904adca656 282 pc.printf("DMA_CINT: %02x\r\n", DMA_CINT);
danilob 0:41904adca656 283 pc.printf("DMA_INT: %08x\r\n", DMA_INT);
danilob 0:41904adca656 284 pc.printf("DMA_ERR: %08x\r\n", DMA_ERR);
danilob 0:41904adca656 285 pc.printf("DMA_HRS: %08x\r\n", DMA_HRS);
danilob 0:41904adca656 286 pc.printf("DMA_TCD0_DOFF: %08x\r\n",DMA_TCD0_DOFF);
danilob 0:41904adca656 287 pc.printf("\n\rUART REGISTERS\n\r");
danilob 0:41904adca656 288 pc.printf("UART_BDH_REG: %08x\r\n",UART_BDH_REG(UART3));
danilob 0:41904adca656 289 pc.printf("UART_C1_REG: %08x\r\n",UART_C1_REG(UART3));
danilob 0:41904adca656 290 pc.printf("UART_C2_REG: %08x\r\n",UART_C2_REG(UART3));
danilob 0:41904adca656 291 pc.printf("UART_S1_REG: %08x\r\n",UART_S1_REG(UART3));
es_marble 16:6807d437cd48 292 pc.printf("UART_s2_REG: %08x\r\n",UART_S2_REG(UART3));
danilob 0:41904adca656 293 pc.printf("UART_C3_REG: %08x\r\n",UART_C3_REG(UART3));
danilob 0:41904adca656 294 pc.printf("UART_D_REG: %08x\r\n",UART_D_REG(UART3));
danilob 0:41904adca656 295 pc.printf("UART_MA1_REG: %08x\r\n",UART_MA1_REG(UART3));
danilob 0:41904adca656 296 pc.printf("UART_MA2_REG: %08x\r\n",UART_MA2_REG(UART3));
danilob 0:41904adca656 297 pc.printf("UART_C4_REG: %08x\r\n",UART_C4_REG(UART3));
danilob 0:41904adca656 298 pc.printf("UART_C5_REG: %08x\r\n",UART_C5_REG(UART3));
es_marble 16:6807d437cd48 299 pc.printf("UART_ED_REG: %08x\r\n",UART_ED_REG(UART3));
danilob 0:41904adca656 300 pc.printf("UART_MODEM_REG: %08x\r\n",UART_MODEM_REG(UART3));
danilob 0:41904adca656 301 pc.printf("UART_IR_REG: %08x\r\n",UART_IR_REG(UART3));
danilob 0:41904adca656 302 pc.printf("UART_PFIFO_REG: %08x\r\n",UART_PFIFO_REG(UART3));
danilob 0:41904adca656 303 pc.printf("UART_CFIFO_REG: %08x\r\n",UART_CFIFO_REG(UART3));
danilob 0:41904adca656 304 pc.printf("UART_SFIFO_REG: %08x\r\n",UART_SFIFO_REG(UART3));
danilob 0:41904adca656 305 pc.printf("UART_TWFIFO_REG: %08x\r\n",UART_TWFIFO_REG(UART3));
danilob 0:41904adca656 306 pc.printf("UART_TCFIFO_REG: %08x\r\n",UART_TCFIFO_REG(UART3));
danilob 0:41904adca656 307 pc.printf("UART_RWFIFO_REG: %08x\r\n",UART_RWFIFO_REG(UART3));
danilob 0:41904adca656 308 pc.printf("UART_RCFIFO_REG: %08x\r\n",UART_RCFIFO_REG(UART3));
danilob 0:41904adca656 309
danilob 0:41904adca656 310 }