TMRh20 ported to MBED
Fork of TMRh20 by
nRF24L01.h@6:15a3bbf90fe9, 2017-10-06 (annotated)
- Committer:
- gume
- Date:
- Fri Oct 06 20:20:33 2017 +0000
- Revision:
- 6:15a3bbf90fe9
- Parent:
- 0:163155b607df
Initial release
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
gume | 0:163155b607df | 1 | /* |
gume | 0:163155b607df | 2 | Copyright (c) 2007 Stefan Engelke <mbox@stefanengelke.de> |
gume | 0:163155b607df | 3 | Portions Copyright (C) 2011 Greg Copeland |
gume | 0:163155b607df | 4 | |
gume | 0:163155b607df | 5 | Permission is hereby granted, free of charge, to any person |
gume | 0:163155b607df | 6 | obtaining a copy of this software and associated documentation |
gume | 0:163155b607df | 7 | files (the "Software"), to deal in the Software without |
gume | 0:163155b607df | 8 | restriction, including without limitation the rights to use, copy, |
gume | 0:163155b607df | 9 | modify, merge, publish, distribute, sublicense, and/or sell copies |
gume | 0:163155b607df | 10 | of the Software, and to permit persons to whom the Software is |
gume | 0:163155b607df | 11 | furnished to do so, subject to the following conditions: |
gume | 0:163155b607df | 12 | |
gume | 0:163155b607df | 13 | The above copyright notice and this permission notice shall be |
gume | 0:163155b607df | 14 | included in all copies or substantial portions of the Software. |
gume | 0:163155b607df | 15 | |
gume | 0:163155b607df | 16 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
gume | 0:163155b607df | 17 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
gume | 0:163155b607df | 18 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
gume | 0:163155b607df | 19 | NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
gume | 0:163155b607df | 20 | HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
gume | 0:163155b607df | 21 | WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
gume | 0:163155b607df | 22 | OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
gume | 0:163155b607df | 23 | DEALINGS IN THE SOFTWARE. |
gume | 0:163155b607df | 24 | */ |
gume | 0:163155b607df | 25 | |
gume | 0:163155b607df | 26 | /* Memory Map */ |
gume | 6:15a3bbf90fe9 | 27 | #define NRF_CONFIG 0x00 |
gume | 0:163155b607df | 28 | #define EN_AA 0x01 |
gume | 0:163155b607df | 29 | #define EN_RXADDR 0x02 |
gume | 0:163155b607df | 30 | #define SETUP_AW 0x03 |
gume | 0:163155b607df | 31 | #define SETUP_RETR 0x04 |
gume | 0:163155b607df | 32 | #define RF_CH 0x05 |
gume | 0:163155b607df | 33 | #define RF_SETUP 0x06 |
gume | 0:163155b607df | 34 | #define NRF_STATUS 0x07 |
gume | 0:163155b607df | 35 | #define OBSERVE_TX 0x08 |
gume | 0:163155b607df | 36 | #define CD 0x09 |
gume | 0:163155b607df | 37 | #define RX_ADDR_P0 0x0A |
gume | 0:163155b607df | 38 | #define RX_ADDR_P1 0x0B |
gume | 0:163155b607df | 39 | #define RX_ADDR_P2 0x0C |
gume | 0:163155b607df | 40 | #define RX_ADDR_P3 0x0D |
gume | 0:163155b607df | 41 | #define RX_ADDR_P4 0x0E |
gume | 0:163155b607df | 42 | #define RX_ADDR_P5 0x0F |
gume | 0:163155b607df | 43 | #define TX_ADDR 0x10 |
gume | 0:163155b607df | 44 | #define RX_PW_P0 0x11 |
gume | 0:163155b607df | 45 | #define RX_PW_P1 0x12 |
gume | 0:163155b607df | 46 | #define RX_PW_P2 0x13 |
gume | 0:163155b607df | 47 | #define RX_PW_P3 0x14 |
gume | 0:163155b607df | 48 | #define RX_PW_P4 0x15 |
gume | 0:163155b607df | 49 | #define RX_PW_P5 0x16 |
gume | 0:163155b607df | 50 | #define FIFO_STATUS 0x17 |
gume | 0:163155b607df | 51 | #define DYNPD 0x1C |
gume | 0:163155b607df | 52 | #define FEATURE 0x1D |
gume | 0:163155b607df | 53 | |
gume | 0:163155b607df | 54 | /* Bit Mnemonics */ |
gume | 0:163155b607df | 55 | #define MASK_RX_DR 6 |
gume | 0:163155b607df | 56 | #define MASK_TX_DS 5 |
gume | 0:163155b607df | 57 | #define MASK_MAX_RT 4 |
gume | 0:163155b607df | 58 | #define EN_CRC 3 |
gume | 0:163155b607df | 59 | #define CRCO 2 |
gume | 0:163155b607df | 60 | #define PWR_UP 1 |
gume | 0:163155b607df | 61 | #define PRIM_RX 0 |
gume | 0:163155b607df | 62 | #define ENAA_P5 5 |
gume | 0:163155b607df | 63 | #define ENAA_P4 4 |
gume | 0:163155b607df | 64 | #define ENAA_P3 3 |
gume | 0:163155b607df | 65 | #define ENAA_P2 2 |
gume | 0:163155b607df | 66 | #define ENAA_P1 1 |
gume | 0:163155b607df | 67 | #define ENAA_P0 0 |
gume | 0:163155b607df | 68 | #define ERX_P5 5 |
gume | 0:163155b607df | 69 | #define ERX_P4 4 |
gume | 0:163155b607df | 70 | #define ERX_P3 3 |
gume | 0:163155b607df | 71 | #define ERX_P2 2 |
gume | 0:163155b607df | 72 | #define ERX_P1 1 |
gume | 0:163155b607df | 73 | #define ERX_P0 0 |
gume | 0:163155b607df | 74 | #define AW 0 |
gume | 0:163155b607df | 75 | #define ARD 4 |
gume | 0:163155b607df | 76 | #define ARC 0 |
gume | 0:163155b607df | 77 | #define PLL_LOCK 4 |
gume | 0:163155b607df | 78 | #define RF_DR 3 |
gume | 0:163155b607df | 79 | #define RF_PWR 6 |
gume | 0:163155b607df | 80 | #define RX_DR 6 |
gume | 0:163155b607df | 81 | #define TX_DS 5 |
gume | 0:163155b607df | 82 | #define MAX_RT 4 |
gume | 0:163155b607df | 83 | #define RX_P_NO 1 |
gume | 0:163155b607df | 84 | #define TX_FULL 0 |
gume | 0:163155b607df | 85 | #define PLOS_CNT 4 |
gume | 0:163155b607df | 86 | #define ARC_CNT 0 |
gume | 0:163155b607df | 87 | #define TX_REUSE 6 |
gume | 0:163155b607df | 88 | #define FIFO_FULL 5 |
gume | 0:163155b607df | 89 | #define TX_EMPTY 4 |
gume | 0:163155b607df | 90 | #define RX_FULL 1 |
gume | 0:163155b607df | 91 | #define RX_EMPTY 0 |
gume | 0:163155b607df | 92 | #define DPL_P5 5 |
gume | 0:163155b607df | 93 | #define DPL_P4 4 |
gume | 0:163155b607df | 94 | #define DPL_P3 3 |
gume | 0:163155b607df | 95 | #define DPL_P2 2 |
gume | 0:163155b607df | 96 | #define DPL_P1 1 |
gume | 0:163155b607df | 97 | #define DPL_P0 0 |
gume | 0:163155b607df | 98 | #define EN_DPL 2 |
gume | 0:163155b607df | 99 | #define EN_ACK_PAY 1 |
gume | 0:163155b607df | 100 | #define EN_DYN_ACK 0 |
gume | 0:163155b607df | 101 | |
gume | 0:163155b607df | 102 | /* Instruction Mnemonics */ |
gume | 0:163155b607df | 103 | #define R_REGISTER 0x00 |
gume | 0:163155b607df | 104 | #define W_REGISTER 0x20 |
gume | 0:163155b607df | 105 | #define REGISTER_MASK 0x1F |
gume | 0:163155b607df | 106 | #define ACTIVATE 0x50 |
gume | 0:163155b607df | 107 | #define R_RX_PL_WID 0x60 |
gume | 0:163155b607df | 108 | #define R_RX_PAYLOAD 0x61 |
gume | 0:163155b607df | 109 | #define W_TX_PAYLOAD 0xA0 |
gume | 0:163155b607df | 110 | #define W_ACK_PAYLOAD 0xA8 |
gume | 0:163155b607df | 111 | #define FLUSH_TX 0xE1 |
gume | 0:163155b607df | 112 | #define FLUSH_RX 0xE2 |
gume | 0:163155b607df | 113 | #define REUSE_TX_PL 0xE3 |
gume | 0:163155b607df | 114 | #define NOP 0xFF |
gume | 0:163155b607df | 115 | |
gume | 0:163155b607df | 116 | /* Non-P omissions */ |
gume | 0:163155b607df | 117 | #define LNA_HCURR 0 |
gume | 0:163155b607df | 118 | |
gume | 0:163155b607df | 119 | /* P model memory Map */ |
gume | 0:163155b607df | 120 | #define RPD 0x09 |
gume | 0:163155b607df | 121 | #define W_TX_PAYLOAD_NO_ACK 0xB0 |
gume | 0:163155b607df | 122 | |
gume | 0:163155b607df | 123 | /* P model bit Mnemonics */ |
gume | 0:163155b607df | 124 | #define RF_DR_LOW 5 |
gume | 0:163155b607df | 125 | #define RF_DR_HIGH 3 |
gume | 0:163155b607df | 126 | #define RF_PWR_LOW 1 |
gume | 0:163155b607df | 127 | #define RF_PWR_HIGH 2 |