Analog Devices / mbed-drivers

A collection of Analog Devices drivers for the mbed platform

For additional information check out the mbed page of the Analog Devices wiki: https://wiki.analog.com/resources/tools-software/mbed-drivers-all

libraries/adxl362/ADXL362.h@19:fb92949e59c9, 2016-05-17 (annotated)

Committer:
Adrian Suciu
Date:
Tue May 17 14:21:17 2016 +0300
Revision:
19:fb92949e59c9
Child:
20:9790e53d6e26
Added ADXL362 driver & reference project

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Adrian Suciu 19:fb92949e59c9 1 #ifndef ADXL362_H_
Adrian Suciu 19:fb92949e59c9 2 #define ADXL362_H_
Adrian Suciu 19:fb92949e59c9 3
Adrian Suciu 19:fb92949e59c9 4 #include "mbed.h"
Adrian Suciu 19:fb92949e59c9 5
Adrian Suciu 19:fb92949e59c9 6 class ADXL362
Adrian Suciu 19:fb92949e59c9 7 {
Adrian Suciu 19:fb92949e59c9 8 public:
Adrian Suciu 19:fb92949e59c9 9
Adrian Suciu 19:fb92949e59c9 10 /* Temperature parameters */
Adrian Suciu 19:fb92949e59c9 11 typedef enum {
Adrian Suciu 19:fb92949e59c9 12 DEVID_AD = 0x00,
Adrian Suciu 19:fb92949e59c9 13 DEVID_MST = 0x01,
Adrian Suciu 19:fb92949e59c9 14 PARTID = 0x02,
Adrian Suciu 19:fb92949e59c9 15 REVID = 0x03,
Adrian Suciu 19:fb92949e59c9 16 XDATA = 0x08,
Adrian Suciu 19:fb92949e59c9 17 YDATA = 0x09,
Adrian Suciu 19:fb92949e59c9 18 ZDATA = 0x0A,
Adrian Suciu 19:fb92949e59c9 19 STATUS = 0x0B,
Adrian Suciu 19:fb92949e59c9 20 FIFO_ENTRIES_L = 0x0C,
Adrian Suciu 19:fb92949e59c9 21 FIFO_ENTRIES_H = 0x0D,
Adrian Suciu 19:fb92949e59c9 22 XDATA_L = 0x0E,
Adrian Suciu 19:fb92949e59c9 23 XDATA_H = 0x0F,
Adrian Suciu 19:fb92949e59c9 24 YDATA_L = 0x10,
Adrian Suciu 19:fb92949e59c9 25 YDATA_H = 0x11,
Adrian Suciu 19:fb92949e59c9 26 ZDATA_L = 0x12,
Adrian Suciu 19:fb92949e59c9 27 ZDATA_H = 0x13,
Adrian Suciu 19:fb92949e59c9 28 TEMP_L = 0x14,
Adrian Suciu 19:fb92949e59c9 29 TEMP_H = 0x15,
Adrian Suciu 19:fb92949e59c9 30 // Reserved = 0x16;
Adrian Suciu 19:fb92949e59c9 31 // Reserved = 0x17;
Adrian Suciu 19:fb92949e59c9 32 SOFT_RESET = 0x1F,
Adrian Suciu 19:fb92949e59c9 33 THRESH_ACT_L = 0x20,
Adrian Suciu 19:fb92949e59c9 34 THRESH_ACT_H = 0x21,
Adrian Suciu 19:fb92949e59c9 35 TIME_ACT = 0x22,
Adrian Suciu 19:fb92949e59c9 36 THRESH_INACT_L = 0x23,
Adrian Suciu 19:fb92949e59c9 37 THRESH_INACT_H = 0x24,
Adrian Suciu 19:fb92949e59c9 38 TIME_INACT_L = 0x25,
Adrian Suciu 19:fb92949e59c9 39 TIME_INACT_H = 0x26,
Adrian Suciu 19:fb92949e59c9 40 ACT_INACT_CTL = 0x27,
Adrian Suciu 19:fb92949e59c9 41 FIFO_CONTROL = 0x28,
Adrian Suciu 19:fb92949e59c9 42 FIFO_SAMPLES = 0x29,
Adrian Suciu 19:fb92949e59c9 43 INTMAP1 = 0x2A,
Adrian Suciu 19:fb92949e59c9 44 INTMAP2 = 0x2B,
Adrian Suciu 19:fb92949e59c9 45 FILTER_CTL = 0x2C,
Adrian Suciu 19:fb92949e59c9 46 POWER_CTL = 0x2D,
Adrian Suciu 19:fb92949e59c9 47 SELF_TEST = 0x2E,
Adrian Suciu 19:fb92949e59c9 48 } ADXL362_register_t;
Adrian Suciu 19:fb92949e59c9 49
Adrian Suciu 19:fb92949e59c9 50 typedef enum {
Adrian Suciu 19:fb92949e59c9 51 STANDBY = 0x00,
Adrian Suciu 19:fb92949e59c9 52 MEASUREMENT = 0x02
Adrian Suciu 19:fb92949e59c9 53 } ADXL362_modes_t;
Adrian Suciu 19:fb92949e59c9 54
Adrian Suciu 19:fb92949e59c9 55 typedef enum {
Adrian Suciu 19:fb92949e59c9 56 ERR_USER_REGS = 0x80,
Adrian Suciu 19:fb92949e59c9 57 AWAKE = 0x40,
Adrian Suciu 19:fb92949e59c9 58 INACT = 0x20,
Adrian Suciu 19:fb92949e59c9 59 ACT = 0x10,
Adrian Suciu 19:fb92949e59c9 60 FIFO_OVERRUN = 0x08,
Adrian Suciu 19:fb92949e59c9 61 FIFO_WATERMARK = 0x04,
Adrian Suciu 19:fb92949e59c9 62 FIFO_READY = 0x02,
Adrian Suciu 19:fb92949e59c9 63 DATA_READY = 0x01
Adrian Suciu 19:fb92949e59c9 64 } ADXL362_STATUS_reg_bits_t;
Adrian Suciu 19:fb92949e59c9 65
Adrian Suciu 19:fb92949e59c9 66 typedef enum {
Adrian Suciu 19:fb92949e59c9 67 LINKLOOP1 = 0x20,
Adrian Suciu 19:fb92949e59c9 68 LINKLOOP0 = 0x10,
Adrian Suciu 19:fb92949e59c9 69 DEFAULTMODE = 0x00,
Adrian Suciu 19:fb92949e59c9 70 LINKED_MODE = 0x10,
Adrian Suciu 19:fb92949e59c9 71 LOOP_MODE = 0x30,
Adrian Suciu 19:fb92949e59c9 72 INACT_REF = 0x08,
Adrian Suciu 19:fb92949e59c9 73 INACT_EN = 0x04,
Adrian Suciu 19:fb92949e59c9 74 ACT_REF = 0x02,
Adrian Suciu 19:fb92949e59c9 75 ACT_EN = 0x01
Adrian Suciu 19:fb92949e59c9 76 } ADXL362_ACT_INACT_CTL_reg_bits_t;
Adrian Suciu 19:fb92949e59c9 77
Adrian Suciu 19:fb92949e59c9 78 typedef enum {
Adrian Suciu 19:fb92949e59c9 79 AH = 0x08,
Adrian Suciu 19:fb92949e59c9 80 FIFO_TEMP = 0x04,
Adrian Suciu 19:fb92949e59c9 81 FIFO_MODE1 = 0x02,
Adrian Suciu 19:fb92949e59c9 82 FIFO_MODE = 0x01,
Adrian Suciu 19:fb92949e59c9 83 } ADXL362_FIFO_CONTROL_reg_bits_t;
Adrian Suciu 19:fb92949e59c9 84
Adrian Suciu 19:fb92949e59c9 85 typedef enum {
Adrian Suciu 19:fb92949e59c9 86 FIFO_DISABLED = 0x00,
Adrian Suciu 19:fb92949e59c9 87 FIFO_OLDEST = 0x01,
Adrian Suciu 19:fb92949e59c9 88 FIFO_STREAM = 0x02,
Adrian Suciu 19:fb92949e59c9 89 FIFO_TRIGGERED = 0x03,
Adrian Suciu 19:fb92949e59c9 90 } ADXL362_FIFO_modes_t;
Adrian Suciu 19:fb92949e59c9 91
Adrian Suciu 19:fb92949e59c9 92 typedef enum {
Adrian Suciu 19:fb92949e59c9 93 INT_LOW = 0x80,
Adrian Suciu 19:fb92949e59c9 94 INT_AWAKE = 0x40,
Adrian Suciu 19:fb92949e59c9 95 INT_INACT = 0x20,
Adrian Suciu 19:fb92949e59c9 96 INT_ACT = 0x10,
Adrian Suciu 19:fb92949e59c9 97 INT_FIFO_OVERRUN = 0x08,
Adrian Suciu 19:fb92949e59c9 98 INT_FIFO_WATERMARK = 0x04,
Adrian Suciu 19:fb92949e59c9 99 INT_FIFO_READY = 0x02,
Adrian Suciu 19:fb92949e59c9 100 INT_DATA_READY = 0x01
Adrian Suciu 19:fb92949e59c9 101 } ADXL362_INTMAP_reg_bits_t;
Adrian Suciu 19:fb92949e59c9 102
Adrian Suciu 19:fb92949e59c9 103 typedef enum {
Adrian Suciu 19:fb92949e59c9 104 RANGE1 = 0x80,
Adrian Suciu 19:fb92949e59c9 105 RANGE0 = 0x40,
Adrian Suciu 19:fb92949e59c9 106 RANGE2G = 0x00,
Adrian Suciu 19:fb92949e59c9 107 RANGE4G = 0x40,
Adrian Suciu 19:fb92949e59c9 108 RANGE8G = 0x80,
Adrian Suciu 19:fb92949e59c9 109 HALF_BW = 0x10,
Adrian Suciu 19:fb92949e59c9 110 EXT_SAMPLE = 0x08,
Adrian Suciu 19:fb92949e59c9 111 ODR2 = 0x04,
Adrian Suciu 19:fb92949e59c9 112 ODR1 = 0x02,
Adrian Suciu 19:fb92949e59c9 113 ODR0 = 0x01,
Adrian Suciu 19:fb92949e59c9 114 ODR12HZ = 0x00,
Adrian Suciu 19:fb92949e59c9 115 ODR25HZ = 0x01,
Adrian Suciu 19:fb92949e59c9 116 ODR50Hz = 0x02,
Adrian Suciu 19:fb92949e59c9 117 ODR100HZ = 0x03,
Adrian Suciu 19:fb92949e59c9 118 ODR200Hz = 0x04,
Adrian Suciu 19:fb92949e59c9 119 ODR400HZ = 0x07
Adrian Suciu 19:fb92949e59c9 120 } ADXL362_FILTER_CTL_reg_bits_t;
Adrian Suciu 19:fb92949e59c9 121
Adrian Suciu 19:fb92949e59c9 122 typedef enum {
Adrian Suciu 19:fb92949e59c9 123 EXT_CLK = 0x40,
Adrian Suciu 19:fb92949e59c9 124 LOW_NOISE1 = 0x20,
Adrian Suciu 19:fb92949e59c9 125 LOW_NOISE0 = 0x10,
Adrian Suciu 19:fb92949e59c9 126 NORMAL_OPERATION = 0x00,
Adrian Suciu 19:fb92949e59c9 127 LOW_NOISE = 0x10,
Adrian Suciu 19:fb92949e59c9 128 ULTRALOW_NOISE = 0x20,
Adrian Suciu 19:fb92949e59c9 129 WAKEUP = 0x08,
Adrian Suciu 19:fb92949e59c9 130 AUTOSLEEP = 0x04,
Adrian Suciu 19:fb92949e59c9 131 MEASURE1 = 0x02,
Adrian Suciu 19:fb92949e59c9 132 MEASURE0 = 0x01,
Adrian Suciu 19:fb92949e59c9 133 } ADXL362_POWER_CTL_reg_bits_t;
Adrian Suciu 19:fb92949e59c9 134
Adrian Suciu 19:fb92949e59c9 135 /** SPI configuration & constructor */
Adrian Suciu 19:fb92949e59c9 136 ADXL362(PinName CS = SPI_CS, PinName MOSI = SPI_MOSI, PinName MISO =
Adrian Suciu 19:fb92949e59c9 137 SPI_MISO, PinName SCK = SPI_SCK);
Adrian Suciu 19:fb92949e59c9 138 void frequency(int hz);
Adrian Suciu 19:fb92949e59c9 139
Adrian Suciu 19:fb92949e59c9 140 /** Low level SPI bus comm methods */
Adrian Suciu 19:fb92949e59c9 141 void reset(void);
Adrian Suciu 19:fb92949e59c9 142 void write_reg(ADXL362_register_t reg, uint8_t data);
Adrian Suciu 19:fb92949e59c9 143 uint8_t read_reg(ADXL362_register_t reg);
Adrian Suciu 19:fb92949e59c9 144 uint64_t scan();
Adrian Suciu 19:fb92949e59c9 145
Adrian Suciu 19:fb92949e59c9 146 void set_power_ctl_reg(uint8_t data);
Adrian Suciu 19:fb92949e59c9 147 void set_filter_ctl_reg(uint8_t data);
Adrian Suciu 19:fb92949e59c9 148
Adrian Suciu 19:fb92949e59c9 149 uint8_t scanx_u8();
Adrian Suciu 19:fb92949e59c9 150 uint16_t scanx();
Adrian Suciu 19:fb92949e59c9 151 uint8_t scany_u8();
Adrian Suciu 19:fb92949e59c9 152 uint16_t scany();
Adrian Suciu 19:fb92949e59c9 153 uint8_t scanz_u8();
Adrian Suciu 19:fb92949e59c9 154 uint16_t scanz();
Adrian Suciu 19:fb92949e59c9 155 uint16_t scant();
Adrian Suciu 19:fb92949e59c9 156
Adrian Suciu 19:fb92949e59c9 157 uint8_t read_status();
Adrian Suciu 19:fb92949e59c9 158 void set_mode(ADXL362_modes_t mode);
Adrian Suciu 19:fb92949e59c9 159
Adrian Suciu 19:fb92949e59c9 160 void set_activity_threshold(uint16_t threshold);
Adrian Suciu 19:fb92949e59c9 161 void set_activity_time(uint8_t time);
Adrian Suciu 19:fb92949e59c9 162 void set_inactivity_threshold(uint16_t threshold);
Adrian Suciu 19:fb92949e59c9 163 void set_inactivity_time(uint16_t time);
Adrian Suciu 19:fb92949e59c9 164 void set_act_inact_ctl_reg(uint8_t data);
Adrian Suciu 19:fb92949e59c9 165
Adrian Suciu 19:fb92949e59c9 166 void set_interrupt1_pin(PinName in, uint8_t data, void (*callback_rising)(void), void (*callback_falling)(void), PinMode pull = PullNone);
Adrian Suciu 19:fb92949e59c9 167 void set_interrupt2_pin(PinName in, uint8_t data, void (*callback_rising)(void), void (*callback_falling)(void), PinMode pull = PullNone);
Adrian Suciu 19:fb92949e59c9 168 void enable_interrupt1();
Adrian Suciu 19:fb92949e59c9 169 void enable_interrupt2();
Adrian Suciu 19:fb92949e59c9 170 void disable_interrupt1();
Adrian Suciu 19:fb92949e59c9 171 void disable_interrupt2();
Adrian Suciu 19:fb92949e59c9 172
Adrian Suciu 19:fb92949e59c9 173 void set_polling_interrupt1_pin(PinName in, uint8_t data, PinMode pull = PullNone);
Adrian Suciu 19:fb92949e59c9 174 void set_polling_interrupt2_pin(PinName in, uint8_t data, PinMode pull = PullNone);
Adrian Suciu 19:fb92949e59c9 175
Adrian Suciu 19:fb92949e59c9 176 bool get_int1();
Adrian Suciu 19:fb92949e59c9 177 bool get_int2();
Adrian Suciu 19:fb92949e59c9 178
Adrian Suciu 19:fb92949e59c9 179
Adrian Suciu 19:fb92949e59c9 180 uint16_t fifo_read_nr_of_entries();
Adrian Suciu 19:fb92949e59c9 181 void fifo_setup(bool store_temp, ADXL362_FIFO_modes_t mode, uint16_t nr_of_entries);
Adrian Suciu 19:fb92949e59c9 182 uint16_t fifo_read_u16();
Adrian Suciu 19:fb92949e59c9 183 uint64_t fifo_scan();
Adrian Suciu 19:fb92949e59c9 184
Adrian Suciu 19:fb92949e59c9 185
Adrian Suciu 19:fb92949e59c9 186
Adrian Suciu 19:fb92949e59c9 187
Adrian Suciu 19:fb92949e59c9 188
Adrian Suciu 19:fb92949e59c9 189 private:
Adrian Suciu 19:fb92949e59c9 190
Adrian Suciu 19:fb92949e59c9 191 SPI adxl362; ///< SPI instance of the AD7791
Adrian Suciu 19:fb92949e59c9 192 DigitalOut cs; ///< DigitalOut instance for the chipselect of the AD7791
Adrian Suciu 19:fb92949e59c9 193 uint16_t read_reg_u16(ADXL362_register_t reg);
Adrian Suciu 19:fb92949e59c9 194 InterruptIn *int1;
Adrian Suciu 19:fb92949e59c9 195 InterruptIn *int2;
Adrian Suciu 19:fb92949e59c9 196 DigitalIn int1_poll;
Adrian Suciu 19:fb92949e59c9 197 DigitalIn int2_poll;
Adrian Suciu 19:fb92949e59c9 198 bool int1_act_low;
Adrian Suciu 19:fb92949e59c9 199 bool int2_act_low;
Adrian Suciu 19:fb92949e59c9 200 bool temp_stored_in_fifo;
Adrian Suciu 19:fb92949e59c9 201
Adrian Suciu 19:fb92949e59c9 202 void write_reg_u16(ADXL362_register_t reg, uint16_t data);
Adrian Suciu 19:fb92949e59c9 203
Adrian Suciu 19:fb92949e59c9 204 const static uint8_t DUMMY_BYTE = 0xAA;
Adrian Suciu 19:fb92949e59c9 205 const static uint8_t WRITE_REG_CMD = 0x0A; // write register
Adrian Suciu 19:fb92949e59c9 206 const static uint8_t READ_REG_CMD = 0x0B; // read register
Adrian Suciu 19:fb92949e59c9 207 const static uint8_t READ_FIFO_CMD = 0x0D; // read FIFO
Adrian Suciu 19:fb92949e59c9 208 const static uint8_t _SPI_MODE = 0;
Adrian Suciu 19:fb92949e59c9 209 };
Adrian Suciu 19:fb92949e59c9 210
Adrian Suciu 19:fb92949e59c9 211 #endif