Analog Devices / mbed-drivers

A collection of Analog Devices drivers for the mbed platform

For additional information check out the mbed page of the Analog Devices wiki: https://wiki.analog.com/resources/tools-software/mbed-drivers-all

libraries/AD7798/AD7798.h@33:c3ec596a29c2, 2016-11-07 (annotated)

Committer:
Adrian Suciu
Date:
Mon Nov 07 16:27:12 2016 +0200
Revision:
33:c3ec596a29c2
Added CN0391, CN0396 and CN0397 shields

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Adrian Suciu 33:c3ec596a29c2 1 #ifndef _AD7798_H_
Adrian Suciu 33:c3ec596a29c2 2 #define _AD7798_H_
Adrian Suciu 33:c3ec596a29c2 3
Adrian Suciu 33:c3ec596a29c2 4 #include <mbed.h>
Adrian Suciu 33:c3ec596a29c2 5
Adrian Suciu 33:c3ec596a29c2 6 /******************************************************************************/
Adrian Suciu 33:c3ec596a29c2 7 /* AD7798 */
Adrian Suciu 33:c3ec596a29c2 8 /******************************************************************************/
Adrian Suciu 33:c3ec596a29c2 9
Adrian Suciu 33:c3ec596a29c2 10 /*AD7798 Registers*/
Adrian Suciu 33:c3ec596a29c2 11 #define AD7798_REG_COMM 0 /* Communications Register(WO, 8-bit) */
Adrian Suciu 33:c3ec596a29c2 12 #define AD7798_REG_STAT 0 /* Status Register (RO, 8-bit) */
Adrian Suciu 33:c3ec596a29c2 13 #define AD7798_REG_MODE 1 /* Mode Register (RW, 16-bit */
Adrian Suciu 33:c3ec596a29c2 14 #define AD7798_REG_CONF 2 /* Configuration Register (RW, 16-bit)*/
Adrian Suciu 33:c3ec596a29c2 15 #define AD7798_REG_DATA 3 /* Data Register (RO, 16-/24-bit) */
Adrian Suciu 33:c3ec596a29c2 16 #define AD7798_REG_ID 4 /* ID Register (RO, 8-bit) */
Adrian Suciu 33:c3ec596a29c2 17 #define AD7798_REG_IO 5 /* IO Register (RO, 8-bit) */
Adrian Suciu 33:c3ec596a29c2 18 #define AD7798_REG_OFFSET 6 /* Offset Register (RW, 24-bit */
Adrian Suciu 33:c3ec596a29c2 19 #define AD7798_REG_FULLSCALE 7 /* Full-Scale Register (RW, 24-bit */
Adrian Suciu 33:c3ec596a29c2 20
Adrian Suciu 33:c3ec596a29c2 21 /* Communications Register Bit Designations (AD7798_REG_COMM) */
Adrian Suciu 33:c3ec596a29c2 22 #define AD7798_COMM_WEN (1 << 7) /* Write Enable */
Adrian Suciu 33:c3ec596a29c2 23 #define AD7798_COMM_WRITE (0 << 6) /* Write Operation */
Adrian Suciu 33:c3ec596a29c2 24 #define AD7798_COMM_READ (1 << 6) /* Read Operation */
Adrian Suciu 33:c3ec596a29c2 25 #define AD7798_COMM_ADDR(x) (((x) & 0x7) << 3) /* Register Address */
Adrian Suciu 33:c3ec596a29c2 26 #define AD7798_COMM_CREAD (1 << 2) /* Continuous Read of Data Register */
Adrian Suciu 33:c3ec596a29c2 27
Adrian Suciu 33:c3ec596a29c2 28 /* Status Register Bit Designations (AD7798_REG_STAT) */
Adrian Suciu 33:c3ec596a29c2 29 #define AD7798_STAT_RDY (1 << 7) /* Ready */
Adrian Suciu 33:c3ec596a29c2 30 #define AD7798_STAT_ERR (1 << 6) /* Error (Overrange, Underrange) */
Adrian Suciu 33:c3ec596a29c2 31 #define AD7798_STAT_CH3 (1 << 2) /* Channel 3 */
Adrian Suciu 33:c3ec596a29c2 32 #define AD7798_STAT_CH2 (1 << 1) /* Channel 2 */
Adrian Suciu 33:c3ec596a29c2 33 #define AD7798_STAT_CH1 (1 << 0) /* Channel 1 */
Adrian Suciu 33:c3ec596a29c2 34
Adrian Suciu 33:c3ec596a29c2 35
Adrian Suciu 33:c3ec596a29c2 36 #define AD7798_CH3 (1 << 2) /* Channel 3 */
Adrian Suciu 33:c3ec596a29c2 37 #define AD7798_CH2 (1 << 1) /* Channel 2 */
Adrian Suciu 33:c3ec596a29c2 38 #define AD7798_CH1 (1 << 0) /* Channel 1 */
Adrian Suciu 33:c3ec596a29c2 39
Adrian Suciu 33:c3ec596a29c2 40 /* Mode Register Bit Designations (AD7798_REG_MODE) */
Adrian Suciu 33:c3ec596a29c2 41 #define AD7798_MODE_SEL(x) (((x) & 0x7) << 13) /* Operation Mode Select */
Adrian Suciu 33:c3ec596a29c2 42 #define AD7798_MODE_PSW(x) (1 << 12) /* Power Switch Control Bit */
Adrian Suciu 33:c3ec596a29c2 43 #define AD7798_MODE_RATE(x) ((x) & 0xF) /* Filter Update Rate Select */
Adrian Suciu 33:c3ec596a29c2 44
Adrian Suciu 33:c3ec596a29c2 45 /* AD7798_MODE_SEL(x) options */
Adrian Suciu 33:c3ec596a29c2 46 #define AD7798_MODE_CONT 0 /* Continuous Conversion Mode */
Adrian Suciu 33:c3ec596a29c2 47 #define AD7798_MODE_SINGLE 1 /* Single Conversion Mode */
Adrian Suciu 33:c3ec596a29c2 48 #define AD7798_MODE_IDLE 2 /* Idle Mode */
Adrian Suciu 33:c3ec596a29c2 49 #define AD7798_MODE_PWRDN 3 /* Power-Down Mode */
Adrian Suciu 33:c3ec596a29c2 50 #define AD7798_MODE_CAL_INT_ZERO 4 /* Internal Zero-Scale Calibration */
Adrian Suciu 33:c3ec596a29c2 51 #define AD7798_MODE_CAL_INT_FULL 5 /* Internal Full-Scale Calibration */
Adrian Suciu 33:c3ec596a29c2 52 #define AD7798_MODE_CAL_SYS_ZERO 6 /* System Zero-Scale Calibration */
Adrian Suciu 33:c3ec596a29c2 53 #define AD7798_MODE_CAL_SYS_FULL 7 /* System Full-Scale Calibration */
Adrian Suciu 33:c3ec596a29c2 54
Adrian Suciu 33:c3ec596a29c2 55 /* Configuration Register Bit Designations (AD7798_REG_CONF) */
Adrian Suciu 33:c3ec596a29c2 56 #define AD7798_CONF_BO_EN (1 << 13) /* Burnout Current Enable */
Adrian Suciu 33:c3ec596a29c2 57 #define AD7798_CONF_UNIPOLAR (1 << 12) /* Unipolar/Bipolar Enable */
Adrian Suciu 33:c3ec596a29c2 58 #define AD7798_CONF_GAIN(x) (((x) & 0x7) << 8) /* Gain Select */
Adrian Suciu 33:c3ec596a29c2 59 #define AD7798_CONF_REFDET(x) (((x) & 0x1) << 5) /* Reference detect function */
Adrian Suciu 33:c3ec596a29c2 60 #define AD7798_CONF_BUF (1 << 4) /* Buffered Mode Enable */
Adrian Suciu 33:c3ec596a29c2 61 #define AD7798_CONF_CHAN(x) ((x) & 0x7) /* Channel select */
Adrian Suciu 33:c3ec596a29c2 62
Adrian Suciu 33:c3ec596a29c2 63 /* AD7798_CONF_GAIN(x) options */
Adrian Suciu 33:c3ec596a29c2 64 #define AD7798_GAIN_1 0
Adrian Suciu 33:c3ec596a29c2 65 #define AD7798_GAIN_2 1
Adrian Suciu 33:c3ec596a29c2 66 #define AD7798_GAIN_4 2
Adrian Suciu 33:c3ec596a29c2 67 #define AD7798_GAIN_8 3
Adrian Suciu 33:c3ec596a29c2 68 #define AD7798_GAIN_16 4
Adrian Suciu 33:c3ec596a29c2 69 #define AD7798_GAIN_32 5
Adrian Suciu 33:c3ec596a29c2 70 #define AD7798_GAIN_64 6
Adrian Suciu 33:c3ec596a29c2 71 #define AD7798_GAIN_128 7
Adrian Suciu 33:c3ec596a29c2 72
Adrian Suciu 33:c3ec596a29c2 73 /* AD7798_CONF_REFDET(x) options */
Adrian Suciu 33:c3ec596a29c2 74 #define AD7798_REFDET_ENA 1
Adrian Suciu 33:c3ec596a29c2 75 #define AD7798_REFDET_DIS 0
Adrian Suciu 33:c3ec596a29c2 76
Adrian Suciu 33:c3ec596a29c2 77 /* AD7798_CONF_CHAN(x) options */
Adrian Suciu 33:c3ec596a29c2 78 #define AD7798_CH_AIN1P_AIN1M 0 /* AIN1(+) - AIN1(-) */
Adrian Suciu 33:c3ec596a29c2 79 #define AD7798_CH_AIN2P_AIN2M 1 /* AIN2(+) - AIN2(-) */
Adrian Suciu 33:c3ec596a29c2 80 #define AD7798_CH_AIN3P_AIN3M 2 /* AIN3(+) - AIN3(-) */
Adrian Suciu 33:c3ec596a29c2 81 #define AD7798_CH_AIN1M_AIN1M 3 /* AIN1(-) - AIN1(-) */
Adrian Suciu 33:c3ec596a29c2 82 #define AD7798_CH_AVDD_MONITOR 7 /* AVDD Monitor */
Adrian Suciu 33:c3ec596a29c2 83
Adrian Suciu 33:c3ec596a29c2 84 /* ID Register Bit Designations (AD7798_REG_ID) */
Adrian Suciu 33:c3ec596a29c2 85 #define AD7798_ID 0x8
Adrian Suciu 33:c3ec596a29c2 86 #define AD7798_ID_MASK 0xF
Adrian Suciu 33:c3ec596a29c2 87
Adrian Suciu 33:c3ec596a29c2 88 /* IO (Excitation Current Sources) Register Bit Designations (AD7798_REG_IO) */
Adrian Suciu 33:c3ec596a29c2 89 #define AD7798_IOEN (1 << 6)
Adrian Suciu 33:c3ec596a29c2 90 #define AD7798_IO1(x) (((x) & 0x1) << 4)
Adrian Suciu 33:c3ec596a29c2 91 #define AD7798_IO2(x) (((x) & 0x1) << 5)
Adrian Suciu 33:c3ec596a29c2 92
Adrian Suciu 33:c3ec596a29c2 93 #define TRUE 1
Adrian Suciu 33:c3ec596a29c2 94 #define FALSE 0
Adrian Suciu 33:c3ec596a29c2 95
Adrian Suciu 33:c3ec596a29c2 96 #define AD7798_UNIPOLAR TRUE
Adrian Suciu 33:c3ec596a29c2 97 #define AD7798_BIPOLAR FALSE
Adrian Suciu 33:c3ec596a29c2 98
Adrian Suciu 33:c3ec596a29c2 99 #define AD7798_ENABLE TRUE
Adrian Suciu 33:c3ec596a29c2 100 #define AD7798_DISABLE FALSE
Adrian Suciu 33:c3ec596a29c2 101
Adrian Suciu 33:c3ec596a29c2 102 /******************************************************************************/
Adrian Suciu 33:c3ec596a29c2 103 /* Functions Prototypes */
Adrian Suciu 33:c3ec596a29c2 104 /*****************************************************************************/
Adrian Suciu 33:c3ec596a29c2 105
Adrian Suciu 33:c3ec596a29c2 106 class AD7798
Adrian Suciu 33:c3ec596a29c2 107 {
Adrian Suciu 33:c3ec596a29c2 108 public:
Adrian Suciu 33:c3ec596a29c2 109 AD7798( PinName CS, PinName MOSI = SPI_MOSI, PinName MISO = SPI_MISO, PinName SCK = SPI_SCK);
Adrian Suciu 33:c3ec596a29c2 110 /* Initialize AD7798 and check if the device is present*/
Adrian Suciu 33:c3ec596a29c2 111 uint8_t init(void);
Adrian Suciu 33:c3ec596a29c2 112 void frequency(int hz);
Adrian Suciu 33:c3ec596a29c2 113 /* Sends 32 consecutive 1's on SPI in order to reset the part. */
Adrian Suciu 33:c3ec596a29c2 114 void reset(void);
Adrian Suciu 33:c3ec596a29c2 115 /* Reads the value of the selected register. */
Adrian Suciu 33:c3ec596a29c2 116 uint16_t get_register_value(uint8_t regAddress, uint8_t size, bool toggle_cs = true);
Adrian Suciu 33:c3ec596a29c2 117 /* Writes a value to the register. */
Adrian Suciu 33:c3ec596a29c2 118 void set_register_value(uint8_t regAddress, uint16_t regValue, uint8_t size, bool toggle_cs = true);
Adrian Suciu 33:c3ec596a29c2 119 /* Sets the operating mode of AD7798. */
Adrian Suciu 33:c3ec596a29c2 120 void set_mode(uint8_t mode);
Adrian Suciu 33:c3ec596a29c2 121 /* Reads /RDY bit of Status register. */
Adrian Suciu 33:c3ec596a29c2 122 uint8_t ready(void);
Adrian Suciu 33:c3ec596a29c2 123 /* Selects the channel of AD7798. */
Adrian Suciu 33:c3ec596a29c2 124 void set_channel(uint8_t channel);
Adrian Suciu 33:c3ec596a29c2 125 /* Sets the gain of the In-Amp. */
Adrian Suciu 33:c3ec596a29c2 126 void set_gain(uint16_t gain);
Adrian Suciu 33:c3ec596a29c2 127 /* Enables or disables the reference detect function. */
Adrian Suciu 33:c3ec596a29c2 128 void set_reference(uint8_t state);
Adrian Suciu 33:c3ec596a29c2 129
Adrian Suciu 33:c3ec596a29c2 130 void set_filter(uint8_t filter);
Adrian Suciu 33:c3ec596a29c2 131 void set_coding_mode(uint8_t mode);
Adrian Suciu 33:c3ec596a29c2 132 void set_burnout_current(uint8_t select);
Adrian Suciu 33:c3ec596a29c2 133
Adrian Suciu 33:c3ec596a29c2 134 void read_data(uint8_t adcChannel, uint16_t *adcData);
Adrian Suciu 33:c3ec596a29c2 135
Adrian Suciu 33:c3ec596a29c2 136 uint8_t spi_read(uint8_t *data, uint8_t bytes_number, bool toggle_cs = true);
Adrian Suciu 33:c3ec596a29c2 137 uint8_t spi_write(uint8_t *data, uint8_t bytes_number, bool toggle_cs = true);
Adrian Suciu 33:c3ec596a29c2 138
Adrian Suciu 33:c3ec596a29c2 139
Adrian Suciu 33:c3ec596a29c2 140
Adrian Suciu 33:c3ec596a29c2 141 //DigitalIn miso;///< DigitalIn must be initialized before SPI to prevent pin MUX overwrite
Adrian Suciu 33:c3ec596a29c2 142 SPI ad7798;
Adrian Suciu 33:c3ec596a29c2 143 DigitalOut cs;
Adrian Suciu 33:c3ec596a29c2 144
Adrian Suciu 33:c3ec596a29c2 145 private:
Adrian Suciu 33:c3ec596a29c2 146 const uint8_t _SPI_MODE = 0x03;
Adrian Suciu 33:c3ec596a29c2 147 };
Adrian Suciu 33:c3ec596a29c2 148 #endif // _AD7798_H_