Analog Devices / Mbed OS EVAL-AD7124-Temperature_measurement

Example program for EVAL-AD7124

Dependencies:   tempsensors adi_console_menu platform_drivers

app/ad7124_regs_config_thermocouple.c@1:c863d7e9e272, 2021-02-22 (annotated)

Committer:
mahphalke
Date:
Mon Feb 22 05:13:58 2021 +0000
Revision:
1:c863d7e9e272
Child:
3:f20f09251190
Initial commit- Added source files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mahphalke 1:c863d7e9e272 1 /***************************************************************************//**
mahphalke 1:c863d7e9e272 2 * @file ad7124_regs_config_thermocouple.c
mahphalke 1:c863d7e9e272 3 * @brief AD7124 register configuration file for thermocouple sensor interface
mahphalke 1:c863d7e9e272 4 * @details
mahphalke 1:c863d7e9e272 5 ********************************************************************************
mahphalke 1:c863d7e9e272 6 * Copyright (c) 2021 Analog Devices, Inc.
mahphalke 1:c863d7e9e272 7 * All rights reserved.
mahphalke 1:c863d7e9e272 8 *
mahphalke 1:c863d7e9e272 9 * This software is proprietary to Analog Devices, Inc. and its licensors.
mahphalke 1:c863d7e9e272 10 * By using this software you agree to the terms of the associated
mahphalke 1:c863d7e9e272 11 * Analog Devices Software License Agreement.
mahphalke 1:c863d7e9e272 12 *******************************************************************************/
mahphalke 1:c863d7e9e272 13
mahphalke 1:c863d7e9e272 14 /******************************************************************************/
mahphalke 1:c863d7e9e272 15 /***************************** Include Files **********************************/
mahphalke 1:c863d7e9e272 16 /******************************************************************************/
mahphalke 1:c863d7e9e272 17
mahphalke 1:c863d7e9e272 18 #include "ad7124_regs_configs.h"
mahphalke 1:c863d7e9e272 19
mahphalke 1:c863d7e9e272 20 /******************************************************************************/
mahphalke 1:c863d7e9e272 21 /********************* Macros and Constants Definitions ***********************/
mahphalke 1:c863d7e9e272 22 /******************************************************************************/
mahphalke 1:c863d7e9e272 23
mahphalke 1:c863d7e9e272 24 const struct ad7124_st_reg ad7124_regs_config_thermocouple[AD7124_REG_NO] = {
mahphalke 1:c863d7e9e272 25 { AD7124_STATUS_REG, 0x0, 1, AD7124_R },
mahphalke 1:c863d7e9e272 26 {
mahphalke 1:c863d7e9e272 27 AD7124_ADC_CTRL_REG,
mahphalke 1:c863d7e9e272 28 AD7124_ADC_CTRL_REG_MODE(2) | AD7124_ADC_CTRL_REG_REF_EN | // ADC in Standby mode, Int Ref enabled
mahphalke 1:c863d7e9e272 29 AD7124_ADC_CTRL_REG_POWER_MODE(2) | // Full power mode
mahphalke 1:c863d7e9e272 30 AD7124_ADC_CTRL_REG_CS_EN | AD7124_ADC_CTRL_REG_DATA_STATUS, // CS mode enable, Status along data
mahphalke 1:c863d7e9e272 31 2, AD7124_RW
mahphalke 1:c863d7e9e272 32 },
mahphalke 1:c863d7e9e272 33 { AD7124_DATA_REG, 0x0, 3, AD7124_R },
mahphalke 1:c863d7e9e272 34 { AD7124_IO_CTRL1_REG, 0x0, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 35 { AD7124_IO_CTRL2_REG, 0x0, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 36 { AD7124_ID_REG, 0x0, 1, AD7124_R },
mahphalke 1:c863d7e9e272 37 { AD7124_ERR_REG, 0x0, 3, AD7124_R },
mahphalke 1:c863d7e9e272 38 {
mahphalke 1:c863d7e9e272 39 AD7124_ERREN_REG,
mahphalke 1:c863d7e9e272 40 AD7124_ERR_REG_SPI_CRC_ERR | AD7124_ERR_REG_SPI_IGNORE_ERR |
mahphalke 1:c863d7e9e272 41 AD7124_ERREN_REG_ADC_CAL_ERR_EN, // Monitor ADC calibration error
mahphalke 1:c863d7e9e272 42 3,
mahphalke 1:c863d7e9e272 43 AD7124_RW
mahphalke 1:c863d7e9e272 44 },
mahphalke 1:c863d7e9e272 45 { 0x08, 0x00, 1, AD7124_R },
mahphalke 1:c863d7e9e272 46 {
mahphalke 1:c863d7e9e272 47 AD7124_CH0_MAP_REG,
mahphalke 1:c863d7e9e272 48 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 1:c863d7e9e272 49 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE1_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE1_AINM),
mahphalke 1:c863d7e9e272 50 2, AD7124_RW
mahphalke 1:c863d7e9e272 51 },
mahphalke 1:c863d7e9e272 52 {
mahphalke 1:c863d7e9e272 53 AD7124_CH1_MAP_REG,
mahphalke 1:c863d7e9e272 54 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 1:c863d7e9e272 55 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE2_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE2_AINM),
mahphalke 1:c863d7e9e272 56 2, AD7124_RW
mahphalke 1:c863d7e9e272 57 },
mahphalke 1:c863d7e9e272 58 {
mahphalke 1:c863d7e9e272 59 AD7124_CH2_MAP_REG,
mahphalke 1:c863d7e9e272 60 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 1:c863d7e9e272 61 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE3_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE3_AINM),
mahphalke 1:c863d7e9e272 62 2,
mahphalke 1:c863d7e9e272 63 AD7124_RW
mahphalke 1:c863d7e9e272 64 },
mahphalke 1:c863d7e9e272 65 {
mahphalke 1:c863d7e9e272 66 AD7124_CH3_MAP_REG,
mahphalke 1:c863d7e9e272 67 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 1:c863d7e9e272 68 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE4_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE4_AINM),
mahphalke 1:c863d7e9e272 69 2,
mahphalke 1:c863d7e9e272 70 AD7124_RW
mahphalke 1:c863d7e9e272 71 },
mahphalke 1:c863d7e9e272 72 {
mahphalke 1:c863d7e9e272 73 AD7124_CH4_MAP_REG,
mahphalke 1:c863d7e9e272 74 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 1:c863d7e9e272 75 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE5_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE5_AINM),
mahphalke 1:c863d7e9e272 76 2,
mahphalke 1:c863d7e9e272 77 AD7124_RW
mahphalke 1:c863d7e9e272 78 },
mahphalke 1:c863d7e9e272 79 {
mahphalke 1:c863d7e9e272 80 AD7124_CH5_MAP_REG,
mahphalke 1:c863d7e9e272 81 AD7124_CH_MAP_REG_SETUP(0) |
mahphalke 1:c863d7e9e272 82 AD7124_CH_MAP_REG_AINP(THERMOCOUPLE6_AINP) | AD7124_CH_MAP_REG_AINM(THERMOCOUPLE6_AINM),
mahphalke 1:c863d7e9e272 83 2,
mahphalke 1:c863d7e9e272 84 AD7124_RW
mahphalke 1:c863d7e9e272 85 },
mahphalke 1:c863d7e9e272 86 {
mahphalke 1:c863d7e9e272 87 AD7124_CH6_MAP_REG,
mahphalke 1:c863d7e9e272 88 AD7124_CH_MAP_REG_SETUP(1) |
mahphalke 1:c863d7e9e272 89 AD7124_CH_MAP_REG_AINP(CJC_4WIRE_RTD_AINP) | AD7124_CH_MAP_REG_AINM(CJC_4WIRE_RTD_AINM),
mahphalke 1:c863d7e9e272 90 2, AD7124_RW
mahphalke 1:c863d7e9e272 91 },
mahphalke 1:c863d7e9e272 92 {
mahphalke 1:c863d7e9e272 93 AD7124_CH7_MAP_REG,
mahphalke 1:c863d7e9e272 94 AD7124_CH_MAP_REG_SETUP(2) |
mahphalke 1:c863d7e9e272 95 AD7124_CH_MAP_REG_AINP(CJC_PTC_THERMISTOR_AINP) | AD7124_CH_MAP_REG_AINM(CJC_PTC_THERMISTOR_AINM),
mahphalke 1:c863d7e9e272 96 2, AD7124_RW
mahphalke 1:c863d7e9e272 97 },
mahphalke 1:c863d7e9e272 98 { AD7124_CH8_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 99 { AD7124_CH9_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 100 { AD7124_CH10_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 101 { AD7124_CH11_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 102 { AD7124_CH12_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 103 { AD7124_CH13_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 104 { AD7124_CH14_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 105 { AD7124_CH15_MAP_REG, 0x0001, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 106
mahphalke 1:c863d7e9e272 107 {
mahphalke 1:c863d7e9e272 108 AD7124_CFG0_REG,
mahphalke 1:c863d7e9e272 109 AD7124_CFG_REG_PGA(THERMOCOUPLE_GAIN_VALUE) | AD7124_CFG_REG_REF_SEL(2) | // Internal Ref
mahphalke 1:c863d7e9e272 110 AD7124_CFG_REG_BIPOLAR | // Bipolar inputs
mahphalke 1:c863d7e9e272 111 AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_AIN_BUFP | // Input buffers enabled
mahphalke 1:c863d7e9e272 112 AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_REF_BUFP, // Ref buffers enabled
mahphalke 1:c863d7e9e272 113 2, AD7124_RW
mahphalke 1:c863d7e9e272 114 },
mahphalke 1:c863d7e9e272 115 {
mahphalke 1:c863d7e9e272 116 AD7124_CFG1_REG,
mahphalke 1:c863d7e9e272 117 AD7124_CFG_REG_PGA(RTD_GAIN_VALUE) | AD7124_CFG_REG_REF_SEL(0) | // External REFIN
mahphalke 1:c863d7e9e272 118 AD7124_CFG_REG_BIPOLAR | // Bipolar inputs
mahphalke 1:c863d7e9e272 119 AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_AIN_BUFP | // Input buffers enabled
mahphalke 1:c863d7e9e272 120 AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_REF_BUFP, // Ref buffers enabled
mahphalke 1:c863d7e9e272 121 2, AD7124_RW
mahphalke 1:c863d7e9e272 122 },
mahphalke 1:c863d7e9e272 123 {
mahphalke 1:c863d7e9e272 124 AD7124_CFG2_REG,
mahphalke 1:c863d7e9e272 125 AD7124_CFG_REG_PGA(THERMISTOR_GAIN_VALUE) | AD7124_CFG_REG_REF_SEL(0) | // External REFIN
mahphalke 1:c863d7e9e272 126 AD7124_CFG_REG_BIPOLAR | // Bipolar inputs
mahphalke 1:c863d7e9e272 127 AD7124_CFG_REG_AINN_BUFM | AD7124_CFG_REG_AIN_BUFP | // Input buffers enabled
mahphalke 1:c863d7e9e272 128 AD7124_CFG_REG_REF_BUFM | AD7124_CFG_REG_REF_BUFP, // Ref buffers enabled
mahphalke 1:c863d7e9e272 129 2, AD7124_RW
mahphalke 1:c863d7e9e272 130 },
mahphalke 1:c863d7e9e272 131 { AD7124_CFG3_REG, 0x0860, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 132 { AD7124_CFG4_REG, 0x0860, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 133 { AD7124_CFG5_REG, 0x0860, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 134 { AD7124_CFG6_REG, 0x0860, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 135 { AD7124_CFG7_REG, 0x0860, 2, AD7124_RW },
mahphalke 1:c863d7e9e272 136
mahphalke 1:c863d7e9e272 137 {
mahphalke 1:c863d7e9e272 138 AD7124_FILT0_REG,
mahphalke 1:c863d7e9e272 139 AD7124_FILT_REG_FS(48) | AD7124_FILT_REG_POST_FILTER(3), // ODR= 50SPS, Post filter= 25SPS
mahphalke 1:c863d7e9e272 140 3, AD7124_RW
mahphalke 1:c863d7e9e272 141 },
mahphalke 1:c863d7e9e272 142 {
mahphalke 1:c863d7e9e272 143 AD7124_FILT1_REG,
mahphalke 1:c863d7e9e272 144 AD7124_FILT_REG_FS(48) | AD7124_FILT_REG_POST_FILTER(3), // ODR= 50SPS, Post filter= 25SPS
mahphalke 1:c863d7e9e272 145 3, AD7124_RW
mahphalke 1:c863d7e9e272 146 },
mahphalke 1:c863d7e9e272 147 {
mahphalke 1:c863d7e9e272 148 AD7124_FILT2_REG,
mahphalke 1:c863d7e9e272 149 AD7124_FILT_REG_FS(48) | AD7124_FILT_REG_POST_FILTER(3), // ODR= 50SPS, Post filter= 25SPS
mahphalke 1:c863d7e9e272 150 3, AD7124_RW
mahphalke 1:c863d7e9e272 151 },
mahphalke 1:c863d7e9e272 152 { AD7124_FILT3_REG, 0x060180, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 153 { AD7124_FILT4_REG, 0x060180, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 154 { AD7124_FILT5_REG, 0x060180, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 155 { AD7124_FILT6_REG, 0x060180, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 156 { AD7124_FILT7_REG, 0x060180, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 157
mahphalke 1:c863d7e9e272 158 {AD7124_OFFS0_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 159 {AD7124_OFFS1_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 160 {AD7124_OFFS2_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 161 {AD7124_OFFS3_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 162 {AD7124_OFFS4_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 163 {AD7124_OFFS5_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 164 {AD7124_OFFS6_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 165 {AD7124_OFFS7_REG, 0x800000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 166
mahphalke 1:c863d7e9e272 167 {AD7124_GAIN0_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 168 {AD7124_GAIN1_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 169 {AD7124_GAIN2_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 170 {AD7124_GAIN3_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 171 {AD7124_GAIN4_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 172 {AD7124_GAIN5_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 173 {AD7124_GAIN6_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 174 {AD7124_GAIN7_REG, 0x500000, 3, AD7124_RW },
mahphalke 1:c863d7e9e272 175 };
mahphalke 1:c863d7e9e272 176