Analog Devices / ADE120x

Library files for AD1234.

ADE120x.cpp@2:f9a986799375, 2019-10-15 (annotated)

Committer:
mlambe
Date:
Tue Oct 15 12:06:51 2019 +0000
Revision:
2:f9a986799375
Parent:
1:2eb9d6296ec3
Child:
3:6c708642886d
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mlambe 1:2eb9d6296ec3 1 /**
mlambe 1:2eb9d6296ec3 2 * @file ADE120x.cpp
mlambe 1:2eb9d6296ec3 3 * @brief ADE120x library. This file contains all ADE120x library functions.
mlambe 1:2eb9d6296ec3 4 * @version V0.0.1
mlambe 1:2eb9d6296ec3 5 * @author ADI
mlambe 1:2eb9d6296ec3 6 * @date October 2019
mlambe 1:2eb9d6296ec3 7 * @par Revision History:
mlambe 1:2eb9d6296ec3 8 *
mlambe 1:2eb9d6296ec3 9 * Copyright (c) 2017-2019 Analog Devices, Inc. All Rights Reserved.
mlambe 1:2eb9d6296ec3 10 *
mlambe 1:2eb9d6296ec3 11 * This software is proprietary to Analog Devices, Inc. and its licensors.
mlambe 1:2eb9d6296ec3 12 * By using this software you agree to the terms of the associated
mlambe 1:2eb9d6296ec3 13 * Analog Devices Software License Agreement.
mlambe 1:2eb9d6296ec3 14 **/
mlambe 1:2eb9d6296ec3 15
mlambe 1:2eb9d6296ec3 16 #include "ADE120x.h"
mlambe 1:2eb9d6296ec3 17
mlambe 1:2eb9d6296ec3 18 /* Constructor for ADE120x; intializes the SPI interface only */
mlambe 1:2eb9d6296ec3 19 ADE120x::ADE120x( PinName mosi,PinName miso,PinName sclk,PinName cs) : spi_(mosi, miso, sclk), nCS_(cs) {
mlambe 1:2eb9d6296ec3 20 //5MHz, allowed up to 10MHz
mlambe 1:2eb9d6296ec3 21 nCS_ = 1;
mlambe 1:2eb9d6296ec3 22 spi_.frequency(5000000);
mlambe 1:2eb9d6296ec3 23 spi_.format(16, 3);
mlambe 1:2eb9d6296ec3 24 }
mlambe 1:2eb9d6296ec3 25
mlambe 1:2eb9d6296ec3 26 /**
mlambe 2:f9a986799375 27 @brief Write to ADE120x register through SPI.
mlambe 2:f9a986799375 28 @param addr: The address of the ADE120x device.
mlambe 1:2eb9d6296ec3 29 @param reg_addr: register address
mlambe 1:2eb9d6296ec3 30 @param data: register data
mlambe 2:f9a986799375 31 @return received data.
mlambe 1:2eb9d6296ec3 32 **/
mlambe 1:2eb9d6296ec3 33 void ADE120x::WriteReg(uint8_t addr, uint32_t reg_addr, uint32_t data)
mlambe 1:2eb9d6296ec3 34 {
mlambe 1:2eb9d6296ec3 35 int cmd;
mlambe 1:2eb9d6296ec3 36 nCS_ = 0;
mlambe 1:2eb9d6296ec3 37 wait_us(1);
mlambe 1:2eb9d6296ec3 38 cmd = reg_addr * 0x0010 + addr; //R/nW bit set to 0
mlambe 1:2eb9d6296ec3 39 spi_.write(cmd);
mlambe 1:2eb9d6296ec3 40 spi_.write(data);
mlambe 1:2eb9d6296ec3 41 wait_us(1);
mlambe 1:2eb9d6296ec3 42 nCS_ = 1;
mlambe 1:2eb9d6296ec3 43 }
mlambe 1:2eb9d6296ec3 44 /**
mlambe 2:f9a986799375 45 @brief Read ADE120x register through SPI.
mlambe 2:f9a986799375 46 @param addr: The address of the ADE120x device.
mlambe 1:2eb9d6296ec3 47 @param reg_addr: register address
mlambe 2:f9a986799375 48 @return received data.
mlambe 1:2eb9d6296ec3 49 **/
mlambe 1:2eb9d6296ec3 50 uint32_t ADE120x::ReadReg(uint8_t addr, uint32_t reg_addr)
mlambe 1:2eb9d6296ec3 51 {
mlambe 1:2eb9d6296ec3 52 int cmd;
mlambe 1:2eb9d6296ec3 53 int resp;
mlambe 1:2eb9d6296ec3 54 nCS_ = 0;
mlambe 1:2eb9d6296ec3 55 wait_us(1);
mlambe 1:2eb9d6296ec3 56 //cmd = REG*0x0020 + 0x18 + addr; //R/nW bit set to 0
mlambe 1:2eb9d6296ec3 57 cmd = reg_addr*0x0010 + 0x8 + addr;
mlambe 1:2eb9d6296ec3 58 spi_.write(cmd);
mlambe 1:2eb9d6296ec3 59 resp = spi_.write(0xFFFF);
mlambe 1:2eb9d6296ec3 60 wait_us(1);
mlambe 1:2eb9d6296ec3 61 nCS_ = 1;
mlambe 1:2eb9d6296ec3 62 return resp;
mlambe 1:2eb9d6296ec3 63 }
mlambe 1:2eb9d6296ec3 64
mlambe 1:2eb9d6296ec3 65 /**
mlambe 1:2eb9d6296ec3 66 @brief Reset ADE120x.
mlambe 1:2eb9d6296ec3 67 @param addr: The address of the ADE120x device.
mlambe 1:2eb9d6296ec3 68 @return return none.
mlambe 1:2eb9d6296ec3 69 **/
mlambe 1:2eb9d6296ec3 70 uint8_t ADE120x::Reset(uint8_t addr)
mlambe 1:2eb9d6296ec3 71 {
mlambe 1:2eb9d6296ec3 72 UnLock(addr);
mlambe 1:2eb9d6296ec3 73 WriteReg(addr, REG_CTRL, 0x0010);
mlambe 1:2eb9d6296ec3 74 //wait until RSTDONE bit is set
mlambe 2:f9a986799375 75 while ((ReadReg(addr, REG_INT_STATUS) & INTSRC_RSTDONE) == 0)
mlambe 2:f9a986799375 76 { }
mlambe 1:2eb9d6296ec3 77 return 0;
mlambe 1:2eb9d6296ec3 78 }
mlambe 1:2eb9d6296ec3 79
mlambe 1:2eb9d6296ec3 80 /**
mlambe 1:2eb9d6296ec3 81 @brief Read back device ID.
mlambe 1:2eb9d6296ec3 82 @param addr: The address of the ADE120x device.
mlambe 1:2eb9d6296ec3 83 @return device ID.
mlambe 1:2eb9d6296ec3 84 **/
mlambe 1:2eb9d6296ec3 85 uint16_t ADE120x::GetDevID(uint8_t addr)
mlambe 1:2eb9d6296ec3 86 {
mlambe 1:2eb9d6296ec3 87 uint16_t response;
mlambe 1:2eb9d6296ec3 88 response = ReadReg(addr, REG_CTRL);
mlambe 1:2eb9d6296ec3 89 return response;
mlambe 1:2eb9d6296ec3 90 }
mlambe 1:2eb9d6296ec3 91
mlambe 1:2eb9d6296ec3 92 /**
mlambe 1:2eb9d6296ec3 93 @brief Lock ADE120x. When device is locked all register writes are ignored
mlambe 1:2eb9d6296ec3 94 @param addr: The address of the ADE120x device.
mlambe 1:2eb9d6296ec3 95 @return none.
mlambe 1:2eb9d6296ec3 96 **/
mlambe 1:2eb9d6296ec3 97 void ADE120x::Lock(uint8_t addr)
mlambe 1:2eb9d6296ec3 98 {
mlambe 1:2eb9d6296ec3 99 WriteReg(addr, REG_LOCK, DEV_LOCK);
mlambe 1:2eb9d6296ec3 100 }
mlambe 1:2eb9d6296ec3 101
mlambe 1:2eb9d6296ec3 102 /**
mlambe 1:2eb9d6296ec3 103 @brief Unlock ADE120x. Unlock device before writing to registers
mlambe 1:2eb9d6296ec3 104 @param addr: The address of the ADE120x device.
mlambe 1:2eb9d6296ec3 105 @return none.
mlambe 1:2eb9d6296ec3 106 **/
mlambe 1:2eb9d6296ec3 107 void ADE120x::UnLock(uint8_t addr)
mlambe 1:2eb9d6296ec3 108 {
mlambe 1:2eb9d6296ec3 109 WriteReg(addr, REG_LOCK, DEV_UNLOCK);
mlambe 1:2eb9d6296ec3 110 wait_us(100);
mlambe 1:2eb9d6296ec3 111 }
mlambe 1:2eb9d6296ec3 112
mlambe 1:2eb9d6296ec3 113 /**
mlambe 2:f9a986799375 114 @brief Configure interrupt.
mlambe 2:f9a986799375 115 @param addr: the address of the ADE120x device.
mlambe 1:2eb9d6296ec3 116 @param IntSrcSel: Interrupt source to enable.
mlambe 2:f9a986799375 117 @return Status.
mlambe 1:2eb9d6296ec3 118 **/
mlambe 1:2eb9d6296ec3 119 void ADE120x::SetInt(uint8_t addr, uint16_t IntSrcSel)
mlambe 1:2eb9d6296ec3 120 {
mlambe 1:2eb9d6296ec3 121 WriteReg(addr, REG_MASK, IntSrcSel);
mlambe 1:2eb9d6296ec3 122 }
mlambe 2:f9a986799375 123
mlambe 1:2eb9d6296ec3 124 /**
mlambe 2:f9a986799375 125 @brief Clear interrupt status.
mlambe 2:f9a986799375 126 @param addr: the address of the ADE120x device.
mlambe 1:2eb9d6296ec3 127 @param IntSrcSel: Interrupt source to clear.
mlambe 2:f9a986799375 128 @return Status.
mlambe 1:2eb9d6296ec3 129 **/
mlambe 1:2eb9d6296ec3 130 void ADE120x::ClearIntStatus(uint8_t addr, uint16_t IntSrcSel)
mlambe 1:2eb9d6296ec3 131 {
mlambe 1:2eb9d6296ec3 132 WriteReg(addr, REG_INT_STATUS, IntSrcSel);
mlambe 1:2eb9d6296ec3 133 }
mlambe 1:2eb9d6296ec3 134
mlambe 1:2eb9d6296ec3 135 /**
mlambe 1:2eb9d6296ec3 136 @brief Get Interrupt Status.
mlambe 1:2eb9d6296ec3 137 @param addr: the address of the ADE120x device.
mlambe 1:2eb9d6296ec3 138 @return Status.
mlambe 1:2eb9d6296ec3 139 **/
mlambe 1:2eb9d6296ec3 140 uint16_t ADE120x::GetIntStatus(uint8_t addr)
mlambe 1:2eb9d6296ec3 141 {
mlambe 1:2eb9d6296ec3 142 uint16_t status;
mlambe 1:2eb9d6296ec3 143 status = ReadReg(addr, REG_INT_STATUS);
mlambe 1:2eb9d6296ec3 144 return status;
mlambe 1:2eb9d6296ec3 145 }
mlambe 1:2eb9d6296ec3 146
mlambe 1:2eb9d6296ec3 147 /**
mlambe 2:f9a986799375 148 @brief Configure ADC PGA gain.
mlambe 2:f9a986799375 149 @param addr: the address of the ADE120x device.
mlambe 1:2eb9d6296ec3 150 @param Gain: Select from the following
mlambe 1:2eb9d6296ec3 151 ADCPGA_1, ADCPGA_2, ADCPGA_5, ADCPGA_10.
mlambe 2:f9a986799375 152 @return Status.
mlambe 1:2eb9d6296ec3 153 **/
mlambe 1:2eb9d6296ec3 154 void ADE120x::SetPgaGain(uint8_t addr, uint16_t gain)
mlambe 1:2eb9d6296ec3 155 {
mlambe 1:2eb9d6296ec3 156 UnLock(addr);
mlambe 1:2eb9d6296ec3 157 WriteReg(addr, REG_PGA_GAIN, gain);
mlambe 1:2eb9d6296ec3 158 Lock(addr);
mlambe 1:2eb9d6296ec3 159 }
mlambe 2:f9a986799375 160
mlambe 1:2eb9d6296ec3 161 /**
mlambe 2:f9a986799375 162 @brief Read ADC data.
mlambe 2:f9a986799375 163 @param addr: the address of the ADE120x device.
mlambe 1:2eb9d6296ec3 164 @param src: ADC source, ADC_DECIMATOR to select decimator output. ADC_RAW for raw output.
mlambe 2:f9a986799375 165 @return Status.
mlambe 1:2eb9d6296ec3 166 **/
mlambe 1:2eb9d6296ec3 167 uint8_t ADE120x::ReadADC(uint8_t addr, int8_t src)
mlambe 1:2eb9d6296ec3 168 {
mlambe 1:2eb9d6296ec3 169 uint8_t code;
mlambe 1:2eb9d6296ec3 170 if(src == ADC_DECIMATOR)
mlambe 1:2eb9d6296ec3 171 code = ReadReg(addr, REG_ADCDEC);
mlambe 1:2eb9d6296ec3 172 else
mlambe 1:2eb9d6296ec3 173 code = ReadReg(addr, REG_ADC);
mlambe 1:2eb9d6296ec3 174 return code;
mlambe 1:2eb9d6296ec3 175 }
mlambe 1:2eb9d6296ec3 176
mlambe 1:2eb9d6296ec3 177 /**
mlambe 1:2eb9d6296ec3 178 @brief Set binary Threshold.
mlambe 1:2eb9d6296ec3 179 @param addr: the address of the ADE120x device.
mlambe 2:f9a986799375 180 @param thresh: Threshold value.
mlambe 1:2eb9d6296ec3 181 @return none.
mlambe 1:2eb9d6296ec3 182 **/
mlambe 1:2eb9d6296ec3 183 void ADE120x::SetBinaryThresh(uint8_t addr, uint16_t thresh)
mlambe 1:2eb9d6296ec3 184 {
mlambe 1:2eb9d6296ec3 185 WriteReg(addr, REG_BIN_THR, thresh);
mlambe 1:2eb9d6296ec3 186 }
mlambe 1:2eb9d6296ec3 187
mlambe 1:2eb9d6296ec3 188 /**
mlambe 1:2eb9d6296ec3 189 @brief Calculate threshold register code.
mlambe 2:f9a986799375 190 @param V_Thresh: Threshold value in volts.
mlambe 2:f9a986799375 191 @param ADCPga: PGA gain value
mlambe 2:f9a986799375 192 @param V_Gain: Gain of external voltage divider circuit
mlambe 1:2eb9d6296ec3 193 @return 0.
mlambe 1:2eb9d6296ec3 194 **/
mlambe 1:2eb9d6296ec3 195 uint8_t ADE120x::CalculateThreshCode(float V_Thresh, uint8_t ADCPga, float V_Gain)
mlambe 1:2eb9d6296ec3 196 {
mlambe 1:2eb9d6296ec3 197 uint8_t code;
mlambe 1:2eb9d6296ec3 198 float tmp;
mlambe 1:2eb9d6296ec3 199 tmp = (V_Thresh * V_Gain * ADCPga * 255)/1.25 + 0.5;
mlambe 1:2eb9d6296ec3 200 code = (uint8_t)tmp;
mlambe 1:2eb9d6296ec3 201 return code;
mlambe 1:2eb9d6296ec3 202 }
mlambe 1:2eb9d6296ec3 203
mlambe 1:2eb9d6296ec3 204 /**
mlambe 2:f9a986799375 205 @brief Configure threshold voltage for BIN, WARNA, WARNB and WARNC.
mlambe 2:f9a986799375 206 @param addr: the address of the ADE120x device.
mlambe 2:f9a986799375 207 @param pCfg: Pointer to structure
mlambe 1:2eb9d6296ec3 208 @return 0.
mlambe 1:2eb9d6296ec3 209 **/
mlambe 1:2eb9d6296ec3 210 uint8_t ADE120x::ThresholdCfg(uint8_t addr, THRESHCfg_Type *pCfg)
mlambe 1:2eb9d6296ec3 211 {
mlambe 1:2eb9d6296ec3 212 uint8_t Thresh_H, Thresh_L;
mlambe 1:2eb9d6296ec3 213 uint16_t bin_ctrl, tmp;
mlambe 1:2eb9d6296ec3 214 UnLock(addr);
mlambe 1:2eb9d6296ec3 215 Thresh_H = CalculateThreshCode(pCfg->BIN_HighThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 216 Thresh_L = CalculateThreshCode(pCfg->BIN_LowThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 217 WriteReg(addr, REG_BIN_THR, (Thresh_L<<8)|Thresh_H);
mlambe 1:2eb9d6296ec3 218
mlambe 1:2eb9d6296ec3 219 Thresh_H = CalculateThreshCode(pCfg->WARNA_HighThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 220 Thresh_L = CalculateThreshCode(pCfg->WARNA_LowThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 221 WriteReg(addr, REG_WARNA_THR , (Thresh_L<<8)|Thresh_H);
mlambe 1:2eb9d6296ec3 222
mlambe 1:2eb9d6296ec3 223 Thresh_H = CalculateThreshCode(pCfg->WARNB_HighThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 224 Thresh_L = CalculateThreshCode(pCfg->WARNB_LowThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 225 WriteReg(addr, REG_WARNB_THR, (Thresh_L<<8)|Thresh_H);
mlambe 1:2eb9d6296ec3 226
mlambe 1:2eb9d6296ec3 227 Thresh_H = CalculateThreshCode(pCfg->WARNC_HighThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 228 Thresh_L = CalculateThreshCode(pCfg->WARNC_LowThresh, pCfg->ADCPga, pCfg->VGain);
mlambe 1:2eb9d6296ec3 229 WriteReg(addr, REG_WARNC_THR, (Thresh_L<<8)|Thresh_H);
mlambe 1:2eb9d6296ec3 230
mlambe 1:2eb9d6296ec3 231 bin_ctrl = (pCfg->BIN_Mode<<6)|(pCfg->WARNA_Mode<<8)|(pCfg->WARNB_Mode<<10)|(pCfg->WARNC_Mode<<12);
mlambe 1:2eb9d6296ec3 232 tmp = ReadReg(addr, REG_BIN_CTRL);
mlambe 1:2eb9d6296ec3 233 tmp &= 0xFFFF&~(0xFF<<6);
mlambe 1:2eb9d6296ec3 234 WriteReg(addr, REG_BIN_CTRL, tmp|bin_ctrl);
mlambe 1:2eb9d6296ec3 235 tmp = ReadReg(addr, REG_BIN_CTRL);
mlambe 1:2eb9d6296ec3 236 return 0;
mlambe 1:2eb9d6296ec3 237 }
mlambe 2:f9a986799375 238
mlambe 1:2eb9d6296ec3 239 /**
mlambe 1:2eb9d6296ec3 240 @brief Configure programmable load.
mlambe 2:f9a986799375 241 @param addr: the address of the ADE120x device.
mlambe 2:f9a986799375 242 @param pCfg: Pointer to structure
mlambe 1:2eb9d6296ec3 243 @return 0.
mlambe 1:2eb9d6296ec3 244 **/
mlambe 1:2eb9d6296ec3 245 uint8_t ADE120x::ProgrammableLoadCfg(uint8_t addr, PLOADCfg_Type *pCfg)
mlambe 1:2eb9d6296ec3 246 {
mlambe 1:2eb9d6296ec3 247 float tmp;
mlambe 1:2eb9d6296ec3 248 WriteReg(addr, REG_PL_CTRL, pCfg->mode);
mlambe 1:2eb9d6296ec3 249 if(pCfg->mode == LOW_IDLE)
mlambe 1:2eb9d6296ec3 250 WriteReg(addr, REG_PL_RISE_THR,
mlambe 1:2eb9d6296ec3 251 CalculateThreshCode(pCfg->VoltThresh, pCfg->ADCPga, pCfg->VGain));
mlambe 1:2eb9d6296ec3 252
mlambe 1:2eb9d6296ec3 253 tmp = (pCfg->HighCurrent/0.2) + 0.5f; /* add 0.5 to round up */
mlambe 1:2eb9d6296ec3 254 WriteReg(addr, REG_PL_HIGH_CODE, (uint16_t)tmp);
mlambe 1:2eb9d6296ec3 255
mlambe 1:2eb9d6296ec3 256 tmp = (pCfg->HighTime/10) + 0.5f;
mlambe 1:2eb9d6296ec3 257 WriteReg(addr, REG_PL_HIGH_TIME, (uint16_t)tmp);
mlambe 1:2eb9d6296ec3 258
mlambe 1:2eb9d6296ec3 259 tmp = (pCfg->LowCurrent/0.1) + 0.5f;
mlambe 1:2eb9d6296ec3 260 WriteReg(addr, REG_PL_LOW_CODE, (uint16_t)tmp);
mlambe 1:2eb9d6296ec3 261
mlambe 1:2eb9d6296ec3 262 if(pCfg->enable == CH1_Enable)
mlambe 1:2eb9d6296ec3 263 WriteReg(addr, REG_PL_EN, PL_CH1_ENABLE);
mlambe 1:2eb9d6296ec3 264 if(pCfg->enable == CH2_Enable)
mlambe 1:2eb9d6296ec3 265 WriteReg(addr, REG_PL_EN, PL_CH2_ENABLE);
mlambe 1:2eb9d6296ec3 266 if(pCfg->enable == CH1_CH2_Enable)
mlambe 1:2eb9d6296ec3 267 WriteReg(addr, REG_PL_EN, PL_CH2_ENABLE|PL_CH1_ENABLE);
mlambe 1:2eb9d6296ec3 268 if(pCfg->enable == CH1_Disable)
mlambe 1:2eb9d6296ec3 269 WriteReg(addr, REG_PL_EN, 0);
mlambe 1:2eb9d6296ec3 270
mlambe 1:2eb9d6296ec3 271 return 0;
mlambe 1:2eb9d6296ec3 272 }
mlambe 1:2eb9d6296ec3 273
mlambe 1:2eb9d6296ec3 274 /**
mlambe 1:2eb9d6296ec3 275 @brief Configure Energy Meter.
mlambe 2:f9a986799375 276 @param addr: the address of the ADE120x device.
mlambe 2:f9a986799375 277 @param pCfg: Pointer to structure
mlambe 1:2eb9d6296ec3 278 @return 0.
mlambe 1:2eb9d6296ec3 279 **/
mlambe 1:2eb9d6296ec3 280 uint8_t ADE120x::EnergyMtrCfg(uint8_t addr, EnergyMtrCfg_Type *pCfg)
mlambe 1:2eb9d6296ec3 281 {
mlambe 1:2eb9d6296ec3 282 float pulse_enrgy, AvgADCCode, tmp;
mlambe 1:2eb9d6296ec3 283 uint16_t reg_val, reg_mtr_ctrl;
mlambe 1:2eb9d6296ec3 284 AvgADCCode = (255*pCfg->WorkingVoltage*pCfg->VGain*pCfg->ADCPga)/1.25;
mlambe 1:2eb9d6296ec3 285 /* Step 1: Calculate pulse energy in Jules: (Pulse time * Working Current * Voltage) / 1000 */
mlambe 1:2eb9d6296ec3 286 pulse_enrgy = (pCfg->PulseMagnitude * pCfg->FET_Energy * pCfg->PulseTime)/1000;
mlambe 1:2eb9d6296ec3 287
mlambe 1:2eb9d6296ec3 288 /* Step 2: Calculate ENERGY_MTR register value: */
mlambe 1:2eb9d6296ec3 289 tmp = (AvgADCCode * (pCfg->PulseTime/1000))/(128 * pCfg->SampleRate)+0.5;
mlambe 1:2eb9d6296ec3 290 reg_val = (uint16_t)tmp;
mlambe 1:2eb9d6296ec3 291 WriteReg(addr, REG_EGY_MTR_THR, reg_val);
mlambe 1:2eb9d6296ec3 292
mlambe 1:2eb9d6296ec3 293
mlambe 1:2eb9d6296ec3 294 reg_mtr_ctrl = (pCfg->Cooldown_Decr<<8)|pCfg->Cooldown_Sec|(pCfg->Cooldown_TimeStep<<4)|(pCfg->Ov_Scale<<6);
mlambe 1:2eb9d6296ec3 295 WriteReg(addr, REG_EGY_MTR_CTRL, reg_mtr_ctrl);
mlambe 1:2eb9d6296ec3 296
mlambe 1:2eb9d6296ec3 297 return 1;
mlambe 1:2eb9d6296ec3 298 }
mlambe 1:2eb9d6296ec3 299
mlambe 1:2eb9d6296ec3 300 /**
mlambe 1:2eb9d6296ec3 301 @brief Read all ADE120xregisters.
mlambe 1:2eb9d6296ec3 302 @param addr: the address of the ADE120x device.
mlambe 1:2eb9d6296ec3 303 @return 0.
mlambe 1:2eb9d6296ec3 304 **/
mlambe 1:2eb9d6296ec3 305 void ADE120x::GetRegisterData(uint8_t addr, RegisterData_Type *pBuff)
mlambe 1:2eb9d6296ec3 306 {
mlambe 1:2eb9d6296ec3 307 uint16_t reg_addr[] = {
mlambe 1:2eb9d6296ec3 308 REG_CTRL,
mlambe 1:2eb9d6296ec3 309 REG_BIN_CTRL,
mlambe 1:2eb9d6296ec3 310 REG_BIN_THR,
mlambe 1:2eb9d6296ec3 311 REG_WARNA_THR,
mlambe 1:2eb9d6296ec3 312 REG_WARNB_THR,
mlambe 1:2eb9d6296ec3 313 REG_WARNC_THR,
mlambe 1:2eb9d6296ec3 314 REG_BIN_FILTER,
mlambe 1:2eb9d6296ec3 315 REG_WARNA_FILTER,
mlambe 1:2eb9d6296ec3 316 REG_WARNB_FILTER,
mlambe 1:2eb9d6296ec3 317 REG_WARNC_FILTER,
mlambe 1:2eb9d6296ec3 318 REG_MASK,
mlambe 1:2eb9d6296ec3 319 REG_PL_CTRL,
mlambe 1:2eb9d6296ec3 320 REG_PL_RISE_THR,
mlambe 1:2eb9d6296ec3 321 REG_PL_LOW_CODE,
mlambe 1:2eb9d6296ec3 322 REG_PL_HIGH_CODE,
mlambe 1:2eb9d6296ec3 323 REG_PL_HIGH_TIME,
mlambe 1:2eb9d6296ec3 324 REG_EGY_MTR_CTRL,
mlambe 1:2eb9d6296ec3 325 REG_EGY_MTR_THR,
mlambe 1:2eb9d6296ec3 326 REG_PL_EN,
mlambe 1:2eb9d6296ec3 327 REG_PGA_GAIN};
mlambe 1:2eb9d6296ec3 328
mlambe 1:2eb9d6296ec3 329 uint8_t reg_addr_size = sizeof(reg_addr)/sizeof(*reg_addr);
mlambe 1:2eb9d6296ec3 330 uint8_t i = 0;
mlambe 1:2eb9d6296ec3 331 while(i<reg_addr_size)
mlambe 1:2eb9d6296ec3 332 {
mlambe 1:2eb9d6296ec3 333 pBuff[i].reg_addr = reg_addr[i];
mlambe 1:2eb9d6296ec3 334 pBuff[i].reg_data = ReadReg(addr, reg_addr[i]);
mlambe 1:2eb9d6296ec3 335 i++;
mlambe 1:2eb9d6296ec3 336 wait_us(1000);
mlambe 1:2eb9d6296ec3 337 }
mlambe 1:2eb9d6296ec3 338 }
mlambe 2:f9a986799375 339
mlambe 1:2eb9d6296ec3 340 /**
mlambe 2:f9a986799375 341 @brief Convert ADC Code to voltage.
mlambe 2:f9a986799375 342 @param ADCCode: ADC code.
mlambe 2:f9a986799375 343 @param ADCPga: the actual 1.82V reference voltage.
mlambe 2:f9a986799375 344 @param VOLTAGE_Gain: THe gain factor set by the external resistor divider network
mlambe 2:f9a986799375 345 @return Voltage in volt.
mlambe 1:2eb9d6296ec3 346 **/
mlambe 2:f9a986799375 347 float ADE120x::ADCCode2Volt(uint32_t ADCCode, uint8_t ADCPga, float VOLTAGE_Gain)
mlambe 1:2eb9d6296ec3 348 {
mlambe 2:f9a986799375 349 float tmp = 0.0;
mlambe 2:f9a986799375 350 float fVolt = 0.0;
mlambe 2:f9a986799375 351 tmp = (ADCCode&0xFF);
mlambe 2:f9a986799375 352 tmp = 1.25 * (tmp/255) / VOLTAGE_Gain;
mlambe 2:f9a986799375 353 switch(ADCPga)
mlambe 1:2eb9d6296ec3 354 {
mlambe 2:f9a986799375 355 case ADCPGA_1:
mlambe 2:f9a986799375 356 fVolt = tmp;
mlambe 2:f9a986799375 357 break;
mlambe 2:f9a986799375 358 case ADCPGA_2:
mlambe 2:f9a986799375 359 fVolt = tmp/2;
mlambe 2:f9a986799375 360 break;
mlambe 2:f9a986799375 361 case ADCPGA_5:
mlambe 2:f9a986799375 362 fVolt = tmp/5;
mlambe 2:f9a986799375 363 break;
mlambe 2:f9a986799375 364 case ADCPGA_10:
mlambe 2:f9a986799375 365 fVolt = tmp/10;
mlambe 2:f9a986799375 366 break;
mlambe 2:f9a986799375 367 default:break;
mlambe 1:2eb9d6296ec3 368 }
mlambe 2:f9a986799375 369 return fVolt;
mlambe 1:2eb9d6296ec3 370 }