Analog Devices / AD7124

Analog Devices AD7124-8 - 8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference

Dependents:   CN0398 CN0391 CN0398_arduino

AD7124.cpp@1:4a4194a5a8ed, 2016-10-24 (annotated)

Committer:
adisuciu
Date:
Mon Oct 24 16:03:43 2016 +0000
Revision:
1:4a4194a5a8ed
Parent:
0:f32d3fb1d3e2
Child:
4:502352a643e6
Fixes for mbed compiler

Who changed what in which revision?

UserRevisionLine numberNew contents of line
adisuciu 0:f32d3fb1d3e2 1 /**
adisuciu 0:f32d3fb1d3e2 2 * @file AD7124.cpp
adisuciu 0:f32d3fb1d3e2 3 * @brief Source file for AD7124 ADC
adisuciu 0:f32d3fb1d3e2 4 * @author Analog Devices Inc.
adisuciu 0:f32d3fb1d3e2 5 *
adisuciu 0:f32d3fb1d3e2 6 * For support please go to:
adisuciu 0:f32d3fb1d3e2 7 * Github: https://github.com/analogdevicesinc/mbed-adi
adisuciu 0:f32d3fb1d3e2 8 * Support: https://ez.analog.com/community/linux-device-drivers/microcontroller-no-os-drivers
adisuciu 0:f32d3fb1d3e2 9 * Product: http://www.analog.com/ad7124
adisuciu 0:f32d3fb1d3e2 10 * More: https://wiki.analog.com/resources/tools-software/mbed-drivers-all
adisuciu 0:f32d3fb1d3e2 11
adisuciu 0:f32d3fb1d3e2 12 ********************************************************************************
adisuciu 0:f32d3fb1d3e2 13 * Copyright 2016(c) Analog Devices, Inc.
adisuciu 0:f32d3fb1d3e2 14 *
adisuciu 0:f32d3fb1d3e2 15 * All rights reserved.
adisuciu 0:f32d3fb1d3e2 16 *
adisuciu 0:f32d3fb1d3e2 17 * Redistribution and use in source and binary forms, with or without
adisuciu 0:f32d3fb1d3e2 18 * modification, are permitted provided that the following conditions are met:
adisuciu 0:f32d3fb1d3e2 19 * - Redistributions of source code must retain the above copyright
adisuciu 0:f32d3fb1d3e2 20 * notice, this list of conditions and the following disclaimer.
adisuciu 0:f32d3fb1d3e2 21 * - Redistributions in binary form must reproduce the above copyright
adisuciu 0:f32d3fb1d3e2 22 * notice, this list of conditions and the following disclaimer in
adisuciu 0:f32d3fb1d3e2 23 * the documentation and/or other materials provided with the
adisuciu 0:f32d3fb1d3e2 24 * distribution.
adisuciu 0:f32d3fb1d3e2 25 * - Neither the name of Analog Devices, Inc. nor the names of its
adisuciu 0:f32d3fb1d3e2 26 * contributors may be used to endorse or promote products derived
adisuciu 0:f32d3fb1d3e2 27 * from this software without specific prior written permission.
adisuciu 0:f32d3fb1d3e2 28 * - The use of this software may or may not infringe the patent rights
adisuciu 0:f32d3fb1d3e2 29 * of one or more patent holders. This license does not release you
adisuciu 0:f32d3fb1d3e2 30 * from the requirement that you obtain separate licenses from these
adisuciu 0:f32d3fb1d3e2 31 * patent holders to use this software.
adisuciu 0:f32d3fb1d3e2 32 * - Use of the software either in source or binary form, must be run
adisuciu 0:f32d3fb1d3e2 33 * on or directly connected to an Analog Devices Inc. component.
adisuciu 0:f32d3fb1d3e2 34 *
adisuciu 0:f32d3fb1d3e2 35 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
adisuciu 0:f32d3fb1d3e2 36 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
adisuciu 0:f32d3fb1d3e2 37 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
adisuciu 0:f32d3fb1d3e2 38 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
adisuciu 0:f32d3fb1d3e2 39 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
adisuciu 0:f32d3fb1d3e2 40 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
adisuciu 0:f32d3fb1d3e2 41 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
adisuciu 0:f32d3fb1d3e2 42 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
adisuciu 0:f32d3fb1d3e2 43 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
adisuciu 0:f32d3fb1d3e2 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
adisuciu 0:f32d3fb1d3e2 45 *
adisuciu 0:f32d3fb1d3e2 46 ********************************************************************************/
adisuciu 0:f32d3fb1d3e2 47
adisuciu 0:f32d3fb1d3e2 48 #include <stdint.h>
adisuciu 0:f32d3fb1d3e2 49 #include "mbed.h"
adisuciu 0:f32d3fb1d3e2 50 #include "AD7124.h"
adisuciu 0:f32d3fb1d3e2 51
adisuciu 0:f32d3fb1d3e2 52 /**
adisuciu 0:f32d3fb1d3e2 53 * @brief AD7790 constructor, sets CS pin and SPI format
adisuciu 0:f32d3fb1d3e2 54 * @param CS - (optional)chip select of the AD7790
adisuciu 0:f32d3fb1d3e2 55 * @param MOSI - (optional)pin of the SPI interface
adisuciu 0:f32d3fb1d3e2 56 * @param MISO - (optional)pin of the SPI interface
adisuciu 0:f32d3fb1d3e2 57 * @param SCK - (optional)pin of the SPI interface
adisuciu 0:f32d3fb1d3e2 58 */
adisuciu 0:f32d3fb1d3e2 59 AD7124::AD7124(PinName CS,
adisuciu 0:f32d3fb1d3e2 60 PinName MOSI,
adisuciu 0:f32d3fb1d3e2 61 PinName MISO,
adisuciu 0:f32d3fb1d3e2 62 PinName SCK) :
adisuciu 0:f32d3fb1d3e2 63 miso(MISO), ad7124(MOSI, MISO, SCK), cs(CS)
adisuciu 0:f32d3fb1d3e2 64 {
adisuciu 0:f32d3fb1d3e2 65 cs = true; // cs is active low
adisuciu 0:f32d3fb1d3e2 66 ad7124.format(8, _SPI_MODE);
adisuciu 0:f32d3fb1d3e2 67 this->regs = ad7124_regs;
adisuciu 0:f32d3fb1d3e2 68 this->useCRC = false;
adisuciu 1:4a4194a5a8ed 69
adisuciu 1:4a4194a5a8ed 70 ad7124_st_reg ad7124_regs[] = {
adisuciu 1:4a4194a5a8ed 71 {0x00, 0x00, 1, 2}, /* AD7124_Status */
adisuciu 1:4a4194a5a8ed 72 {0x01, 0x0000, 2, 1}, /* AD7124_ADC_Control */
adisuciu 1:4a4194a5a8ed 73 {0x02, 0x0000, 3, 2}, /* AD7124_Data */
adisuciu 1:4a4194a5a8ed 74 {0x03, 0x0000, 3, 1}, /* AD7124_IOCon1 */
adisuciu 1:4a4194a5a8ed 75 {0x04, 0x0000, 2, 1}, /* AD7124_IOCon2 */
adisuciu 1:4a4194a5a8ed 76 {0x05, 0x12, 1, 2}, /* AD7124_ID */
adisuciu 1:4a4194a5a8ed 77 {0x06, 0x0000, 3, 2}, /* AD7124_Error */
adisuciu 1:4a4194a5a8ed 78 {0x07, 0x0400, 3, 1}, /* AD7124_Error_En */
adisuciu 1:4a4194a5a8ed 79 {0x08, 0x00, 1, 2}, /* AD7124_Mclk_Count */
adisuciu 1:4a4194a5a8ed 80 {0x09, 0x8001, 2, 1}, /* AD7124_Channel_0 */
adisuciu 1:4a4194a5a8ed 81 {0x0A, 0x0001, 2, 1}, /* AD7124_Channel_1 */
adisuciu 1:4a4194a5a8ed 82 {0x0B, 0x0001, 2, 1}, /* AD7124_Channel_2 */
adisuciu 1:4a4194a5a8ed 83 {0x0C, 0x0001, 2, 1}, /* AD7124_Channel_3 */
adisuciu 1:4a4194a5a8ed 84 {0x0D, 0x0001, 2, 1}, /* AD7124_Channel_4 */
adisuciu 1:4a4194a5a8ed 85 {0x0E, 0x0001, 2, 1}, /* AD7124_Channel_5 */
adisuciu 1:4a4194a5a8ed 86 {0x0F, 0x0001, 2, 1}, /* AD7124_Channel_6 */
adisuciu 1:4a4194a5a8ed 87 {0x10, 0x0001, 2, 1}, /* AD7124_Channel_7 */
adisuciu 1:4a4194a5a8ed 88 {0x11, 0x0001, 2, 1}, /* AD7124_Channel_8 */
adisuciu 1:4a4194a5a8ed 89 {0x12, 0x0001, 2, 1}, /* AD7124_Channel_9 */
adisuciu 1:4a4194a5a8ed 90 {0x13, 0x0001, 2, 1}, /* AD7124_Channel_10 */
adisuciu 1:4a4194a5a8ed 91 {0x14, 0x0001, 2, 1}, /* AD7124_Channel_11 */
adisuciu 1:4a4194a5a8ed 92 {0x15, 0x0001, 2, 1}, /* AD7124_Channel_12 */
adisuciu 1:4a4194a5a8ed 93 {0x16, 0x0001, 2, 1}, /* AD7124_Channel_13 */
adisuciu 1:4a4194a5a8ed 94 {0x17, 0x0001, 2, 1}, /* AD7124_Channel_14 */
adisuciu 1:4a4194a5a8ed 95 {0x18, 0x0001, 2, 1}, /* AD7124_Channel_15 */
adisuciu 1:4a4194a5a8ed 96 {0x19, 0x0860, 2, 1}, /* AD7124_Config_0 */
adisuciu 1:4a4194a5a8ed 97 {0x1A, 0x0860, 2, 1}, /* AD7124_Config_1 */
adisuciu 1:4a4194a5a8ed 98 {0x1B, 0x0860, 2, 1}, /* AD7124_Config_2 */
adisuciu 1:4a4194a5a8ed 99 {0x1C, 0x0860, 2, 1}, /* AD7124_Config_3 */
adisuciu 1:4a4194a5a8ed 100 {0x1D, 0x0860, 2, 1}, /* AD7124_Config_4 */
adisuciu 1:4a4194a5a8ed 101 {0x1E, 0x0860, 2, 1}, /* AD7124_Config_5 */
adisuciu 1:4a4194a5a8ed 102 {0x1F, 0x0860, 2, 1}, /* AD7124_Config_6 */
adisuciu 1:4a4194a5a8ed 103 {0x20, 0x0860, 2, 1}, /* AD7124_Config_7 */
adisuciu 1:4a4194a5a8ed 104 {0x21, 0x060180, 3, 1}, /* AD7124_Filter_0 */
adisuciu 1:4a4194a5a8ed 105 {0x22, 0x060180, 3, 1}, /* AD7124_Filter_1 */
adisuciu 1:4a4194a5a8ed 106 {0x23, 0x060180, 3, 1}, /* AD7124_Filter_2 */
adisuciu 1:4a4194a5a8ed 107 {0x24, 0x060180, 3, 1}, /* AD7124_Filter_3 */
adisuciu 1:4a4194a5a8ed 108 {0x25, 0x060180, 3, 1}, /* AD7124_Filter_4 */
adisuciu 1:4a4194a5a8ed 109 {0x26, 0x060180, 3, 1}, /* AD7124_Filter_5 */
adisuciu 1:4a4194a5a8ed 110 {0x27, 0x060180, 3, 1}, /* AD7124_Filter_6 */
adisuciu 1:4a4194a5a8ed 111 {0x28, 0x060180, 3, 1}, /* AD7124_Filter_7 */
adisuciu 1:4a4194a5a8ed 112 {0x29, 0x800000, 3, 1}, /* AD7124_Offset_0 */
adisuciu 1:4a4194a5a8ed 113 {0x2A, 0x800000, 3, 1}, /* AD7124_Offset_1 */
adisuciu 1:4a4194a5a8ed 114 {0x2B, 0x800000, 3, 1}, /* AD7124_Offset_2 */
adisuciu 1:4a4194a5a8ed 115 {0x2C, 0x800000, 3, 1}, /* AD7124_Offset_3 */
adisuciu 1:4a4194a5a8ed 116 {0x2D, 0x800000, 3, 1}, /* AD7124_Offset_4 */
adisuciu 1:4a4194a5a8ed 117 {0x2E, 0x800000, 3, 1}, /* AD7124_Offset_5 */
adisuciu 1:4a4194a5a8ed 118 {0x2F, 0x800000, 3, 1}, /* AD7124_Offset_6 */
adisuciu 1:4a4194a5a8ed 119 {0x30, 0x800000, 3, 1}, /* AD7124_Offset_7 */
adisuciu 1:4a4194a5a8ed 120 {0x31, 0x500000, 3, 1}, /* AD7124_Gain_0 */
adisuciu 1:4a4194a5a8ed 121 {0x32, 0x500000, 3, 1}, /* AD7124_Gain_1 */
adisuciu 1:4a4194a5a8ed 122 {0x33, 0x500000, 3, 1}, /* AD7124_Gain_2 */
adisuciu 1:4a4194a5a8ed 123 {0x34, 0x500000, 3, 1}, /* AD7124_Gain_3 */
adisuciu 1:4a4194a5a8ed 124 {0x35, 0x500000, 3, 1}, /* AD7124_Gain_4 */
adisuciu 1:4a4194a5a8ed 125 {0x36, 0x500000, 3, 1}, /* AD7124_Gain_5 */
adisuciu 1:4a4194a5a8ed 126 {0x37, 0x500000, 3, 1}, /* AD7124_Gain_6 */
adisuciu 1:4a4194a5a8ed 127 {0x38, 0x500000, 3, 1}, /* AD7124_Gain_7 */
adisuciu 1:4a4194a5a8ed 128 };
adisuciu 0:f32d3fb1d3e2 129 }
adisuciu 0:f32d3fb1d3e2 130
adisuciu 0:f32d3fb1d3e2 131 /**
adisuciu 0:f32d3fb1d3e2 132 * @brief Set AD7790 SPI frequency
adisuciu 0:f32d3fb1d3e2 133 * @param hz - SPI bus frequency in hz
adisuciu 0:f32d3fb1d3e2 134 * @return none
adisuciu 0:f32d3fb1d3e2 135 */
adisuciu 0:f32d3fb1d3e2 136 void AD7124::frequency(int hz)
adisuciu 0:f32d3fb1d3e2 137 {
adisuciu 0:f32d3fb1d3e2 138 ad7124.frequency(hz);
adisuciu 0:f32d3fb1d3e2 139 }
adisuciu 0:f32d3fb1d3e2 140
adisuciu 0:f32d3fb1d3e2 141 /**
adisuciu 0:f32d3fb1d3e2 142 * @brief Resets the AD7790
adisuciu 0:f32d3fb1d3e2 143 * @return none
adisuciu 0:f32d3fb1d3e2 144 */
adisuciu 0:f32d3fb1d3e2 145 /*void AD7124::reset()
adisuciu 0:f32d3fb1d3e2 146 {
adisuciu 0:f32d3fb1d3e2 147 ad7124.format(8, _SPI_MODE);
adisuciu 0:f32d3fb1d3e2 148 cs = false;
adisuciu 0:f32d3fb1d3e2 149 wait_us(_DELAY_TIMING);
adisuciu 0:f32d3fb1d3e2 150 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 151 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 152 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 153 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 154 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 155 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 156 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 157 ad7124.write(_RESET);
adisuciu 0:f32d3fb1d3e2 158 wait_us(_DELAY_TIMING);
adisuciu 0:f32d3fb1d3e2 159 cs = true;
adisuciu 0:f32d3fb1d3e2 160 //_continous_conversion = true;
adisuciu 0:f32d3fb1d3e2 161 }*/
adisuciu 0:f32d3fb1d3e2 162 /**
adisuciu 0:f32d3fb1d3e2 163 * @brief Reads a register of the AD7790
adisuciu 0:f32d3fb1d3e2 164 * @param address - address of the register
adisuciu 0:f32d3fb1d3e2 165 * @return value of the register
adisuciu 0:f32d3fb1d3e2 166 */
adisuciu 0:f32d3fb1d3e2 167 uint16_t AD7124::read_reg(uint8_t address)
adisuciu 0:f32d3fb1d3e2 168 {
adisuciu 0:f32d3fb1d3e2 169 uint16_t data = address << 8;
adisuciu 0:f32d3fb1d3e2 170 data |= _DUMMY_BYTE;
adisuciu 0:f32d3fb1d3e2 171 data |= _READ_FLAG;
adisuciu 0:f32d3fb1d3e2 172 return write_spi(data);
adisuciu 0:f32d3fb1d3e2 173 }
adisuciu 0:f32d3fb1d3e2 174
adisuciu 0:f32d3fb1d3e2 175 /**
adisuciu 0:f32d3fb1d3e2 176 * @brief Writes a register of the AD7790
adisuciu 0:f32d3fb1d3e2 177 * @param address - address of the register
adisuciu 0:f32d3fb1d3e2 178 * @param reg_val - value to be written
adisuciu 0:f32d3fb1d3e2 179 * @return none
adisuciu 0:f32d3fb1d3e2 180 *
adisuciu 0:f32d3fb1d3e2 181 */
adisuciu 0:f32d3fb1d3e2 182 void AD7124::write_reg(uint8_t address, uint8_t reg_val)
adisuciu 0:f32d3fb1d3e2 183 {
adisuciu 0:f32d3fb1d3e2 184 uint16_t spi_data = address << 8;
adisuciu 0:f32d3fb1d3e2 185 spi_data |= reg_val;
adisuciu 0:f32d3fb1d3e2 186 write_spi(spi_data);
adisuciu 0:f32d3fb1d3e2 187 }
adisuciu 0:f32d3fb1d3e2 188
adisuciu 0:f32d3fb1d3e2 189 /**
adisuciu 0:f32d3fb1d3e2 190 * @brief Writes 16bit data to the AD7790 SPI interface
adisuciu 0:f32d3fb1d3e2 191 * @param reg_val to be written
adisuciu 0:f32d3fb1d3e2 192 * @return data returned by the AD7790
adisuciu 0:f32d3fb1d3e2 193 */
adisuciu 0:f32d3fb1d3e2 194 uint16_t AD7124::write_spi(uint16_t reg_val)
adisuciu 0:f32d3fb1d3e2 195 {
adisuciu 0:f32d3fb1d3e2 196 uint16_t data_result;
adisuciu 0:f32d3fb1d3e2 197 uint8_t upper_byte = (reg_val >> 8) & 0xFF;
adisuciu 0:f32d3fb1d3e2 198 uint8_t lower_byte = reg_val & 0xFF;
adisuciu 0:f32d3fb1d3e2 199 ad7124.format(8, _SPI_MODE);
adisuciu 0:f32d3fb1d3e2 200 cs = false;
adisuciu 0:f32d3fb1d3e2 201 data_result = (ad7124.write(upper_byte) << 8);
adisuciu 0:f32d3fb1d3e2 202 data_result |= ad7124.write(lower_byte);
adisuciu 0:f32d3fb1d3e2 203 cs = true;
adisuciu 0:f32d3fb1d3e2 204 return data_result;
adisuciu 0:f32d3fb1d3e2 205 }
adisuciu 0:f32d3fb1d3e2 206
adisuciu 0:f32d3fb1d3e2 207
adisuciu 0:f32d3fb1d3e2 208
adisuciu 0:f32d3fb1d3e2 209 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 210 * @brief Reads the value of the specified register without checking if the
adisuciu 0:f32d3fb1d3e2 211 * device is ready to accept user requests.
adisuciu 0:f32d3fb1d3e2 212 *
adisuciu 0:f32d3fb1d3e2 213 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 214 * @param pReg - Pointer to the register structure holding info about the
adisuciu 0:f32d3fb1d3e2 215 * register to be read. The read value is stored inside the
adisuciu 0:f32d3fb1d3e2 216 * register structure.
adisuciu 0:f32d3fb1d3e2 217 *
adisuciu 0:f32d3fb1d3e2 218 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 219 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 220 int32_t AD7124::NoCheckReadRegister(ad7124_st_reg* pReg)
adisuciu 0:f32d3fb1d3e2 221 {
adisuciu 0:f32d3fb1d3e2 222 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 223 uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 224 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 225 uint8_t check8 = 0;
adisuciu 0:f32d3fb1d3e2 226 uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 227
adisuciu 0:f32d3fb1d3e2 228
adisuciu 0:f32d3fb1d3e2 229 check8 = useCRC;
adisuciu 0:f32d3fb1d3e2 230
adisuciu 0:f32d3fb1d3e2 231 /* Build the Command word */
adisuciu 0:f32d3fb1d3e2 232 buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 233 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 234
adisuciu 0:f32d3fb1d3e2 235 /* Read data from the device */
adisuciu 0:f32d3fb1d3e2 236 ret = SPI_Read(buffer,
adisuciu 0:f32d3fb1d3e2 237 ((useCRC != AD7124_DISABLE_CRC) ? pReg->size + 1
adisuciu 0:f32d3fb1d3e2 238 : pReg->size) + 1);
adisuciu 0:f32d3fb1d3e2 239 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 240 return ret;
adisuciu 0:f32d3fb1d3e2 241
adisuciu 0:f32d3fb1d3e2 242 /* Check the CRC */
adisuciu 0:f32d3fb1d3e2 243 if(check8 == AD7124_USE_CRC) {
adisuciu 0:f32d3fb1d3e2 244 msgBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 245 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 246 for(i = 1; i < pReg->size + 2; ++i) {
adisuciu 0:f32d3fb1d3e2 247 msgBuf[i] = buffer[i];
adisuciu 0:f32d3fb1d3e2 248 }
adisuciu 0:f32d3fb1d3e2 249 check8 = ComputeCRC8(msgBuf, pReg->size + 2);
adisuciu 0:f32d3fb1d3e2 250 }
adisuciu 0:f32d3fb1d3e2 251
adisuciu 0:f32d3fb1d3e2 252 if(check8 != 0) {
adisuciu 0:f32d3fb1d3e2 253 /* ReadRegister checksum failed. */
adisuciu 0:f32d3fb1d3e2 254 return COMM_ERR;
adisuciu 0:f32d3fb1d3e2 255 }
adisuciu 0:f32d3fb1d3e2 256
adisuciu 0:f32d3fb1d3e2 257 /* Build the result */
adisuciu 0:f32d3fb1d3e2 258 pReg->value = 0;
adisuciu 0:f32d3fb1d3e2 259 for(i = 1; i < pReg->size + 1; i++) {
adisuciu 0:f32d3fb1d3e2 260 pReg->value <<= 8;
adisuciu 0:f32d3fb1d3e2 261 pReg->value += buffer[i];
adisuciu 0:f32d3fb1d3e2 262 }
adisuciu 0:f32d3fb1d3e2 263
adisuciu 0:f32d3fb1d3e2 264 return ret;
adisuciu 0:f32d3fb1d3e2 265 }
adisuciu 0:f32d3fb1d3e2 266
adisuciu 0:f32d3fb1d3e2 267 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 268 * @brief Writes the value of the specified register without checking if the
adisuciu 0:f32d3fb1d3e2 269 * device is ready to accept user requests.
adisuciu 0:f32d3fb1d3e2 270 *
adisuciu 0:f32d3fb1d3e2 271 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 272 * @param reg - Register structure holding info about the register to be written
adisuciu 0:f32d3fb1d3e2 273 *
adisuciu 0:f32d3fb1d3e2 274 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 275 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 276 int32_t AD7124::NoCheckWriteRegister(ad7124_st_reg reg)
adisuciu 0:f32d3fb1d3e2 277 {
adisuciu 0:f32d3fb1d3e2 278 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 279 int32_t regValue = 0;
adisuciu 0:f32d3fb1d3e2 280 uint8_t wrBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 281 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 282 uint8_t crc8 = 0;
adisuciu 0:f32d3fb1d3e2 283
adisuciu 0:f32d3fb1d3e2 284
adisuciu 0:f32d3fb1d3e2 285 /* Build the Command word */
adisuciu 0:f32d3fb1d3e2 286 wrBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_WR |
adisuciu 0:f32d3fb1d3e2 287 AD7124_COMM_REG_RA(reg.addr);
adisuciu 0:f32d3fb1d3e2 288
adisuciu 0:f32d3fb1d3e2 289 /* Fill the write buffer */
adisuciu 0:f32d3fb1d3e2 290 regValue = reg.value;
adisuciu 0:f32d3fb1d3e2 291 for(i = 0; i < reg.size; i++) {
adisuciu 0:f32d3fb1d3e2 292 wrBuf[reg.size - i] = regValue & 0xFF;
adisuciu 0:f32d3fb1d3e2 293 regValue >>= 8;
adisuciu 0:f32d3fb1d3e2 294 }
adisuciu 0:f32d3fb1d3e2 295
adisuciu 0:f32d3fb1d3e2 296 /* Compute the CRC */
adisuciu 0:f32d3fb1d3e2 297 if(useCRC != AD7124_DISABLE_CRC) {
adisuciu 0:f32d3fb1d3e2 298 crc8 = ComputeCRC8(wrBuf, reg.size + 1);
adisuciu 0:f32d3fb1d3e2 299 wrBuf[reg.size + 1] = crc8;
adisuciu 0:f32d3fb1d3e2 300 }
adisuciu 0:f32d3fb1d3e2 301
adisuciu 0:f32d3fb1d3e2 302 /* Write data to the device */
adisuciu 0:f32d3fb1d3e2 303 ret = SPI_Write(wrBuf,
adisuciu 0:f32d3fb1d3e2 304 (useCRC != AD7124_DISABLE_CRC) ? reg.size + 2
adisuciu 0:f32d3fb1d3e2 305 : reg.size + 1);
adisuciu 0:f32d3fb1d3e2 306
adisuciu 0:f32d3fb1d3e2 307 return ret;
adisuciu 0:f32d3fb1d3e2 308 }
adisuciu 0:f32d3fb1d3e2 309
adisuciu 0:f32d3fb1d3e2 310 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 311 * @brief Reads the value of the specified register only when the device is ready
adisuciu 0:f32d3fb1d3e2 312 * to accept user requests. If the device ready flag is deactivated the
adisuciu 0:f32d3fb1d3e2 313 * read operation will be executed without checking the device state.
adisuciu 0:f32d3fb1d3e2 314 *
adisuciu 0:f32d3fb1d3e2 315 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 316 * @param pReg - Pointer to the register structure holding info about the
adisuciu 0:f32d3fb1d3e2 317 * register to be read. The read value is stored inside the
adisuciu 0:f32d3fb1d3e2 318 * register structure.
adisuciu 0:f32d3fb1d3e2 319 *
adisuciu 0:f32d3fb1d3e2 320 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 321 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 322 int32_t AD7124::ReadRegister(ad7124_st_reg* pReg)
adisuciu 0:f32d3fb1d3e2 323 {
adisuciu 0:f32d3fb1d3e2 324 int32_t ret;
adisuciu 0:f32d3fb1d3e2 325
adisuciu 0:f32d3fb1d3e2 326 if (pReg->addr != ERR_REG && check_ready) {
adisuciu 0:f32d3fb1d3e2 327 ret = WaitForSpiReady(spi_rdy_poll_cnt);
adisuciu 0:f32d3fb1d3e2 328 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 329 return ret;
adisuciu 0:f32d3fb1d3e2 330 }
adisuciu 0:f32d3fb1d3e2 331 ret = NoCheckReadRegister(pReg);
adisuciu 0:f32d3fb1d3e2 332
adisuciu 0:f32d3fb1d3e2 333 return ret;
adisuciu 0:f32d3fb1d3e2 334 }
adisuciu 0:f32d3fb1d3e2 335
adisuciu 0:f32d3fb1d3e2 336 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 337 * @brief Writes the value of the specified register only when the device is
adisuciu 0:f32d3fb1d3e2 338 * ready to accept user requests. If the device ready flag is deactivated
adisuciu 0:f32d3fb1d3e2 339 * the write operation will be executed without checking the device state.
adisuciu 0:f32d3fb1d3e2 340 *
adisuciu 0:f32d3fb1d3e2 341 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 342 * @param reg - Register structure holding info about the register to be written
adisuciu 0:f32d3fb1d3e2 343 *
adisuciu 0:f32d3fb1d3e2 344 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 345 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 346 int32_t AD7124::WriteRegister(ad7124_st_reg pReg)
adisuciu 0:f32d3fb1d3e2 347 {
adisuciu 0:f32d3fb1d3e2 348 int32_t ret;
adisuciu 0:f32d3fb1d3e2 349
adisuciu 0:f32d3fb1d3e2 350 if (check_ready) {
adisuciu 0:f32d3fb1d3e2 351 ret = WaitForSpiReady(spi_rdy_poll_cnt);
adisuciu 0:f32d3fb1d3e2 352 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 353 return ret;
adisuciu 0:f32d3fb1d3e2 354 }
adisuciu 0:f32d3fb1d3e2 355 ret = NoCheckWriteRegister(pReg);
adisuciu 0:f32d3fb1d3e2 356
adisuciu 0:f32d3fb1d3e2 357 return ret;
adisuciu 0:f32d3fb1d3e2 358 }
adisuciu 0:f32d3fb1d3e2 359
adisuciu 0:f32d3fb1d3e2 360 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 361 * @brief Reads and returns the value of a device register. The read value is
adisuciu 0:f32d3fb1d3e2 362 * also stored in software register list of the device.
adisuciu 0:f32d3fb1d3e2 363 *
adisuciu 0:f32d3fb1d3e2 364 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 365 * @param reg - Which register to read from.
adisuciu 0:f32d3fb1d3e2 366 * @param pError - Pointer to the location where to store the error code if an
adisuciu 0:f32d3fb1d3e2 367 * error occurs. Stores 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 368 * Does not store anything if pErorr = NULL;
adisuciu 0:f32d3fb1d3e2 369 *
adisuciu 0:f32d3fb1d3e2 370 * @return Returns the value read from the specified register.
adisuciu 0:f32d3fb1d3e2 371 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 372 uint32_t AD7124::ReadDeviceRegister(enum ad7124_registers reg)
adisuciu 0:f32d3fb1d3e2 373 {
adisuciu 0:f32d3fb1d3e2 374 ReadRegister(&regs[reg]);
adisuciu 0:f32d3fb1d3e2 375 return (regs[reg].value);
adisuciu 0:f32d3fb1d3e2 376 }
adisuciu 0:f32d3fb1d3e2 377
adisuciu 0:f32d3fb1d3e2 378 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 379 * @brief Writes the specified value to a device register. The value to be
adisuciu 0:f32d3fb1d3e2 380 * written is also stored in the software register list of the device.
adisuciu 0:f32d3fb1d3e2 381 *
adisuciu 0:f32d3fb1d3e2 382 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 383 * @param reg - Which register to write to.
adisuciu 0:f32d3fb1d3e2 384 * @param value - The value to be written to the reigster of the device.
adisuciu 0:f32d3fb1d3e2 385 *
adisuciu 0:f32d3fb1d3e2 386 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 387 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 388 int32_t AD7124::WriteDeviceRegister(enum ad7124_registers reg, uint32_t value)
adisuciu 0:f32d3fb1d3e2 389 {
adisuciu 0:f32d3fb1d3e2 390 regs[reg].value = value;
adisuciu 0:f32d3fb1d3e2 391 return(WriteRegister(regs[reg]));
adisuciu 0:f32d3fb1d3e2 392 }
adisuciu 0:f32d3fb1d3e2 393
adisuciu 0:f32d3fb1d3e2 394 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 395 * @brief Resets the device.
adisuciu 0:f32d3fb1d3e2 396 *
adisuciu 0:f32d3fb1d3e2 397 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 398 *
adisuciu 0:f32d3fb1d3e2 399 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 400 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 401 int32_t AD7124::Reset()
adisuciu 0:f32d3fb1d3e2 402 {
adisuciu 0:f32d3fb1d3e2 403 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 404 uint8_t wrBuf[8] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
adisuciu 0:f32d3fb1d3e2 405
adisuciu 0:f32d3fb1d3e2 406 ret = SPI_Write( wrBuf, 8);
adisuciu 0:f32d3fb1d3e2 407
adisuciu 0:f32d3fb1d3e2 408
adisuciu 0:f32d3fb1d3e2 409 return ret;
adisuciu 0:f32d3fb1d3e2 410 }
adisuciu 0:f32d3fb1d3e2 411
adisuciu 0:f32d3fb1d3e2 412 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 413 * @brief Waits until the device can accept read and write user actions.
adisuciu 0:f32d3fb1d3e2 414 *
adisuciu 0:f32d3fb1d3e2 415 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 416 * @param timeout - Count representing the number of polls to be done until the
adisuciu 0:f32d3fb1d3e2 417 * function returns.
adisuciu 0:f32d3fb1d3e2 418 *
adisuciu 0:f32d3fb1d3e2 419 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 420 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 421 int32_t AD7124::WaitForSpiReady(uint32_t timeout)
adisuciu 0:f32d3fb1d3e2 422 {
adisuciu 0:f32d3fb1d3e2 423 ad7124_st_reg *regs;
adisuciu 0:f32d3fb1d3e2 424 int32_t ret;
adisuciu 0:f32d3fb1d3e2 425 int8_t ready = 0;
adisuciu 0:f32d3fb1d3e2 426
adisuciu 0:f32d3fb1d3e2 427 regs = this->regs;
adisuciu 0:f32d3fb1d3e2 428
adisuciu 0:f32d3fb1d3e2 429 while(!ready && --timeout) {
adisuciu 0:f32d3fb1d3e2 430 /* Read the value of the Error Register */
adisuciu 0:f32d3fb1d3e2 431 ret = ReadRegister(&regs[AD7124_Error]);
adisuciu 0:f32d3fb1d3e2 432 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 433 return ret;
adisuciu 0:f32d3fb1d3e2 434
adisuciu 0:f32d3fb1d3e2 435 /* Check the SPI IGNORE Error bit in the Error Register */
adisuciu 0:f32d3fb1d3e2 436 ready = (regs[AD7124_Error].value &
adisuciu 0:f32d3fb1d3e2 437 AD7124_ERR_REG_SPI_IGNORE_ERR) == 0;
adisuciu 0:f32d3fb1d3e2 438 }
adisuciu 0:f32d3fb1d3e2 439
adisuciu 0:f32d3fb1d3e2 440 return timeout ? 0 : TIMEOUT;
adisuciu 0:f32d3fb1d3e2 441 }
adisuciu 0:f32d3fb1d3e2 442
adisuciu 0:f32d3fb1d3e2 443 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 444 * @brief Waits until a new conversion result is available.
adisuciu 0:f32d3fb1d3e2 445 *
adisuciu 0:f32d3fb1d3e2 446 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 447 * @param timeout - Count representing the number of polls to be done until the
adisuciu 0:f32d3fb1d3e2 448 * function returns if no new data is available.
adisuciu 0:f32d3fb1d3e2 449 *
adisuciu 0:f32d3fb1d3e2 450 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 451 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 452 int32_t AD7124::WaitForConvReady(uint32_t timeout)
adisuciu 0:f32d3fb1d3e2 453 {
adisuciu 0:f32d3fb1d3e2 454 ad7124_st_reg *regs;
adisuciu 0:f32d3fb1d3e2 455 int32_t ret;
adisuciu 0:f32d3fb1d3e2 456 int8_t ready = 0;
adisuciu 0:f32d3fb1d3e2 457
adisuciu 0:f32d3fb1d3e2 458 regs = this->regs;
adisuciu 0:f32d3fb1d3e2 459
adisuciu 0:f32d3fb1d3e2 460 while(!ready && --timeout) {
adisuciu 0:f32d3fb1d3e2 461 /* Read the value of the Status Register */
adisuciu 0:f32d3fb1d3e2 462 ret = ReadRegister(&regs[AD7124_Status]);
adisuciu 0:f32d3fb1d3e2 463 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 464 return ret;
adisuciu 0:f32d3fb1d3e2 465
adisuciu 0:f32d3fb1d3e2 466 /* Check the RDY bit in the Status Register */
adisuciu 0:f32d3fb1d3e2 467 ready = (regs[AD7124_Status].value &
adisuciu 0:f32d3fb1d3e2 468 AD7124_STATUS_REG_RDY) == 0;
adisuciu 0:f32d3fb1d3e2 469 wait_ms(1);
adisuciu 0:f32d3fb1d3e2 470 }
adisuciu 0:f32d3fb1d3e2 471
adisuciu 0:f32d3fb1d3e2 472 return timeout ? 0 : TIMEOUT;
adisuciu 0:f32d3fb1d3e2 473 }
adisuciu 0:f32d3fb1d3e2 474
adisuciu 0:f32d3fb1d3e2 475 bool AD7124::get_miso()
adisuciu 0:f32d3fb1d3e2 476 {
adisuciu 0:f32d3fb1d3e2 477 return miso.read();
adisuciu 0:f32d3fb1d3e2 478 }
adisuciu 0:f32d3fb1d3e2 479
adisuciu 0:f32d3fb1d3e2 480 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 481 * @brief Reads the conversion result from the device.
adisuciu 0:f32d3fb1d3e2 482 *
adisuciu 0:f32d3fb1d3e2 483 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 484 * @param pData - Pointer to store the read data.
adisuciu 0:f32d3fb1d3e2 485 *
adisuciu 0:f32d3fb1d3e2 486 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 487 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 488 int32_t AD7124::ReadData( int32_t* pData)
adisuciu 0:f32d3fb1d3e2 489 {
adisuciu 0:f32d3fb1d3e2 490 int32_t ret = 0;
adisuciu 0:f32d3fb1d3e2 491 uint8_t check8 = 0;
adisuciu 0:f32d3fb1d3e2 492 uint8_t buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 493 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 494 uint8_t msgBuf[8] = {0, 0, 0, 0, 0, 0, 0, 0};
adisuciu 0:f32d3fb1d3e2 495 ad7124_st_reg *pReg;
adisuciu 0:f32d3fb1d3e2 496
adisuciu 0:f32d3fb1d3e2 497 if( !pData)
adisuciu 0:f32d3fb1d3e2 498 return INVALID_VAL;
adisuciu 0:f32d3fb1d3e2 499
adisuciu 0:f32d3fb1d3e2 500 pReg = &regs[AD7124_Data];
adisuciu 0:f32d3fb1d3e2 501
adisuciu 0:f32d3fb1d3e2 502 /* Build the Command word */
adisuciu 0:f32d3fb1d3e2 503 buffer[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 504 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 505
adisuciu 0:f32d3fb1d3e2 506
adisuciu 0:f32d3fb1d3e2 507 /* Read data from the device */
adisuciu 0:f32d3fb1d3e2 508 ret = SPI_Read(buffer,
adisuciu 0:f32d3fb1d3e2 509 ((useCRC != AD7124_DISABLE_CRC) ? pReg->size + 1
adisuciu 0:f32d3fb1d3e2 510 : pReg->size) + 2);
adisuciu 0:f32d3fb1d3e2 511
adisuciu 0:f32d3fb1d3e2 512 if(ret < 0)
adisuciu 0:f32d3fb1d3e2 513 return ret;
adisuciu 0:f32d3fb1d3e2 514
adisuciu 0:f32d3fb1d3e2 515 /* Check the CRC */
adisuciu 0:f32d3fb1d3e2 516 if(check8 == AD7124_USE_CRC) {
adisuciu 0:f32d3fb1d3e2 517 msgBuf[0] = AD7124_COMM_REG_WEN | AD7124_COMM_REG_RD |
adisuciu 0:f32d3fb1d3e2 518 AD7124_COMM_REG_RA(pReg->addr);
adisuciu 0:f32d3fb1d3e2 519 for(i = 1; i < pReg->size + 2; ++i) {
adisuciu 0:f32d3fb1d3e2 520 msgBuf[i] = buffer[i];
adisuciu 0:f32d3fb1d3e2 521 }
adisuciu 0:f32d3fb1d3e2 522 check8 = ComputeCRC8(msgBuf, pReg->size + 3);
adisuciu 0:f32d3fb1d3e2 523 }
adisuciu 0:f32d3fb1d3e2 524
adisuciu 0:f32d3fb1d3e2 525 if(check8 != 0) {
adisuciu 0:f32d3fb1d3e2 526 /* ReadRegister checksum failed. */
adisuciu 0:f32d3fb1d3e2 527 return COMM_ERR;
adisuciu 0:f32d3fb1d3e2 528 }
adisuciu 0:f32d3fb1d3e2 529
adisuciu 0:f32d3fb1d3e2 530 /* Build the result */
adisuciu 0:f32d3fb1d3e2 531 *pData = 0;
adisuciu 0:f32d3fb1d3e2 532 for(i = 1; i < pReg->size + 2; i++) {
adisuciu 0:f32d3fb1d3e2 533 *pData <<= 8;
adisuciu 0:f32d3fb1d3e2 534 *pData += buffer[i];
adisuciu 0:f32d3fb1d3e2 535 }
adisuciu 0:f32d3fb1d3e2 536 wait_ms(500);
adisuciu 0:f32d3fb1d3e2 537 return ret;
adisuciu 0:f32d3fb1d3e2 538 }
adisuciu 0:f32d3fb1d3e2 539
adisuciu 0:f32d3fb1d3e2 540 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 541 * @brief Computes the CRC checksum for a data buffer.
adisuciu 0:f32d3fb1d3e2 542 *
adisuciu 0:f32d3fb1d3e2 543 * @param pBuf - Data buffer
adisuciu 0:f32d3fb1d3e2 544 * @param bufSize - Data buffer size in bytes
adisuciu 0:f32d3fb1d3e2 545 *
adisuciu 0:f32d3fb1d3e2 546 * @return Returns the computed CRC checksum.
adisuciu 0:f32d3fb1d3e2 547 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 548 uint8_t AD7124::ComputeCRC8(uint8_t * pBuf, uint8_t bufSize)
adisuciu 0:f32d3fb1d3e2 549 {
adisuciu 0:f32d3fb1d3e2 550 uint8_t i = 0;
adisuciu 0:f32d3fb1d3e2 551 uint8_t crc = 0;
adisuciu 0:f32d3fb1d3e2 552
adisuciu 0:f32d3fb1d3e2 553 while(bufSize) {
adisuciu 0:f32d3fb1d3e2 554 for(i = 0x80; i != 0; i >>= 1) {
adisuciu 0:f32d3fb1d3e2 555 if(((crc & 0x80) != 0) != ((*pBuf & i) != 0)) { /* MSB of CRC register XOR input Bit from Data */
adisuciu 0:f32d3fb1d3e2 556 crc <<= 1;
adisuciu 0:f32d3fb1d3e2 557 crc ^= AD7124_CRC8_POLYNOMIAL_REPRESENTATION;
adisuciu 0:f32d3fb1d3e2 558 } else {
adisuciu 0:f32d3fb1d3e2 559 crc <<= 1;
adisuciu 0:f32d3fb1d3e2 560 }
adisuciu 0:f32d3fb1d3e2 561 }
adisuciu 0:f32d3fb1d3e2 562 pBuf++;
adisuciu 0:f32d3fb1d3e2 563 bufSize--;
adisuciu 0:f32d3fb1d3e2 564 }
adisuciu 0:f32d3fb1d3e2 565 return crc;
adisuciu 0:f32d3fb1d3e2 566 }
adisuciu 0:f32d3fb1d3e2 567
adisuciu 0:f32d3fb1d3e2 568
adisuciu 0:f32d3fb1d3e2 569 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 570 * @brief Updates the device SPI interface settings.
adisuciu 0:f32d3fb1d3e2 571 *
adisuciu 0:f32d3fb1d3e2 572 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 573 *
adisuciu 0:f32d3fb1d3e2 574 * @return None.
adisuciu 0:f32d3fb1d3e2 575 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 576 void AD7124::UpdateDevSpiSettings()
adisuciu 0:f32d3fb1d3e2 577 {
adisuciu 0:f32d3fb1d3e2 578 ad7124_st_reg *regs;
adisuciu 0:f32d3fb1d3e2 579
adisuciu 0:f32d3fb1d3e2 580 regs = this->regs;
adisuciu 0:f32d3fb1d3e2 581
adisuciu 0:f32d3fb1d3e2 582 if (regs[AD7124_Error_En].value & AD7124_ERREN_REG_SPI_IGNORE_ERR_EN) {
adisuciu 0:f32d3fb1d3e2 583 check_ready = 1;
adisuciu 0:f32d3fb1d3e2 584 } else {
adisuciu 0:f32d3fb1d3e2 585 check_ready = 0;
adisuciu 0:f32d3fb1d3e2 586 }
adisuciu 0:f32d3fb1d3e2 587 }
adisuciu 0:f32d3fb1d3e2 588
adisuciu 0:f32d3fb1d3e2 589 /***************************************************************************//**
adisuciu 0:f32d3fb1d3e2 590 * @brief Initializes the AD7124.
adisuciu 0:f32d3fb1d3e2 591 *
adisuciu 0:f32d3fb1d3e2 592 * @param device - The handler of the instance of the driver.
adisuciu 0:f32d3fb1d3e2 593 * @param slave_select - The Slave Chip Select Id to be passed to the SPI calls.
adisuciu 0:f32d3fb1d3e2 594 * @param regs - The list of registers of the device (initialized or not) to be
adisuciu 0:f32d3fb1d3e2 595 * added to the instance of the driver.
adisuciu 0:f32d3fb1d3e2 596 *
adisuciu 0:f32d3fb1d3e2 597 * @return Returns 0 for success or negative error code.
adisuciu 0:f32d3fb1d3e2 598 *******************************************************************************/
adisuciu 0:f32d3fb1d3e2 599 int32_t AD7124::Setup()
adisuciu 0:f32d3fb1d3e2 600 {
adisuciu 0:f32d3fb1d3e2 601 int32_t ret;
adisuciu 0:f32d3fb1d3e2 602 uint8_t regNr;
adisuciu 0:f32d3fb1d3e2 603
adisuciu 0:f32d3fb1d3e2 604
adisuciu 0:f32d3fb1d3e2 605 spi_rdy_poll_cnt = 25000;
adisuciu 0:f32d3fb1d3e2 606
adisuciu 0:f32d3fb1d3e2 607 /* Initialize the SPI communication. */
adisuciu 0:f32d3fb1d3e2 608 /*ret = SPI_Init(0, 2500000, 1, 0);
adisuciu 0:f32d3fb1d3e2 609 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 610 return ret;*/
adisuciu 0:f32d3fb1d3e2 611
adisuciu 0:f32d3fb1d3e2 612 /* Reset the device interface.*/
adisuciu 0:f32d3fb1d3e2 613 ret = Reset();
adisuciu 0:f32d3fb1d3e2 614 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 615 return ret;
adisuciu 0:f32d3fb1d3e2 616
adisuciu 0:f32d3fb1d3e2 617 check_ready = 1;
adisuciu 0:f32d3fb1d3e2 618
adisuciu 0:f32d3fb1d3e2 619 /* Initialize registers AD7124_ADC_Control through AD7124_Filter_7. */
adisuciu 0:f32d3fb1d3e2 620 for(regNr = static_cast<uint8_t>(AD7124_Status); (regNr < static_cast<uint8_t>(AD7124_Offset_0)) && !(ret < 0);
adisuciu 0:f32d3fb1d3e2 621 regNr++) {
adisuciu 0:f32d3fb1d3e2 622 if (regs[regNr].rw == AD7124_RW) {
adisuciu 0:f32d3fb1d3e2 623 ret = WriteRegister(regs[regNr]);
adisuciu 0:f32d3fb1d3e2 624 if (ret < 0)
adisuciu 0:f32d3fb1d3e2 625 break;
adisuciu 0:f32d3fb1d3e2 626 }
adisuciu 0:f32d3fb1d3e2 627
adisuciu 0:f32d3fb1d3e2 628 /* Get CRC State and device SPI interface settings */
adisuciu 0:f32d3fb1d3e2 629 if (regNr == AD7124_Error_En) {
adisuciu 0:f32d3fb1d3e2 630 UpdateDevSpiSettings();
adisuciu 0:f32d3fb1d3e2 631 }
adisuciu 0:f32d3fb1d3e2 632 }
adisuciu 0:f32d3fb1d3e2 633
adisuciu 0:f32d3fb1d3e2 634 return ret;
adisuciu 0:f32d3fb1d3e2 635 }
adisuciu 0:f32d3fb1d3e2 636
adisuciu 0:f32d3fb1d3e2 637 uint8_t AD7124::SPI_Read(uint8_t *data, uint8_t bytes_number)
adisuciu 0:f32d3fb1d3e2 638 {
adisuciu 0:f32d3fb1d3e2 639 cs = false;
adisuciu 0:f32d3fb1d3e2 640 for(uint8_t byte = 0; byte < bytes_number; byte++) {
adisuciu 0:f32d3fb1d3e2 641 data[byte] = ad7124.write(data[byte]);
adisuciu 0:f32d3fb1d3e2 642 }
adisuciu 0:f32d3fb1d3e2 643 cs = true;
adisuciu 0:f32d3fb1d3e2 644 return bytes_number;
adisuciu 0:f32d3fb1d3e2 645 }
adisuciu 0:f32d3fb1d3e2 646
adisuciu 0:f32d3fb1d3e2 647 uint8_t AD7124::SPI_Write(uint8_t *data, uint8_t bytes_number)
adisuciu 0:f32d3fb1d3e2 648 {
adisuciu 0:f32d3fb1d3e2 649 cs = false;
adisuciu 0:f32d3fb1d3e2 650 for(uint8_t byte = 0; byte < bytes_number; byte++) {
adisuciu 0:f32d3fb1d3e2 651 ad7124.write(data[byte]);
adisuciu 0:f32d3fb1d3e2 652 }
adisuciu 0:f32d3fb1d3e2 653
adisuciu 0:f32d3fb1d3e2 654 cs = true;
adisuciu 0:f32d3fb1d3e2 655 return bytes_number;
adisuciu 0:f32d3fb1d3e2 656
adisuciu 0:f32d3fb1d3e2 657 }