Library files for AD5592R

Dependents:   EVAL-AD5592R

Committer:
EndaKilgarriff
Date:
Mon Jun 15 13:58:03 2020 +0000
Revision:
1:2ad195e1455b
AD5592R Initial Commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EndaKilgarriff 1:2ad195e1455b 1 /***************************************************************************//**
EndaKilgarriff 1:2ad195e1455b 2 * @file ad5592r-base.c
EndaKilgarriff 1:2ad195e1455b 3 * @brief Implementation of AD5592R Base Driver.
EndaKilgarriff 1:2ad195e1455b 4 * @author Mircea Caprioru (mircea.caprioru@analog.com)
EndaKilgarriff 1:2ad195e1455b 5 ********************************************************************************
EndaKilgarriff 1:2ad195e1455b 6 * Copyright 2018, 2020(c) Analog Devices, Inc.
EndaKilgarriff 1:2ad195e1455b 7 *
EndaKilgarriff 1:2ad195e1455b 8 * All rights reserved.
EndaKilgarriff 1:2ad195e1455b 9 *
EndaKilgarriff 1:2ad195e1455b 10 * Redistribution and use in source and binary forms, with or without
EndaKilgarriff 1:2ad195e1455b 11 * modification, are permitted provided that the following conditions are met:
EndaKilgarriff 1:2ad195e1455b 12 * - Redistributions of source code must retain the above copyright
EndaKilgarriff 1:2ad195e1455b 13 * notice, this list of conditions and the following disclaimer.
EndaKilgarriff 1:2ad195e1455b 14 * - Redistributions in binary form must reproduce the above copyright
EndaKilgarriff 1:2ad195e1455b 15 * notice, this list of conditions and the following disclaimer in
EndaKilgarriff 1:2ad195e1455b 16 * the documentation and/or other materials provided with the
EndaKilgarriff 1:2ad195e1455b 17 * distribution.
EndaKilgarriff 1:2ad195e1455b 18 * - Neither the name of Analog Devices, Inc. nor the names of its
EndaKilgarriff 1:2ad195e1455b 19 * contributors may be used to endorse or promote products derived
EndaKilgarriff 1:2ad195e1455b 20 * from this software without specific prior written permission.
EndaKilgarriff 1:2ad195e1455b 21 * - The use of this software may or may not infringe the patent rights
EndaKilgarriff 1:2ad195e1455b 22 * of one or more patent holders. This license does not release you
EndaKilgarriff 1:2ad195e1455b 23 * from the requirement that you obtain separate licenses from these
EndaKilgarriff 1:2ad195e1455b 24 * patent holders to use this software.
EndaKilgarriff 1:2ad195e1455b 25 * - Use of the software either in source or binary form, must be run
EndaKilgarriff 1:2ad195e1455b 26 * on or directly connected to an Analog Devices Inc. component.
EndaKilgarriff 1:2ad195e1455b 27 *
EndaKilgarriff 1:2ad195e1455b 28 * THIS SOFTWARE IS PROVIDED BY ANALOG DEVICES "AS IS" AND ANY EXPRESS OR
EndaKilgarriff 1:2ad195e1455b 29 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, NON-INFRINGEMENT,
EndaKilgarriff 1:2ad195e1455b 30 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
EndaKilgarriff 1:2ad195e1455b 31 * IN NO EVENT SHALL ANALOG DEVICES BE LIABLE FOR ANY DIRECT, INDIRECT,
EndaKilgarriff 1:2ad195e1455b 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
EndaKilgarriff 1:2ad195e1455b 33 * LIMITED TO, INTELLECTUAL PROPERTY RIGHTS, PROCUREMENT OF SUBSTITUTE GOODS OR
EndaKilgarriff 1:2ad195e1455b 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EndaKilgarriff 1:2ad195e1455b 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EndaKilgarriff 1:2ad195e1455b 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EndaKilgarriff 1:2ad195e1455b 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EndaKilgarriff 1:2ad195e1455b 38 *******************************************************************************/
EndaKilgarriff 1:2ad195e1455b 39 #include "error.h"
EndaKilgarriff 1:2ad195e1455b 40 #include "ad5592r-base.h"
EndaKilgarriff 1:2ad195e1455b 41
EndaKilgarriff 1:2ad195e1455b 42 /**
EndaKilgarriff 1:2ad195e1455b 43 * Write register.
EndaKilgarriff 1:2ad195e1455b 44 *
EndaKilgarriff 1:2ad195e1455b 45 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 46 * @param reg - The register address.
EndaKilgarriff 1:2ad195e1455b 47 * @param value - register value
EndaKilgarriff 1:2ad195e1455b 48 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 49 */
EndaKilgarriff 1:2ad195e1455b 50 int32_t ad5592r_base_reg_write(struct ad5592r_dev *dev, uint8_t reg,
EndaKilgarriff 1:2ad195e1455b 51 uint16_t value)
EndaKilgarriff 1:2ad195e1455b 52 {
EndaKilgarriff 1:2ad195e1455b 53 return dev->ops->reg_write(dev, reg, value);
EndaKilgarriff 1:2ad195e1455b 54 }
EndaKilgarriff 1:2ad195e1455b 55
EndaKilgarriff 1:2ad195e1455b 56 /**
EndaKilgarriff 1:2ad195e1455b 57 * Read register.
EndaKilgarriff 1:2ad195e1455b 58 *
EndaKilgarriff 1:2ad195e1455b 59 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 60 * @param reg - The register address.
EndaKilgarriff 1:2ad195e1455b 61 * @param value - register value
EndaKilgarriff 1:2ad195e1455b 62 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 63 */
EndaKilgarriff 1:2ad195e1455b 64 int32_t ad5592r_base_reg_read(struct ad5592r_dev *dev, uint8_t reg,
EndaKilgarriff 1:2ad195e1455b 65 uint16_t *value)
EndaKilgarriff 1:2ad195e1455b 66 {
EndaKilgarriff 1:2ad195e1455b 67 return dev->ops->reg_read(dev, reg, value);
EndaKilgarriff 1:2ad195e1455b 68 }
EndaKilgarriff 1:2ad195e1455b 69
EndaKilgarriff 1:2ad195e1455b 70 /**
EndaKilgarriff 1:2ad195e1455b 71 * Get GPIO value
EndaKilgarriff 1:2ad195e1455b 72 *
EndaKilgarriff 1:2ad195e1455b 73 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 74 * @param offset - The channel number.
EndaKilgarriff 1:2ad195e1455b 75 * @return 0 or 1 depending on the GPIO value.
EndaKilgarriff 1:2ad195e1455b 76 */
EndaKilgarriff 1:2ad195e1455b 77 int32_t ad5592r_gpio_get(struct ad5592r_dev *dev, uint8_t offset)
EndaKilgarriff 1:2ad195e1455b 78 {
EndaKilgarriff 1:2ad195e1455b 79 int32_t ret = 0;
EndaKilgarriff 1:2ad195e1455b 80 uint8_t val;
EndaKilgarriff 1:2ad195e1455b 81
EndaKilgarriff 1:2ad195e1455b 82 if (!dev)
EndaKilgarriff 1:2ad195e1455b 83 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 84
EndaKilgarriff 1:2ad195e1455b 85 if (dev->gpio_out & BIT(offset))
EndaKilgarriff 1:2ad195e1455b 86 val = dev->gpio_val;
EndaKilgarriff 1:2ad195e1455b 87 else
EndaKilgarriff 1:2ad195e1455b 88 ret = dev->ops->gpio_read(dev, &val);
EndaKilgarriff 1:2ad195e1455b 89
EndaKilgarriff 1:2ad195e1455b 90 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 91 return ret;
EndaKilgarriff 1:2ad195e1455b 92
EndaKilgarriff 1:2ad195e1455b 93 return !!(val & BIT(offset));
EndaKilgarriff 1:2ad195e1455b 94 }
EndaKilgarriff 1:2ad195e1455b 95
EndaKilgarriff 1:2ad195e1455b 96 /**
EndaKilgarriff 1:2ad195e1455b 97 * Set GPIO value
EndaKilgarriff 1:2ad195e1455b 98 *
EndaKilgarriff 1:2ad195e1455b 99 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 100 * @param offset - The channel number.
EndaKilgarriff 1:2ad195e1455b 101 * @param value - the GPIO value (0 or 1)
EndaKilgarriff 1:2ad195e1455b 102 */
EndaKilgarriff 1:2ad195e1455b 103 int32_t ad5592r_gpio_set(struct ad5592r_dev *dev, uint8_t offset, int32_t value)
EndaKilgarriff 1:2ad195e1455b 104 {
EndaKilgarriff 1:2ad195e1455b 105 if (!dev)
EndaKilgarriff 1:2ad195e1455b 106 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 107
EndaKilgarriff 1:2ad195e1455b 108 if (value)
EndaKilgarriff 1:2ad195e1455b 109 dev->gpio_val |= BIT(offset);
EndaKilgarriff 1:2ad195e1455b 110 else
EndaKilgarriff 1:2ad195e1455b 111 dev->gpio_val &= ~BIT(offset);
EndaKilgarriff 1:2ad195e1455b 112
EndaKilgarriff 1:2ad195e1455b 113 return ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_SET,
EndaKilgarriff 1:2ad195e1455b 114 dev->gpio_val);
EndaKilgarriff 1:2ad195e1455b 115 }
EndaKilgarriff 1:2ad195e1455b 116
EndaKilgarriff 1:2ad195e1455b 117 /**
EndaKilgarriff 1:2ad195e1455b 118 * Set GPIO as input
EndaKilgarriff 1:2ad195e1455b 119 *
EndaKilgarriff 1:2ad195e1455b 120 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 121 * @param offset - The channel number.
EndaKilgarriff 1:2ad195e1455b 122 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 123 */
EndaKilgarriff 1:2ad195e1455b 124 int32_t ad5592r_gpio_direction_input(struct ad5592r_dev *dev, uint8_t offset)
EndaKilgarriff 1:2ad195e1455b 125 {
EndaKilgarriff 1:2ad195e1455b 126 int32_t ret;
EndaKilgarriff 1:2ad195e1455b 127
EndaKilgarriff 1:2ad195e1455b 128 if (!dev)
EndaKilgarriff 1:2ad195e1455b 129 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 130
EndaKilgarriff 1:2ad195e1455b 131 dev->gpio_out &= ~BIT(offset);
EndaKilgarriff 1:2ad195e1455b 132 dev->gpio_in |= BIT(offset);
EndaKilgarriff 1:2ad195e1455b 133
EndaKilgarriff 1:2ad195e1455b 134 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_OUT_EN,
EndaKilgarriff 1:2ad195e1455b 135 dev->gpio_out);
EndaKilgarriff 1:2ad195e1455b 136 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 137 return ret;
EndaKilgarriff 1:2ad195e1455b 138
EndaKilgarriff 1:2ad195e1455b 139 return ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_IN_EN,
EndaKilgarriff 1:2ad195e1455b 140 dev->gpio_in);
EndaKilgarriff 1:2ad195e1455b 141 }
EndaKilgarriff 1:2ad195e1455b 142
EndaKilgarriff 1:2ad195e1455b 143 /**
EndaKilgarriff 1:2ad195e1455b 144 * Set GPIO as output
EndaKilgarriff 1:2ad195e1455b 145 *
EndaKilgarriff 1:2ad195e1455b 146 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 147 * @param offset - The channel number.
EndaKilgarriff 1:2ad195e1455b 148 * @param value - GPIO value to set.
EndaKilgarriff 1:2ad195e1455b 149 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 150 */
EndaKilgarriff 1:2ad195e1455b 151 int32_t ad5592r_gpio_direction_output(struct ad5592r_dev *dev,
EndaKilgarriff 1:2ad195e1455b 152 uint8_t offset, int32_t value)
EndaKilgarriff 1:2ad195e1455b 153 {
EndaKilgarriff 1:2ad195e1455b 154 int32_t ret;
EndaKilgarriff 1:2ad195e1455b 155
EndaKilgarriff 1:2ad195e1455b 156 if (!dev)
EndaKilgarriff 1:2ad195e1455b 157 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 158
EndaKilgarriff 1:2ad195e1455b 159 if (value)
EndaKilgarriff 1:2ad195e1455b 160 dev->gpio_val |= BIT(offset);
EndaKilgarriff 1:2ad195e1455b 161 else
EndaKilgarriff 1:2ad195e1455b 162 dev->gpio_val &= ~BIT(offset);
EndaKilgarriff 1:2ad195e1455b 163
EndaKilgarriff 1:2ad195e1455b 164 dev->gpio_in &= ~BIT(offset);
EndaKilgarriff 1:2ad195e1455b 165 dev->gpio_out |= BIT(offset);
EndaKilgarriff 1:2ad195e1455b 166
EndaKilgarriff 1:2ad195e1455b 167 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_SET, dev->gpio_val);
EndaKilgarriff 1:2ad195e1455b 168 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 169 return ret;
EndaKilgarriff 1:2ad195e1455b 170
EndaKilgarriff 1:2ad195e1455b 171 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_OUT_EN,
EndaKilgarriff 1:2ad195e1455b 172 dev->gpio_out);
EndaKilgarriff 1:2ad195e1455b 173 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 174 return ret;
EndaKilgarriff 1:2ad195e1455b 175
EndaKilgarriff 1:2ad195e1455b 176 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_IN_EN,
EndaKilgarriff 1:2ad195e1455b 177 dev->gpio_in);
EndaKilgarriff 1:2ad195e1455b 178
EndaKilgarriff 1:2ad195e1455b 179 return ret;
EndaKilgarriff 1:2ad195e1455b 180 }
EndaKilgarriff 1:2ad195e1455b 181
EndaKilgarriff 1:2ad195e1455b 182 /**
EndaKilgarriff 1:2ad195e1455b 183 * Software reset device.
EndaKilgarriff 1:2ad195e1455b 184 *
EndaKilgarriff 1:2ad195e1455b 185 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 186 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 187 */
EndaKilgarriff 1:2ad195e1455b 188 int32_t ad5592r_software_reset(struct ad5592r_dev *dev)
EndaKilgarriff 1:2ad195e1455b 189 {
EndaKilgarriff 1:2ad195e1455b 190 int32_t ret;
EndaKilgarriff 1:2ad195e1455b 191
EndaKilgarriff 1:2ad195e1455b 192 if (!dev)
EndaKilgarriff 1:2ad195e1455b 193 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 194
EndaKilgarriff 1:2ad195e1455b 195 /* Writing this magic value resets the device */
EndaKilgarriff 1:2ad195e1455b 196 ret = ad5592r_base_reg_write(dev, AD5592R_REG_RESET, 0xdac);
EndaKilgarriff 1:2ad195e1455b 197
EndaKilgarriff 1:2ad195e1455b 198 mdelay(10);
EndaKilgarriff 1:2ad195e1455b 199
EndaKilgarriff 1:2ad195e1455b 200 return ret;
EndaKilgarriff 1:2ad195e1455b 201 }
EndaKilgarriff 1:2ad195e1455b 202
EndaKilgarriff 1:2ad195e1455b 203 /**
EndaKilgarriff 1:2ad195e1455b 204 * Set channels modes.
EndaKilgarriff 1:2ad195e1455b 205 *
EndaKilgarriff 1:2ad195e1455b 206 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 207 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 208 */
EndaKilgarriff 1:2ad195e1455b 209 int32_t ad5592r_set_channel_modes(struct ad5592r_dev *dev)
EndaKilgarriff 1:2ad195e1455b 210 {
EndaKilgarriff 1:2ad195e1455b 211 int32_t ret;
EndaKilgarriff 1:2ad195e1455b 212 uint8_t i;
EndaKilgarriff 1:2ad195e1455b 213 uint8_t pulldown = 0, tristate = 0, dac = 0, adc = 0;
EndaKilgarriff 1:2ad195e1455b 214 uint16_t read_back;
EndaKilgarriff 1:2ad195e1455b 215
EndaKilgarriff 1:2ad195e1455b 216 if (!dev)
EndaKilgarriff 1:2ad195e1455b 217 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 218
EndaKilgarriff 1:2ad195e1455b 219 dev->gpio_in = 0;
EndaKilgarriff 1:2ad195e1455b 220 dev->gpio_out = 0;
EndaKilgarriff 1:2ad195e1455b 221
EndaKilgarriff 1:2ad195e1455b 222 for (i = 0; i < dev->num_channels; i++) {
EndaKilgarriff 1:2ad195e1455b 223 switch (dev->channel_modes[i]) {
EndaKilgarriff 1:2ad195e1455b 224 case CH_MODE_DAC:
EndaKilgarriff 1:2ad195e1455b 225 dac |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 226 break;
EndaKilgarriff 1:2ad195e1455b 227
EndaKilgarriff 1:2ad195e1455b 228 case CH_MODE_ADC:
EndaKilgarriff 1:2ad195e1455b 229 adc |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 230 break;
EndaKilgarriff 1:2ad195e1455b 231
EndaKilgarriff 1:2ad195e1455b 232 case CH_MODE_DAC_AND_ADC:
EndaKilgarriff 1:2ad195e1455b 233 dac |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 234 adc |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 235 break;
EndaKilgarriff 1:2ad195e1455b 236
EndaKilgarriff 1:2ad195e1455b 237 case CH_MODE_GPI:
EndaKilgarriff 1:2ad195e1455b 238 dev->gpio_in |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 239 break;
EndaKilgarriff 1:2ad195e1455b 240
EndaKilgarriff 1:2ad195e1455b 241 case CH_MODE_GPO:
EndaKilgarriff 1:2ad195e1455b 242 dev->gpio_out |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 243 break;
EndaKilgarriff 1:2ad195e1455b 244
EndaKilgarriff 1:2ad195e1455b 245 case CH_MODE_UNUSED:
EndaKilgarriff 1:2ad195e1455b 246 /* fall-through */
EndaKilgarriff 1:2ad195e1455b 247 default:
EndaKilgarriff 1:2ad195e1455b 248 switch (dev->channel_offstate[i]) {
EndaKilgarriff 1:2ad195e1455b 249 case CH_OFFSTATE_OUT_TRISTATE:
EndaKilgarriff 1:2ad195e1455b 250 tristate |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 251 break;
EndaKilgarriff 1:2ad195e1455b 252
EndaKilgarriff 1:2ad195e1455b 253 case CH_OFFSTATE_OUT_LOW:
EndaKilgarriff 1:2ad195e1455b 254 dev->gpio_out |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 255 break;
EndaKilgarriff 1:2ad195e1455b 256
EndaKilgarriff 1:2ad195e1455b 257 case CH_OFFSTATE_OUT_HIGH:
EndaKilgarriff 1:2ad195e1455b 258 dev->gpio_out |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 259 dev->gpio_val |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 260 break;
EndaKilgarriff 1:2ad195e1455b 261
EndaKilgarriff 1:2ad195e1455b 262 case CH_OFFSTATE_PULLDOWN:
EndaKilgarriff 1:2ad195e1455b 263 /* fall-through */
EndaKilgarriff 1:2ad195e1455b 264 default:
EndaKilgarriff 1:2ad195e1455b 265 pulldown |= BIT(i);
EndaKilgarriff 1:2ad195e1455b 266 break;
EndaKilgarriff 1:2ad195e1455b 267 }
EndaKilgarriff 1:2ad195e1455b 268 }
EndaKilgarriff 1:2ad195e1455b 269 }
EndaKilgarriff 1:2ad195e1455b 270
EndaKilgarriff 1:2ad195e1455b 271 /* Pull down unused pins to GND */
EndaKilgarriff 1:2ad195e1455b 272 ret = ad5592r_base_reg_write(dev, AD5592R_REG_PULLDOWN, pulldown);
EndaKilgarriff 1:2ad195e1455b 273 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 274 return ret;
EndaKilgarriff 1:2ad195e1455b 275
EndaKilgarriff 1:2ad195e1455b 276 ret = ad5592r_base_reg_write(dev, AD5592R_REG_TRISTATE, tristate);
EndaKilgarriff 1:2ad195e1455b 277 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 278 return ret;
EndaKilgarriff 1:2ad195e1455b 279
EndaKilgarriff 1:2ad195e1455b 280 /* Configure pins that we use */
EndaKilgarriff 1:2ad195e1455b 281 ret = ad5592r_base_reg_write(dev, AD5592R_REG_DAC_EN, dac);
EndaKilgarriff 1:2ad195e1455b 282 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 283 return ret;
EndaKilgarriff 1:2ad195e1455b 284
EndaKilgarriff 1:2ad195e1455b 285 ret = ad5592r_base_reg_write(dev, AD5592R_REG_ADC_EN, adc);
EndaKilgarriff 1:2ad195e1455b 286 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 287 return ret;
EndaKilgarriff 1:2ad195e1455b 288
EndaKilgarriff 1:2ad195e1455b 289 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_SET, dev->gpio_val);
EndaKilgarriff 1:2ad195e1455b 290 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 291 return ret;
EndaKilgarriff 1:2ad195e1455b 292
EndaKilgarriff 1:2ad195e1455b 293 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_OUT_EN,
EndaKilgarriff 1:2ad195e1455b 294 dev->gpio_out);
EndaKilgarriff 1:2ad195e1455b 295 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 296 return ret;
EndaKilgarriff 1:2ad195e1455b 297
EndaKilgarriff 1:2ad195e1455b 298 ret = ad5592r_base_reg_write(dev, AD5592R_REG_GPIO_IN_EN,
EndaKilgarriff 1:2ad195e1455b 299 dev->gpio_in);
EndaKilgarriff 1:2ad195e1455b 300 if (ret < 0)
EndaKilgarriff 1:2ad195e1455b 301 return ret;
EndaKilgarriff 1:2ad195e1455b 302
EndaKilgarriff 1:2ad195e1455b 303 /* Verify that we can read back at least one register */
EndaKilgarriff 1:2ad195e1455b 304 ret = ad5592r_base_reg_read(dev, AD5592R_REG_ADC_EN, &read_back);
EndaKilgarriff 1:2ad195e1455b 305 if (!ret && (read_back & 0xff) != adc)
EndaKilgarriff 1:2ad195e1455b 306 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 307
EndaKilgarriff 1:2ad195e1455b 308 return ret;
EndaKilgarriff 1:2ad195e1455b 309 }
EndaKilgarriff 1:2ad195e1455b 310
EndaKilgarriff 1:2ad195e1455b 311 /**
EndaKilgarriff 1:2ad195e1455b 312 * Reset channels and set GPIO to unused.
EndaKilgarriff 1:2ad195e1455b 313 *
EndaKilgarriff 1:2ad195e1455b 314 * @param dev - The device structure.
EndaKilgarriff 1:2ad195e1455b 315 * @return 0 in case of success, negative error code otherwise
EndaKilgarriff 1:2ad195e1455b 316 */
EndaKilgarriff 1:2ad195e1455b 317 int32_t ad5592r_reset_channel_modes(struct ad5592r_dev *dev)
EndaKilgarriff 1:2ad195e1455b 318 {
EndaKilgarriff 1:2ad195e1455b 319 uint32_t i;
EndaKilgarriff 1:2ad195e1455b 320
EndaKilgarriff 1:2ad195e1455b 321 if (!dev)
EndaKilgarriff 1:2ad195e1455b 322 return FAILURE;
EndaKilgarriff 1:2ad195e1455b 323
EndaKilgarriff 1:2ad195e1455b 324 for (i = 0; i < sizeof(dev->channel_modes); i++)
EndaKilgarriff 1:2ad195e1455b 325 dev->channel_modes[i] = CH_MODE_UNUSED;
EndaKilgarriff 1:2ad195e1455b 326
EndaKilgarriff 1:2ad195e1455b 327 return ad5592r_set_channel_modes(dev);
EndaKilgarriff 1:2ad195e1455b 328 }