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00001 /******************************************************************************* 00002 * Copyright (c) 2014-2015 IBM Corporation. 00003 * All rights reserved. This program and the accompanying materials 00004 * are made available under the terms of the Eclipse Public License v1.0 00005 * which accompanies this distribution, and is available at 00006 * http://www.eclipse.org/legal/epl-v10.html 00007 * 00008 * Contributors: 00009 * IBM Zurich Research Lab - initial API, implementation and documentation 00010 *******************************************************************************/ 00011 00012 //! \file 00013 00014 00015 #include "lmic.h" 00016 #include "debug.h" 00017 00018 #if !defined(MINRX_SYMS) 00019 #define MINRX_SYMS 5 00020 #endif // !defined(MINRX_SYMS) 00021 #define PAMBL_SYMS 8 00022 #define PAMBL_FSK 5 00023 #define PRERX_FSK 1 00024 #define RXLEN_FSK (1+5+2) 00025 00026 #define BCN_INTV_osticks sec2osticks(BCN_INTV_sec) 00027 #define TXRX_GUARD_osticks ms2osticks(TXRX_GUARD_ms) 00028 #define JOIN_GUARD_osticks ms2osticks(JOIN_GUARD_ms) 00029 #define DELAY_DNW1_osticks sec2osticks(DELAY_DNW1) 00030 #define DELAY_DNW2_osticks sec2osticks(DELAY_DNW2) 00031 #define DELAY_JACC1_osticks sec2osticks(DELAY_JACC1) 00032 #define DELAY_JACC2_osticks sec2osticks(DELAY_JACC2) 00033 #define DELAY_EXTDNW2_osticks sec2osticks(DELAY_EXTDNW2) 00034 #define BCN_RESERVE_osticks ms2osticks(BCN_RESERVE_ms) 00035 #define BCN_GUARD_osticks ms2osticks(BCN_GUARD_ms) 00036 #define BCN_WINDOW_osticks ms2osticks(BCN_WINDOW_ms) 00037 #define AIRTIME_BCN_osticks us2osticks(AIRTIME_BCN) 00038 #if defined(CFG_eu868) 00039 #define DNW2_SAFETY_ZONE ms2osticks(3000) 00040 #endif 00041 #if defined(CFG_us915) 00042 #define DNW2_SAFETY_ZONE ms2osticks(750) 00043 #endif 00044 00045 // Special APIs - for development or testing 00046 #define isTESTMODE() 0 00047 00048 DEFINE_LMIC; 00049 DECL_ON_LMIC_EVENT; 00050 00051 00052 // Fwd decls. 00053 static void engineUpdate(void); 00054 static void startScan (void); 00055 00056 00057 // ================================================================================ 00058 // BEG OS - default implementations for certain OS suport functions 00059 00060 #if !defined(HAS_os_calls) 00061 00062 #if !defined(os_rlsbf2) 00063 u2_t os_rlsbf2 (xref2cu1_t buf) { 00064 return (u2_t)(buf[0] | (buf[1]<<8)); 00065 } 00066 #endif 00067 00068 #if !defined(os_rlsbf4) 00069 u4_t os_rlsbf4 (xref2cu1_t buf) { 00070 return (u4_t)(buf[0] | (buf[1]<<8) | ((u4_t)buf[2]<<16) | ((u4_t)buf[3]<<24)); 00071 } 00072 #endif 00073 00074 00075 #if !defined(os_rmsbf4) 00076 u4_t os_rmsbf4 (xref2cu1_t buf) { 00077 return (u4_t)(buf[3] | (buf[2]<<8) | ((u4_t)buf[1]<<16) | ((u4_t)buf[0]<<24)); 00078 } 00079 #endif 00080 00081 00082 #if !defined(os_wlsbf2) 00083 void os_wlsbf2 (xref2u1_t buf, u2_t v) { 00084 buf[0] = v; 00085 buf[1] = v>>8; 00086 } 00087 #endif 00088 00089 #if !defined(os_wlsbf4) 00090 void os_wlsbf4 (xref2u1_t buf, u4_t v) { 00091 buf[0] = v; 00092 buf[1] = v>>8; 00093 buf[2] = v>>16; 00094 buf[3] = v>>24; 00095 } 00096 #endif 00097 00098 #if !defined(os_wmsbf4) 00099 void os_wmsbf4 (xref2u1_t buf, u4_t v) { 00100 buf[3] = v; 00101 buf[2] = v>>8; 00102 buf[1] = v>>16; 00103 buf[0] = v>>24; 00104 } 00105 #endif 00106 00107 #if !defined(os_getBattLevel) 00108 u1_t os_getBattLevel (void) { 00109 return MCMD_DEVS_BATT_NOINFO; 00110 } 00111 #endif 00112 00113 #if !defined(os_crc16) 00114 // New CRC-16 CCITT(XMODEM) checksum for beacons: 00115 u2_t os_crc16 (xref2u1_t data, uint len) { 00116 u2_t remainder = 0; 00117 u2_t polynomial = 0x1021; 00118 for( uint i = 0; i < len; i++ ) { 00119 remainder ^= data[i] << 8; 00120 for( u1_t bit = 8; bit > 0; bit--) { 00121 if( (remainder & 0x8000) ) 00122 remainder = (remainder << 1) ^ polynomial; 00123 else 00124 remainder <<= 1; 00125 } 00126 } 00127 return remainder; 00128 } 00129 #endif 00130 00131 #endif // !HAS_os_calls 00132 00133 // END OS - default implementations for certain OS suport functions 00134 // ================================================================================ 00135 00136 // ================================================================================ 00137 // BEG AES 00138 00139 static void micB0 (u4_t devaddr, u4_t seqno, int dndir, int len) { 00140 os_clearMem(AESaux,16); 00141 AESaux[0] = 0x49; 00142 AESaux[5] = dndir?1:0; 00143 AESaux[15] = len; 00144 os_wlsbf4(AESaux+ 6,devaddr); 00145 os_wlsbf4(AESaux+10,seqno); 00146 } 00147 00148 00149 static int aes_verifyMic (xref2cu1_t key, u4_t devaddr, u4_t seqno, int dndir, xref2u1_t pdu, int len) { 00150 micB0(devaddr, seqno, dndir, len); 00151 os_copyMem(AESkey,key,16); 00152 return os_aes(AES_MIC, pdu, len) == os_rmsbf4(pdu+len); 00153 } 00154 00155 00156 static void aes_appendMic (xref2cu1_t key, u4_t devaddr, u4_t seqno, int dndir, xref2u1_t pdu, int len) { 00157 micB0(devaddr, seqno, dndir, len); 00158 os_copyMem(AESkey,key,16); 00159 // MSB because of internal structure of AES 00160 os_wmsbf4(pdu+len, os_aes(AES_MIC, pdu, len)); 00161 } 00162 00163 00164 static void aes_appendMic0 (xref2u1_t pdu, int len) { 00165 os_getDevKey(AESkey); 00166 os_wmsbf4(pdu+len, os_aes(AES_MIC|AES_MICNOAUX, pdu, len)); // MSB because of internal structure of AES 00167 } 00168 00169 00170 static int aes_verifyMic0 (xref2u1_t pdu, int len) { 00171 os_getDevKey(AESkey); 00172 return os_aes(AES_MIC|AES_MICNOAUX, pdu, len) == os_rmsbf4(pdu+len); 00173 } 00174 00175 00176 static void aes_encrypt (xref2u1_t pdu, int len) { 00177 os_getDevKey(AESkey); 00178 os_aes(AES_ENC, pdu, len); 00179 } 00180 00181 00182 static void aes_cipher (xref2cu1_t key, u4_t devaddr, u4_t seqno, int dndir, xref2u1_t payload, int len) { 00183 00184 /* debug_str("Frame Cnt: "); 00185 debug_uint(seqno); 00186 debug_char( '\r' ); 00187 debug_char( '\n' ); 00188 debug_str("Payload before AES treatment: "); 00189 debug_buf(payload, len);*/ 00190 if( len <= 0 ) 00191 return; 00192 os_clearMem(AESaux, 16); 00193 AESaux[0] = AESaux[15] = 1; // mode=cipher / dir=down / block counter=1 00194 AESaux[5] = dndir?1:0; 00195 os_wlsbf4(AESaux+ 6,devaddr); 00196 os_wlsbf4(AESaux+10,seqno); 00197 os_copyMem(AESkey,key,16); 00198 // debug_str("A:"); 00199 // debug_buf(AESaux,16); 00200 os_aes(AES_CTR, payload, len); 00201 /*debug_str("A after AES treatment:"); 00202 debug_buf(AESaux,16); 00203 debug_str("Payload after AES treatment: "); 00204 debug_buf(payload, len);*/ 00205 } 00206 00207 00208 static void aes_sessKeys (u2_t devnonce, xref2cu1_t artnonce, xref2u1_t nwkkey, xref2u1_t artkey) { 00209 os_clearMem(nwkkey, 16); 00210 nwkkey[0] = 0x01; 00211 os_copyMem(nwkkey+1, artnonce, LEN_ARTNONCE+LEN_NETID); 00212 os_wlsbf2(nwkkey+1+LEN_ARTNONCE+LEN_NETID, devnonce); 00213 os_copyMem(artkey, nwkkey, 16); 00214 artkey[0] = 0x02; 00215 00216 os_getDevKey(AESkey); 00217 os_aes(AES_ENC, nwkkey, 16); 00218 os_getDevKey(AESkey); 00219 os_aes(AES_ENC, artkey, 16); 00220 } 00221 00222 // END AES 00223 // ================================================================================ 00224 00225 00226 // ================================================================================ 00227 // BEG LORA 00228 00229 #if defined(CFG_eu868) // ======================================== 00230 00231 #define maxFrameLen(dr) ((dr)<=DR_SF9 ? maxFrameLens[(dr)] : 0xFF) 00232 const u1_t maxFrameLens [] = { 64,64,64,123 }; 00233 00234 const u1_t _DR2RPS_CRC[] = { 00235 ILLEGAL_RPS, 00236 (u1_t)MAKERPS(SF12, BW125, CR_4_5, 0, 0), 00237 (u1_t)MAKERPS(SF11, BW125, CR_4_5, 0, 0), 00238 (u1_t)MAKERPS(SF10, BW125, CR_4_5, 0, 0), 00239 (u1_t)MAKERPS(SF9, BW125, CR_4_5, 0, 0), 00240 (u1_t)MAKERPS(SF8, BW125, CR_4_5, 0, 0), 00241 (u1_t)MAKERPS(SF7, BW125, CR_4_5, 0, 0), 00242 (u1_t)MAKERPS(SF7, BW250, CR_4_5, 0, 0), 00243 (u1_t)MAKERPS(FSK, BW125, CR_4_5, 0, 0), 00244 ILLEGAL_RPS 00245 }; 00246 00247 static const s1_t TXPOWLEVELS[] = { 00248 20, 14, 11, 8, 5, 2, 0,0, 0,0,0,0, 0,0,0,0 00249 }; 00250 #define pow2dBm(mcmd_ladr_p1) (TXPOWLEVELS[(mcmd_ladr_p1&MCMD_LADR_POW_MASK)>>MCMD_LADR_POW_SHIFT]) 00251 00252 #elif defined(CFG_us915) // ======================================== 00253 00254 #define maxFrameLen(dr) ((dr)<=DR_SF11CR ? maxFrameLens[(dr)] : 0xFF) 00255 const u1_t maxFrameLens [] = { 24,66,142,255,255,255,255,255, 66,142 }; 00256 00257 const u1_t _DR2RPS_CRC[] = { 00258 ILLEGAL_RPS, 00259 MAKERPS(SF10, BW125, CR_4_5, 0, 0), 00260 MAKERPS(SF9 , BW125, CR_4_5, 0, 0), 00261 MAKERPS(SF8 , BW125, CR_4_5, 0, 0), 00262 MAKERPS(SF7 , BW125, CR_4_5, 0, 0), 00263 MAKERPS(SF8 , BW500, CR_4_5, 0, 0), 00264 ILLEGAL_RPS , 00265 ILLEGAL_RPS , 00266 ILLEGAL_RPS , 00267 MAKERPS(SF12, BW500, CR_4_5, 0, 0), 00268 MAKERPS(SF11, BW500, CR_4_5, 0, 0), 00269 MAKERPS(SF10, BW500, CR_4_5, 0, 0), 00270 MAKERPS(SF9 , BW500, CR_4_5, 0, 0), 00271 MAKERPS(SF8 , BW500, CR_4_5, 0, 0), 00272 MAKERPS(SF7 , BW500, CR_4_5, 0, 0), 00273 ILLEGAL_RPS 00274 }; 00275 00276 #define pow2dBm(mcmd_ladr_p1) ((s1_t)(30 - (((mcmd_ladr_p1)&MCMD_LADR_POW_MASK)<<1))) 00277 00278 #endif // ================================================ 00279 00280 static const u1_t SENSITIVITY[7][3] = { 00281 // ------------bw---------- 00282 // 125kHz 250kHz 500kHz 00283 { 141-109, 141-109, 141-109 }, // FSK 00284 { 141-127, 141-124, 141-121 }, // SF7 00285 { 141-129, 141-126, 141-123 }, // SF8 00286 { 141-132, 141-129, 141-126 }, // SF9 00287 { 141-135, 141-132, 141-129 }, // SF10 00288 { 141-138, 141-135, 141-132 }, // SF11 00289 { 141-141, 141-138, 141-135 } // SF12 00290 }; 00291 00292 int getSensitivity (rps_t rps) { 00293 return -141 + SENSITIVITY[getSf(rps)][getBw(rps)]; 00294 } 00295 00296 ostime_t calcAirTime (rps_t rps, u1_t plen) { 00297 u1_t bw = getBw(rps); // 0,1,2 = 125,250,500kHz 00298 u1_t sf = getSf(rps); // 0=FSK, 1..6 = SF7..12 00299 if( sf == FSK ) { 00300 return (plen+/*preamble*/5+/*syncword*/3+/*len*/1+/*crc*/2) * /*bits/byte*/8 00301 * (s4_t)OSTICKS_PER_SEC / /*kbit/s*/50000; 00302 } 00303 u1_t sfx = 4*(sf+(7-SF7)); 00304 u1_t q = sfx - (sf >= SF11 ? 8 : 0); 00305 int tmp = 8*plen - sfx + 28 + (getNocrc(rps)?0:16) - (getIh(rps)?20:0); 00306 if( tmp > 0 ) { 00307 tmp = (tmp + q - 1) / q; 00308 tmp *= getCr(rps)+5; 00309 tmp += 8; 00310 } else { 00311 tmp = 8; 00312 } 00313 tmp = (tmp<<2) + /*preamble*/49 /* 4 * (8 + 4.25) */; 00314 // bw = 125000 = 15625 * 2^3 00315 // 250000 = 15625 * 2^4 00316 // 500000 = 15625 * 2^5 00317 // sf = 7..12 00318 // 00319 // osticks = tmp * OSTICKS_PER_SEC * 1<<sf / bw 00320 // 00321 // 3 => counter reduced divisor 125000/8 => 15625 00322 // 2 => counter 2 shift on tmp 00323 sfx = sf+(7-SF7) - (3+2) - bw; 00324 int div = 15625; 00325 if( sfx > 4 ) { 00326 // prevent 32bit signed int overflow in last step 00327 div >>= sfx-4; 00328 sfx = 4; 00329 } 00330 // Need 32bit arithmetic for this last step 00331 return (((ostime_t)tmp << sfx) * OSTICKS_PER_SEC + div/2) / div; 00332 } 00333 00334 extern inline s1_t rssi2s1 (int v); 00335 extern inline int s12rssi (s1_t v); 00336 extern inline float s12snr (s1_t v); 00337 extern inline s1_t snr2s1 (double v); 00338 00339 extern inline rps_t updr2rps (dr_t dr); 00340 extern inline rps_t dndr2rps (dr_t dr); 00341 extern inline int isFasterDR (dr_t dr1, dr_t dr2); 00342 extern inline int isSlowerDR (dr_t dr1, dr_t dr2); 00343 extern inline dr_t incDR (dr_t dr); 00344 extern inline dr_t decDR (dr_t dr); 00345 extern inline dr_t assertDR (dr_t dr); 00346 extern inline dr_t validDR (dr_t dr); 00347 extern inline dr_t lowerDR (dr_t dr, u1_t n); 00348 00349 extern inline sf_t getSf (rps_t params); 00350 extern inline rps_t setSf (rps_t params, sf_t sf); 00351 extern inline bw_t getBw (rps_t params); 00352 extern inline rps_t setBw (rps_t params, bw_t cr); 00353 extern inline cr_t getCr (rps_t params); 00354 extern inline rps_t setCr (rps_t params, cr_t cr); 00355 extern inline int getNocrc (rps_t params); 00356 extern inline rps_t setNocrc (rps_t params, int nocrc); 00357 extern inline int getIh (rps_t params); 00358 extern inline rps_t setIh (rps_t params, int ih); 00359 extern inline rps_t makeRps (sf_t sf, bw_t bw, cr_t cr, int ih, int nocrc); 00360 extern inline int sameSfBw (rps_t r1, rps_t r2); 00361 00362 // END LORA 00363 // ================================================================================ 00364 00365 00366 // Adjust DR for TX retries 00367 // - indexed by retry count 00368 // - return steps to lower DR 00369 static const u1_t DRADJUST[2+TXCONF_ATTEMPTS] = { 00370 // normal frames - 1st try / no retry 00371 0, 00372 // confirmed frames 00373 0,0,1,0,1,0,1,0,0 00374 }; 00375 00376 00377 // Table below defines the size of one symbol as 00378 // symtime = 256us * 2^T(sf,bw) 00379 // 256us is called one symunit. 00380 // SF: 00381 // BW: |__7___8___9__10__11__12 00382 // 125kHz | 2 3 4 5 6 7 00383 // 250kHz | 1 2 3 4 5 6 00384 // 500kHz | 0 1 2 3 4 5 00385 // 00386 // Times for half symbol per DR 00387 // Per DR table to minimize rounding errors 00388 static const ostime_t DR2HSYM_osticks[] = { 00389 #if defined(CFG_eu868) 00390 #define dr2hsym(dr) (DR2HSYM_osticks[(dr)]) 00391 us2osticksRound(128<<7), // DR_SF12 00392 us2osticksRound(128<<6), // DR_SF11 00393 us2osticksRound(128<<5), // DR_SF10 00394 us2osticksRound(128<<4), // DR_SF9 00395 us2osticksRound(128<<3), // DR_SF8 00396 us2osticksRound(128<<2), // DR_SF7 00397 us2osticksRound(128<<1), // DR_SF7B 00398 us2osticksRound(80) // FSK -- not used (time for 1/2 byte) 00399 #elif defined(CFG_us915) 00400 #define dr2hsym(dr) (DR2HSYM_osticks[(dr)&7]) // map DR_SFnCR -> 0-6 00401 us2osticksRound(128<<5), // DR_SF10 DR_SF12CR 00402 us2osticksRound(128<<4), // DR_SF9 DR_SF11CR 00403 us2osticksRound(128<<3), // DR_SF8 DR_SF10CR 00404 us2osticksRound(128<<2), // DR_SF7 DR_SF9CR 00405 us2osticksRound(128<<1), // DR_SF8C DR_SF8CR 00406 us2osticksRound(128<<0) // ------ DR_SF7CR 00407 #endif 00408 }; 00409 00410 00411 static ostime_t calcRxWindow (u1_t secs, dr_t dr) { 00412 //debug_str("calcRxWindow\r\n"); 00413 ostime_t rxoff, err; 00414 if( secs==0 ) { 00415 // aka 128 secs (next becaon) 00416 rxoff = LMIC.drift; 00417 err = LMIC.lastDriftDiff; 00418 } else { 00419 // scheduled RX window within secs into current beacon period 00420 rxoff = (LMIC.drift * (ostime_t)secs) >> BCN_INTV_exp; 00421 err = (LMIC.lastDriftDiff * (ostime_t)secs) >> BCN_INTV_exp; 00422 } 00423 u1_t rxsyms = MINRX_SYMS; 00424 err += (ostime_t)LMIC.maxDriftDiff * LMIC.missedBcns; 00425 LMIC.rxsyms = MINRX_SYMS + (err / dr2hsym(dr)); 00426 00427 return (rxsyms-PAMBL_SYMS) * dr2hsym(dr) + rxoff; 00428 } 00429 00430 00431 // Setup beacon RX parameters assuming we have an error of ms (aka +/-(ms/2)) 00432 static void calcBcnRxWindowFromMillis (u1_t ms, bit_t ini) { 00433 //debug_str("calcBcnRxWindowFromMillis\r\n"); 00434 if( ini ) { 00435 LMIC.drift = 0; 00436 LMIC.maxDriftDiff = 0; 00437 LMIC.missedBcns = 0; 00438 LMIC.bcninfo.flags |= BCN_NODRIFT|BCN_NODDIFF; 00439 } 00440 ostime_t hsym = dr2hsym(DR_BCN); 00441 LMIC.bcnRxsyms = MINRX_SYMS + ms2osticksCeil(ms) / hsym; 00442 LMIC.bcnRxtime = LMIC.bcninfo.txtime + BCN_INTV_osticks - (LMIC.bcnRxsyms-PAMBL_SYMS) * hsym; 00443 } 00444 00445 00446 // Setup scheduled RX window (ping/multicast slot) 00447 static void rxschedInit (xref2rxsched_t rxsched) { 00448 //debug_str("rxschedInit\r\n"); 00449 os_clearMem(AESkey,16); 00450 os_clearMem(LMIC.frame+8,8); 00451 os_wlsbf4(LMIC.frame, LMIC.bcninfo.time); 00452 os_wlsbf4(LMIC.frame+4, LMIC.devaddr); 00453 os_aes(AES_ENC,LMIC.frame,16); 00454 u1_t intvExp = rxsched->intvExp; 00455 ostime_t off = os_rlsbf2(LMIC.frame) & (0x0FFF >> (7 - intvExp)); // random offset (slot units) 00456 rxsched->rxbase = (LMIC.bcninfo.txtime + 00457 BCN_RESERVE_osticks + 00458 ms2osticks(BCN_SLOT_SPAN_ms * off)); // random offset osticks 00459 rxsched->slot = 0; 00460 rxsched->rxtime = rxsched->rxbase - calcRxWindow(/*secs BCN_RESERVE*/2+(1<<intvExp),rxsched->dr); 00461 rxsched->rxsyms = LMIC.rxsyms; 00462 } 00463 00464 00465 static bit_t rxschedNext (xref2rxsched_t rxsched, ostime_t cando) { 00466 //debug_str("rxschedNext\r\n"); 00467 again: 00468 if( rxsched->rxtime - cando >= 0 ) 00469 return 1; 00470 u1_t slot; 00471 if( (slot=rxsched->slot) >= 128 ) 00472 return 0; 00473 u1_t intv = 1<<rxsched->intvExp; 00474 if( (rxsched->slot = (slot += (intv))) >= 128 ) 00475 return 0; 00476 rxsched->rxtime = rxsched->rxbase 00477 + ((BCN_WINDOW_osticks * (ostime_t)slot) >> BCN_INTV_exp) 00478 - calcRxWindow(/*secs BCN_RESERVE*/2+slot+intv,rxsched->dr); 00479 rxsched->rxsyms = LMIC.rxsyms; 00480 goto again; 00481 } 00482 00483 00484 static ostime_t rndDelay (u1_t secSpan) { 00485 //debug_str("rndDelay\r\n"); 00486 u2_t r = os_getRndU2(); 00487 ostime_t delay = r; 00488 if( delay > OSTICKS_PER_SEC ) 00489 delay = r % (u2_t)OSTICKS_PER_SEC; 00490 if( secSpan > 0 ) 00491 delay += ((u1_t)r % secSpan) * OSTICKS_PER_SEC; 00492 return delay; 00493 } 00494 00495 00496 static void txDelay (ostime_t reftime, u1_t secSpan) { 00497 //debug_str("txDelay\r\n"); 00498 reftime += rndDelay(secSpan); 00499 if( LMIC.globalDutyRate == 0 || (reftime - LMIC.globalDutyAvail) > 0 ) { 00500 LMIC.globalDutyAvail = reftime; 00501 LMIC.opmode |= OP_RNDTX; 00502 } 00503 } 00504 00505 00506 static void setDrJoin (u1_t reason, u1_t dr) { 00507 //debug_str("setDrJoin\r\n"); 00508 EV(drChange, INFO, (e_.reason = reason, 00509 e_.deveui = MAIN::CDEV->getEui(), 00510 e_.dr = dr|DR_PAGE, 00511 e_.txpow = LMIC.adrTxPow, 00512 e_.prevdr = LMIC.datarate|DR_PAGE, 00513 e_.prevtxpow = LMIC.adrTxPow)); 00514 LMIC.datarate = dr; 00515 DO_DEVDB(LMIC.datarate,datarate); 00516 } 00517 00518 00519 static void setDrTxpow (u1_t reason, u1_t dr, s1_t pow) { 00520 //debug_str("setDrTxpow\r\n"); 00521 EV(drChange, INFO, (e_.reason = reason, 00522 e_.deveui = MAIN::CDEV->getEui(), 00523 e_.dr = dr|DR_PAGE, 00524 e_.txpow = pow, 00525 e_.prevdr = LMIC.datarate|DR_PAGE, 00526 e_.prevtxpow = LMIC.adrTxPow)); 00527 00528 if( pow != KEEP_TXPOW ) 00529 LMIC.adrTxPow = pow; 00530 if( LMIC.datarate != dr ) { 00531 LMIC.datarate = dr; 00532 DO_DEVDB(LMIC.datarate,datarate); 00533 LMIC.opmode |= OP_NEXTCHNL; 00534 } 00535 } 00536 00537 00538 void LMIC_stopPingable (void) { 00539 //debug_str("LMIC_stopPingable\r\n"); 00540 LMIC.opmode &= ~(OP_PINGABLE|OP_PINGINI); 00541 } 00542 00543 00544 void LMIC_setPingable (u1_t intvExp) { 00545 //debug_str("LMIC_setPingable\r\n"); 00546 // Change setting 00547 LMIC.ping.intvExp = (intvExp & 0x7); 00548 LMIC.opmode |= OP_PINGABLE; 00549 // App may call LMIC_enableTracking() explicitely before 00550 // Otherwise tracking is implicitly enabled here 00551 if( (LMIC.opmode & (OP_TRACK|OP_SCAN)) == 0 && LMIC.bcninfoTries == 0 ) 00552 LMIC_enableTracking(0); 00553 } 00554 00555 00556 #if defined(CFG_eu868) 00557 // ================================================================================ 00558 // 00559 // BEG: EU868 related stuff 00560 // 00561 enum { NUM_DEFAULT_CHANNELS=6 }; 00562 static const u4_t iniChannelFreq[12] = { 00563 // Join frequencies and duty cycle limit (0.1%) 00564 EU868_F1|BAND_MILLI, EU868_J4|BAND_MILLI, 00565 EU868_F2|BAND_MILLI, EU868_J5|BAND_MILLI, 00566 EU868_F3|BAND_MILLI, EU868_J6|BAND_MILLI, 00567 // Default operational frequencies 00568 EU868_F1|BAND_CENTI, EU868_F2|BAND_CENTI, EU868_F3|BAND_CENTI, 00569 EU868_F4|BAND_MILLI, EU868_F5|BAND_MILLI, EU868_F6|BAND_DECI 00570 }; 00571 00572 static void initDefaultChannels (bit_t join) { 00573 //debug_str("initDefaultChannels\r\n"); 00574 os_clearMem(&LMIC.channelFreq, sizeof(LMIC.channelFreq)); 00575 os_clearMem(&LMIC.channelDrMap, sizeof(LMIC.channelDrMap)); 00576 os_clearMem(&LMIC.bands, sizeof(LMIC.bands)); 00577 00578 LMIC.channelMap = 0x1F; 00579 u1_t su = join ? 0 : 6; 00580 for( u1_t fu=0; fu<6; fu++,su++ ) { 00581 LMIC.channelFreq[fu] = iniChannelFreq[su]; 00582 LMIC.channelDrMap[fu] = DR_RANGE_MAP(DR_SF12,DR_SF7); 00583 } 00584 if( !join ) { 00585 LMIC.channelDrMap[5] = DR_RANGE_MAP(DR_SF12,DR_SF7); 00586 LMIC.channelDrMap[1] = DR_RANGE_MAP(DR_SF12,DR_FSK); 00587 } 00588 00589 LMIC.bands[BAND_MILLI].txcap = 1000; // 0.1% 00590 LMIC.bands[BAND_MILLI].txpow = 14; 00591 LMIC.bands[BAND_MILLI].lastchnl = os_getRndU1() % MAX_CHANNELS; 00592 LMIC.bands[BAND_CENTI].txcap = 100; // 1% 00593 LMIC.bands[BAND_CENTI].txpow = 14; 00594 LMIC.bands[BAND_CENTI].lastchnl = os_getRndU1() % MAX_CHANNELS; 00595 LMIC.bands[BAND_DECI ].txcap = 10; // 10% 00596 LMIC.bands[BAND_DECI ].txpow = 27; 00597 LMIC.bands[BAND_CENTI].lastchnl = os_getRndU1() % MAX_CHANNELS; 00598 LMIC.bands[BAND_MILLI].avail = 00599 LMIC.bands[BAND_CENTI].avail = 00600 LMIC.bands[BAND_DECI ].avail = os_getTime(); 00601 } 00602 00603 bit_t LMIC_setupBand (u1_t bandidx, s1_t txpow, u2_t txcap) { 00604 //debug_str("LMIC_setupBand\r\n"); 00605 if( bandidx > BAND_AUX ) return 0; 00606 band_t* b = &LMIC.bands[bandidx]; 00607 b->txpow = txpow; 00608 b->txcap = txcap; 00609 b->avail = os_getTime(); 00610 b->lastchnl = os_getRndU1() % MAX_CHANNELS; 00611 return 1; 00612 } 00613 00614 bit_t LMIC_setupChannel (u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { 00615 //debug_str("LMIC_setupChannel\r\n"); 00616 if( chidx >= MAX_CHANNELS ) 00617 return 0; 00618 if( band == -1 ) { 00619 if( freq >= 869400000 && freq <= 869650000 ) 00620 freq |= BAND_DECI; // 10% 27dBm 00621 else if( (freq >= 868000000 && freq <= 868600000) || 00622 (freq >= 869700000 && freq <= 870000000) ) 00623 freq |= BAND_CENTI; // 1% 14dBm 00624 else 00625 freq |= BAND_MILLI; // 0.1% 14dBm 00626 } else { 00627 if( band > BAND_AUX ) return 0; 00628 freq = (freq&~3) | band; 00629 } 00630 LMIC.channelFreq [chidx] = freq; 00631 LMIC.channelDrMap[chidx] = drmap==0 ? DR_RANGE_MAP(DR_SF12,DR_SF7) : drmap; 00632 LMIC.channelMap |= 1<<chidx; // enabled right away 00633 return 1; 00634 } 00635 00636 void LMIC_disableChannel (u1_t channel) { 00637 //debug_str("LMIC_disableChannel\r\n"); 00638 LMIC.channelFreq[channel] = 0; 00639 LMIC.channelDrMap[channel] = 0; 00640 LMIC.channelMap &= ~(1<<channel); 00641 } 00642 00643 static u4_t convFreq (xref2u1_t ptr) { 00644 //debug_str("convFreq\r\n"); 00645 u4_t freq = (os_rlsbf4(ptr-1) >> 8) * 100; 00646 if( freq < EU868_FREQ_MIN || freq > EU868_FREQ_MAX ) 00647 freq = 0; 00648 return freq; 00649 } 00650 00651 static u1_t mapChannels (u1_t chpage, u2_t chmap) { 00652 //debug_str("mapChannels\r\n"); 00653 // Bad page, disable all channel, enable non-existent 00654 if( chpage != 0 || chmap==0 || (chmap & ~LMIC.channelMap) != 0 ) 00655 return 0; // illegal input 00656 for( u1_t chnl=0; chnl<MAX_CHANNELS; chnl++ ) { 00657 if( (chmap & (1<<chnl)) != 0 && LMIC.channelFreq[chnl] == 0 ) 00658 chmap &= ~(1<<chnl); // ignore - channel is not defined 00659 } 00660 LMIC.channelMap = chmap; 00661 return 1; 00662 } 00663 00664 00665 static void updateTx (ostime_t txbeg) { 00666 //debug_str("updateTx\r\n"); 00667 u4_t freq = LMIC.channelFreq[LMIC.txChnl]; 00668 // Update global/band specific duty cycle stats 00669 ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); 00670 // Update channel/global duty cycle stats 00671 xref2band_t band = &LMIC.bands[freq & 0x3]; 00672 LMIC.freq = freq & ~(u4_t)3; 00673 LMIC.txpow = band->txpow; 00674 band->avail = txbeg + airtime * band->txcap; 00675 if( LMIC.globalDutyRate != 0 ) 00676 LMIC.globalDutyAvail = txbeg + (airtime<<LMIC.globalDutyRate); 00677 } 00678 00679 static ostime_t nextTx (ostime_t now) { 00680 //debug_str("nextTx\r\n"); 00681 u1_t bmap=0xF; 00682 do { 00683 ostime_t mintime = now + /*10h*/36000*OSTICKS_PER_SEC; 00684 u1_t band=0; 00685 for( u1_t bi=0; bi<4; bi++ ) { 00686 if( (bmap & (1<<bi)) && mintime - LMIC.bands[bi].avail > 0 ) 00687 mintime = LMIC.bands[band = bi].avail; 00688 } 00689 // Find next channel in given band 00690 u1_t chnl = LMIC.bands[band].lastchnl; 00691 for( u1_t ci=0; ci<MAX_CHANNELS; ci++ ) { 00692 if( (chnl = (chnl+1)) >= MAX_CHANNELS ) 00693 chnl -= MAX_CHANNELS; 00694 if( (LMIC.channelMap & (1<<chnl)) != 0 && // channel enabled 00695 (LMIC.channelDrMap[chnl] & (1<<(LMIC.datarate&0xF))) != 0 && 00696 band == (LMIC.channelFreq[chnl] & 0x3) ) { // in selected band 00697 //debug_str("channel enabled in selected band\r\n"); 00698 LMIC.txChnl = LMIC.bands[band].lastchnl = chnl; 00699 return mintime; 00700 } 00701 } 00702 if( (bmap &= ~(1<<band)) == 0 ) { 00703 // No feasible channel found! 00704 //debug_str("No feasible channel found!\r\n"); 00705 return mintime; 00706 } 00707 } while(1); 00708 } 00709 00710 00711 static void setBcnRxParams (void) { 00712 //debug_str("setBcnRxParams\r\n"); 00713 LMIC.dataLen = 0; 00714 LMIC.freq = LMIC.channelFreq[LMIC.bcnChnl] & ~(u4_t)3; 00715 LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN),1),LEN_BCN); 00716 } 00717 00718 #define setRx1Params() /*LMIC.freq/rps remain unchanged*/ 00719 00720 static void initJoinLoop (void) { 00721 //debug_str("initJoinLoop\r\n"); 00722 LMIC.txChnl = os_getRndU1() % 6; 00723 LMIC.adrTxPow = 14; 00724 setDrJoin(DRCHG_SET, DR_SF7); 00725 initDefaultChannels(1); 00726 ASSERT((LMIC.opmode & OP_NEXTCHNL)==0); 00727 LMIC.txend = LMIC.bands[BAND_MILLI].avail + rndDelay(8); 00728 } 00729 00730 00731 static ostime_t nextJoinState (void) { 00732 //debug_str("nextJoinState\r\n"); 00733 u1_t failed = 0; 00734 00735 // Try 869.x and then 864.x with same DR 00736 // If both fail try next lower datarate 00737 if( ++LMIC.txChnl == 6 ) 00738 LMIC.txChnl = 0; 00739 if( (++LMIC.txCnt & 1) == 0 ) { 00740 // Lower DR every 2nd try (having tried 868.x and 864.x with the same DR) 00741 if( LMIC.datarate == DR_SF12 ) 00742 failed = 1; // we have tried all DR - signal EV_JOIN_FAILED 00743 else 00744 setDrJoin(DRCHG_NOJACC, decDR((dr_t)LMIC.datarate)); 00745 } 00746 // Clear NEXTCHNL because join state engine controls channel hopping 00747 LMIC.opmode &= ~OP_NEXTCHNL; 00748 // Move txend to randomize synchronized concurrent joins. 00749 // Duty cycle is based on txend. 00750 ostime_t time = os_getTime(); 00751 if( time - LMIC.bands[BAND_MILLI].avail < 0 ) 00752 time = LMIC.bands[BAND_MILLI].avail; 00753 LMIC.txend = time + 00754 (isTESTMODE() 00755 // Avoid collision with JOIN ACCEPT @ SF12 being sent by GW (but we missed it) 00756 ? DNW2_SAFETY_ZONE 00757 // Otherwise: randomize join (street lamp case): 00758 // SF12:255, SF11:127, .., SF7:8secs 00759 : DNW2_SAFETY_ZONE+rndDelay(255>>LMIC.datarate)); 00760 // 1 - triggers EV_JOIN_FAILED event 00761 return failed; 00762 } 00763 00764 // 00765 // END: EU868 related stuff 00766 // 00767 // ================================================================================ 00768 #elif defined(CFG_us915) 00769 // ================================================================================ 00770 // 00771 // BEG: US915 related stuff 00772 // 00773 00774 00775 static void initDefaultChannels (void) { 00776 //debug_str("initDefaultChannels\r\n"); 00777 for( u1_t i=0; i<4; i++ ) 00778 LMIC.channelMap[i] = 0xFFFF; 00779 LMIC.channelMap[4] = 0x00FF; 00780 } 00781 00782 static u4_t convFreq (xref2u1_t ptr) { 00783 //debug_str("convFreq\r\n"); 00784 u4_t freq = (os_rlsbf4(ptr-1) >> 8) * 100; 00785 if( freq >= US915_FREQ_MIN && freq <= US915_FREQ_MAX ) 00786 freq = 0; 00787 return freq; 00788 } 00789 00790 bit_t LMIC_setupChannel (u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { 00791 //debug_str("LMIC_setupChannel\r\n"); 00792 if( chidx < 72 || chidx >= 72+MAX_XCHANNELS ) 00793 return 0; // channels 0..71 are hardwired 00794 chidx -= 72; 00795 LMIC.xchFreq[chidx] = freq; 00796 LMIC.xchDrMap[chidx] = drmap==0 ? DR_RANGE_MAP(DR_SF10,DR_SF8C) : drmap; 00797 LMIC.channelMap[chidx>>4] |= (1<<(chidx&0xF)); 00798 return 1; 00799 } 00800 00801 void LMIC_disableChannel (u1_t channel) { 00802 //debug_str("LMIC_disableChannel\r\n"); 00803 if( channel < 72+MAX_XCHANNELS ) 00804 LMIC.channelMap[channel/4] &= ~(1<<(channel&0xF)); 00805 } 00806 00807 static u1_t mapChannels (u1_t chpage, u2_t chmap) { 00808 //debug_str("mapChannels\r\n"); 00809 if( chpage == MCMD_LADR_CHP_125ON || chpage == MCMD_LADR_CHP_125OFF ) { 00810 u2_t en125 = chpage == MCMD_LADR_CHP_125ON ? 0xFFFF : 0x0000; 00811 for( u1_t u=0; u<4; u++ ) 00812 LMIC.channelMap[u] = en125; 00813 LMIC.channelMap[64/16] = chmap; 00814 } else { 00815 if( chpage >= (72+MAX_XCHANNELS+15)/16 ) 00816 return 0; 00817 LMIC.channelMap[chpage] = chmap; 00818 } 00819 return 1; 00820 } 00821 00822 static void updateTx (ostime_t txbeg) { 00823 //debug_str("updateTx\r\n"); 00824 u1_t chnl = LMIC.txChnl; 00825 if( chnl < 64 ) { 00826 LMIC.freq = US915_125kHz_UPFBASE + chnl*US915_125kHz_UPFSTEP; 00827 LMIC.txpow = 30; 00828 return; 00829 } 00830 LMIC.txpow = 26; 00831 if( chnl < 64+8 ) { 00832 LMIC.freq = US915_500kHz_UPFBASE + (chnl-64)*US915_500kHz_UPFSTEP; 00833 } else { 00834 ASSERT(chnl < 64+8+MAX_XCHANNELS); 00835 LMIC.freq = LMIC.xchFreq[chnl-72]; 00836 } 00837 00838 // Update global duty cycle stats 00839 if( LMIC.globalDutyRate != 0 ) { 00840 ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); 00841 LMIC.globalDutyAvail = txbeg + (airtime<<LMIC.globalDutyRate); 00842 } 00843 } 00844 00845 // US does not have duty cycling - return now as earliest TX time 00846 #define nextTx(now) (_nextTx(),(now)) 00847 static void _nextTx (void) { 00848 //debug_str("_nextTx\r\n"); 00849 if( LMIC.chRnd==0 ) 00850 LMIC.chRnd = os_getRndU1() & 0x3F; 00851 if( LMIC.datarate >= DR_SF8C ) { // 500kHz 00852 u1_t map = LMIC.channelMap[64/16]&0xFF; 00853 for( u1_t i=0; i<8; i++ ) { 00854 if( (map & (1<<(++LMIC.chRnd & 7))) != 0 ) { 00855 LMIC.txChnl = 64 + (LMIC.chRnd & 7); 00856 return; 00857 } 00858 } 00859 } else { // 125kHz 00860 for( u1_t i=0; i<64; i++ ) { 00861 u1_t chnl = ++LMIC.chRnd & 0x3F; 00862 if( (LMIC.channelMap[(chnl >> 4)] & (1<<(chnl & 0xF))) != 0 ) { 00863 LMIC.txChnl = chnl; 00864 return; 00865 } 00866 } 00867 } 00868 // No feasible channel found! Keep old one. 00869 } 00870 00871 static void setBcnRxParams (void) { 00872 //debug_str("setBcnRxParams\r\n"); 00873 LMIC.dataLen = 0; 00874 LMIC.freq = US915_500kHz_DNFBASE + LMIC.bcnChnl * US915_500kHz_DNFSTEP; 00875 LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN),1),LEN_BCN); 00876 } 00877 00878 #define setRx1Params() { \ 00879 //debug_str("setRx1Params\r\n"); \ 00880 LMIC.freq = US915_500kHz_DNFBASE + (LMIC.txChnl & 0x7) * US915_500kHz_DNFSTEP; \ 00881 if( /* TX datarate */LMIC.dndr < DR_SF8C ) \ 00882 LMIC.dndr += DR_SF10CR - DR_SF10; \ 00883 else if( LMIC.dndr == DR_SF8C ) \ 00884 LMIC.dndr = DR_SF7CR; \ 00885 LMIC.rps = dndr2rps(LMIC.dndr); \ 00886 } 00887 00888 static void initJoinLoop (void) { 00889 //debug_str("initJoinLoop\r\n"); 00890 LMIC.chRnd = 0; 00891 LMIC.txChnl = 0; 00892 LMIC.adrTxPow = 20; 00893 ASSERT((LMIC.opmode & OP_NEXTCHNL)==0); 00894 LMIC.txend = os_getTime(); 00895 setDrJoin(DRCHG_SET, DR_SF7); 00896 } 00897 00898 static ostime_t nextJoinState (void) { 00899 //debug_str("nextJoinState\r\n"); 00900 // Try the following: 00901 // SF7/8/9/10 on a random channel 0..63 00902 // SF8C on a random channel 64..71 00903 // 00904 u1_t failed = 0; 00905 if( LMIC.datarate != DR_SF8C ) { 00906 LMIC.txChnl = 64+(LMIC.txChnl&7); 00907 setDrJoin(DRCHG_SET, DR_SF8C); 00908 } else { 00909 LMIC.txChnl = os_getRndU1() & 0x3F; 00910 s1_t dr = DR_SF7 - ++LMIC.txCnt; 00911 if( dr < DR_SF10 ) { 00912 dr = DR_SF10; 00913 failed = 1; // All DR exhausted - signal failed 00914 } 00915 setDrJoin(DRCHG_SET, dr); 00916 } 00917 LMIC.opmode &= ~OP_NEXTCHNL; 00918 LMIC.txend = os_getTime() + 00919 (isTESTMODE() 00920 // Avoid collision with JOIN ACCEPT being sent by GW (but we missed it - GW is still busy) 00921 ? DNW2_SAFETY_ZONE 00922 // Otherwise: randomize join (street lamp case): 00923 // SF10:16, SF9=8,..SF8C:1secs 00924 : rndDelay(16>>LMIC.datarate)); 00925 // 1 - triggers EV_JOIN_FAILED event 00926 return failed; 00927 } 00928 00929 // 00930 // END: US915 related stuff 00931 // 00932 // ================================================================================ 00933 #else 00934 #error Unsupported frequency band! 00935 #endif 00936 00937 00938 static void runEngineUpdate (xref2osjob_t osjob) { 00939 //debug_str("runEngineUpdate\r\n"); 00940 engineUpdate(); 00941 } 00942 00943 00944 static void reportEvent (ev_t ev) { 00945 //debug_str("reportEvent\r\n"); 00946 EV(devCond, INFO, (e_.reason = EV::devCond_t::LMIC_EV, 00947 e_.eui = MAIN::CDEV->getEui(), 00948 e_.info = ev)); 00949 ON_LMIC_EVENT(ev); 00950 engineUpdate(); 00951 } 00952 00953 00954 static void runReset (xref2osjob_t osjob) { 00955 //debug_str("runReset\r\n"); 00956 // Disable session 00957 LMIC_reset(); 00958 LMIC_startJoining(); 00959 reportEvent(EV_RESET); 00960 } 00961 00962 static void stateJustJoined (void) { 00963 //debug_str("stateJustJoined\r\n"); 00964 LMIC.seqnoDn = LMIC.seqnoUp = 0; 00965 LMIC.rejoinCnt = 0; 00966 LMIC.dnConf = LMIC.adrChanged = LMIC.ladrAns = LMIC.devsAns = 0; 00967 LMIC.moreData = LMIC.dn2Ans = LMIC.snchAns = LMIC.dutyCapAns = 0; 00968 LMIC.pingSetAns = 0; 00969 LMIC.upRepeat = 0; 00970 LMIC.adrAckReq = LINK_CHECK_INIT; 00971 LMIC.dn2Dr = DR_DNW2; 00972 LMIC.dn2Freq = FREQ_DNW2; 00973 LMIC.bcnChnl = CHNL_BCN; 00974 LMIC.ping.freq = FREQ_PING; 00975 LMIC.ping.dr = DR_PING; 00976 } 00977 00978 00979 // ================================================================================ 00980 // Decoding frames 00981 00982 00983 // Decode beacon - do not overwrite bcninfo unless we have a match! 00984 static int decodeBeacon (void) { 00985 //debug_str("decodeBeacon\r\n"); 00986 ASSERT(LMIC.dataLen == LEN_BCN); // implicit header RX guarantees this 00987 xref2u1_t d = LMIC.frame; 00988 if( 00989 #if CFG_eu868 00990 d[OFF_BCN_CRC1] != (u1_t)os_crc16(d,OFF_BCN_CRC1) 00991 #elif CFG_us915 00992 os_rlsbf2(&d[OFF_BCN_CRC1]) != os_crc16(d,OFF_BCN_CRC1) 00993 #endif 00994 ) 00995 return 0; // first (common) part fails CRC check 00996 // First set of fields is ok 00997 u4_t bcnnetid = os_rlsbf4(&d[OFF_BCN_NETID]) & 0xFFFFFF; 00998 if( bcnnetid != LMIC.netid ) 00999 return -1; // not the beacon we're looking for 01000 01001 LMIC.bcninfo.flags &= ~(BCN_PARTIAL|BCN_FULL); 01002 // Match - update bcninfo structure 01003 LMIC.bcninfo.snr = LMIC.snr; 01004 LMIC.bcninfo.rssi = LMIC.rssi; 01005 LMIC.bcninfo.txtime = LMIC.rxtime - AIRTIME_BCN_osticks; 01006 LMIC.bcninfo.time = os_rlsbf4(&d[OFF_BCN_TIME]); 01007 LMIC.bcninfo.flags |= BCN_PARTIAL; 01008 01009 // Check 2nd set 01010 if( os_rlsbf2(&d[OFF_BCN_CRC2]) != os_crc16(d,OFF_BCN_CRC2) ) 01011 return 1; 01012 // Second set of fields is ok 01013 LMIC.bcninfo.lat = (s4_t)os_rlsbf4(&d[OFF_BCN_LAT-1]) >> 8; // read as signed 24-bit 01014 LMIC.bcninfo.lon = (s4_t)os_rlsbf4(&d[OFF_BCN_LON-1]) >> 8; // ditto 01015 LMIC.bcninfo.info = d[OFF_BCN_INFO]; 01016 LMIC.bcninfo.flags |= BCN_FULL; 01017 return 2; 01018 } 01019 01020 01021 static bit_t decodeFrame (void) { 01022 //debug_str("decodeFrame\r\n"); 01023 //debug_str("decodeFrame: "); 01024 //debug_buf(LMIC.frame, LMIC.dataLen); 01025 xref2u1_t d = LMIC.frame; 01026 u1_t hdr = d[0]; 01027 u1_t ftype = hdr & HDR_FTYPE; 01028 int dlen = LMIC.dataLen; 01029 if( dlen < OFF_DAT_OPTS+4 || 01030 (hdr & HDR_MAJOR) != HDR_MAJOR_V1 || 01031 (ftype != HDR_FTYPE_DADN && ftype != HDR_FTYPE_DCDN) ) { 01032 // Basic sanity checks failed 01033 EV(specCond, WARN, (e_.reason = EV::specCond_t::UNEXPECTED_FRAME, 01034 e_.eui = MAIN::CDEV->getEui(), 01035 e_.info = dlen < 4 ? 0 : os_rlsbf4(&d[dlen-4]), 01036 e_.info2 = hdr + (dlen<<8))); 01037 norx: 01038 LMIC.dataLen = 0; 01039 return 0; 01040 } 01041 // Validate exact frame length 01042 // Note: device address was already read+evaluated in order to arrive here. 01043 int fct = d[OFF_DAT_FCT]; 01044 u4_t addr = os_rlsbf4(&d[OFF_DAT_ADDR]); 01045 u4_t seqno = os_rlsbf2(&d[OFF_DAT_SEQNO]); 01046 int olen = fct & FCT_OPTLEN; 01047 int ackup = (fct & FCT_ACK) != 0 ? 1 : 0; // ACK last up frame 01048 int poff = OFF_DAT_OPTS+olen; 01049 int pend = dlen-4; // MIC 01050 01051 //debug_val("fct: ", fct); 01052 //debug_val("olen: ", olen); 01053 01054 if( addr != LMIC.devaddr ) { 01055 EV(specCond, WARN, (e_.reason = EV::specCond_t::ALIEN_ADDRESS, 01056 e_.eui = MAIN::CDEV->getEui(), 01057 e_.info = addr, 01058 e_.info2 = LMIC.devaddr)); 01059 goto norx; 01060 } 01061 if( poff > pend ) { 01062 EV(specCond, ERR, (e_.reason = EV::specCond_t::CORRUPTED_FRAME, 01063 e_.eui = MAIN::CDEV->getEui(), 01064 e_.info = 0x1000000 + (poff-pend) + (fct<<8) + (dlen<<16))); 01065 goto norx; 01066 } 01067 01068 int port = -1; 01069 int replayConf = 0; 01070 01071 if( pend > poff ) 01072 port = d[poff++]; 01073 seqno = LMIC.seqnoDn + (u2_t)(seqno - LMIC.seqnoDn); 01074 01075 if( !aes_verifyMic(LMIC.nwkKey, LMIC.devaddr, seqno, /*dn*/1, d, pend) ) { 01076 EV(spe3Cond, ERR, (e_.reason = EV::spe3Cond_t::CORRUPTED_MIC, 01077 e_.eui1 = MAIN::CDEV->getEui(), 01078 e_.info1 = Base::lsbf4(&d[pend]), 01079 e_.info2 = seqno, 01080 e_.info3 = LMIC.devaddr)); 01081 goto norx; 01082 } 01083 if( seqno < LMIC.seqnoDn ) { 01084 if( (s4_t)seqno > (s4_t)LMIC.seqnoDn ) { 01085 EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_ROLL_OVER, 01086 e_.eui = MAIN::CDEV->getEui(), 01087 e_.info = LMIC.seqnoDn, 01088 e_.info2 = seqno)); 01089 goto norx; 01090 } 01091 if( seqno != LMIC.seqnoDn-1 || !LMIC.dnConf || ftype != HDR_FTYPE_DCDN ) { 01092 EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_OBSOLETE, 01093 e_.eui = MAIN::CDEV->getEui(), 01094 e_.info = LMIC.seqnoDn, 01095 e_.info2 = seqno)); 01096 goto norx; 01097 } 01098 // Replay of previous sequence number allowed only if 01099 // previous frame and repeated both requested confirmation 01100 debug_str("Replay Conf\n\r"); 01101 replayConf = 1; 01102 } 01103 else { 01104 if( seqno > LMIC.seqnoDn ) { 01105 EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_SKIP, 01106 e_.eui = MAIN::CDEV->getEui(), 01107 e_.info = LMIC.seqnoDn, 01108 e_.info2 = seqno)); 01109 } 01110 LMIC.seqnoDn = seqno+1; // next number to be expected 01111 DO_DEVDB(LMIC.seqnoDn,seqnoDn); 01112 // DN frame requested confirmation - provide ACK once with next UP frame 01113 01114 // PANY if port is 3 no ack 01115 01116 if (port != 3) LMIC.dnConf = (ftype == HDR_FTYPE_DCDN ? FCT_ACK : 0); 01117 else LMIC.dnConf = 0; 01118 01119 // if (LMIC.dnConf != 0) debug_str("ACK IS ON!!\r\n"); 01120 } 01121 01122 if( LMIC.dnConf || (fct & FCT_MORE) ) 01123 LMIC.opmode |= OP_POLL; 01124 01125 // We heard from network 01126 LMIC.adrChanged = LMIC.rejoinCnt = 0; 01127 if( LMIC.adrAckReq != LINK_CHECK_OFF ) 01128 LMIC.adrAckReq = LINK_CHECK_INIT; 01129 01130 // Process OPTS 01131 int m = LMIC.rssi - RSSI_OFF - getSensitivity(LMIC.rps); 01132 LMIC.margin = m < 0 ? 0 : m > 254 ? 254 : m; 01133 01134 xref2u1_t opts = &d[OFF_DAT_OPTS]; 01135 int oidx = 0; 01136 //debug_val("Port: ", port); 01137 while( oidx < olen ) { 01138 // debug_str("Port: "); 01139 //debug_str("Process OPTS..."); 01140 //debug_hex(opts[oidx]); 01141 //debug_str("\r\n"); 01142 switch( opts[oidx] ) { 01143 case MCMD_LCHK_ANS: { 01144 debug_str("MCMD_LCHK_ANS\r\n"); 01145 //int gwmargin = opts[oidx+1]; 01146 //int ngws = opts[oidx+2]; 01147 oidx += 3; 01148 continue; 01149 } 01150 case MCMD_LADR_REQ: { 01151 debug_str("MCMD_LADR_REQ\r\n"); 01152 u1_t p1 = opts[oidx+1]; // txpow + DR 01153 u2_t chmap = os_rlsbf2(&opts[oidx+2]);// list of enabled channels 01154 u1_t chpage = opts[oidx+4] & MCMD_LADR_CHPAGE_MASK; // channel page 01155 u1_t uprpt = opts[oidx+4] & MCMD_LADR_REPEAT_MASK; // up repeat count 01156 oidx += 5; 01157 01158 LMIC.ladrAns = 0x80 | // Include an answer into next frame up 01159 MCMD_LADR_ANS_POWACK | MCMD_LADR_ANS_CHACK | MCMD_LADR_ANS_DRACK; 01160 if( !mapChannels(chpage, chmap) ) 01161 LMIC.ladrAns &= ~MCMD_LADR_ANS_CHACK; 01162 dr_t dr = (dr_t)(p1>>MCMD_LADR_DR_SHIFT); 01163 if( !validDR(dr) ) { 01164 LMIC.ladrAns &= ~MCMD_LADR_ANS_DRACK; 01165 EV(specCond, ERR, (e_.reason = EV::specCond_t::BAD_MAC_CMD, 01166 e_.eui = MAIN::CDEV->getEui(), 01167 e_.info = Base::lsbf4(&d[pend]), 01168 e_.info2 = Base::msbf4(&opts[oidx-4]))); 01169 } 01170 if( (LMIC.ladrAns & 0x7F) == (MCMD_LADR_ANS_POWACK | MCMD_LADR_ANS_CHACK | MCMD_LADR_ANS_DRACK) ) { 01171 // Nothing went wrong - use settings 01172 LMIC.upRepeat = uprpt; 01173 setDrTxpow(DRCHG_NWKCMD, dr, pow2dBm(p1)); 01174 } 01175 LMIC.adrChanged = 1; // Trigger an ACK to NWK 01176 01177 //debug_str("decodeFrame: "); 01178 //debug_buf(LMIC.frame, LMIC.dataLen); 01179 01180 continue; 01181 } 01182 case MCMD_DEVS_REQ: { 01183 debug_str("DEVS_REQ\r\n"); 01184 LMIC.devsAns = 1; 01185 oidx += 1; 01186 continue; 01187 } 01188 case MCMD_DN2P_SET: { 01189 debug_str("MCMD_DN2P_SET\r\n"); 01190 dr_t dr = (dr_t)(opts[oidx+1] & 0x0F); 01191 u4_t freq = convFreq(&opts[oidx+2]); 01192 oidx += 5; 01193 LMIC.dn2Ans = 0x80; // answer pending 01194 if( validDR(dr) ) 01195 LMIC.dn2Ans |= MCMD_DN2P_ANS_DRACK; 01196 if( freq != 0 ) 01197 LMIC.dn2Ans |= MCMD_DN2P_ANS_CHACK; 01198 if( LMIC.dn2Ans == (0x80|MCMD_DN2P_ANS_DRACK|MCMD_DN2P_ANS_CHACK) ) { 01199 LMIC.dn2Dr = dr; 01200 LMIC.dn2Freq = freq; 01201 DO_DEVDB(LMIC.dn2Dr,dn2Dr); 01202 DO_DEVDB(LMIC.dn2Freq,dn2Freq); 01203 } 01204 continue; 01205 } 01206 case MCMD_DCAP_REQ: { 01207 debug_str("MCMD_DCAP_REQ\r\n"); 01208 u1_t cap = opts[oidx+1]; 01209 oidx += 2; 01210 // A value cap=0xFF means device is OFF unless enabled again manually. 01211 if( cap==0xFF ) 01212 LMIC.opmode |= OP_SHUTDOWN; // stop any sending 01213 LMIC.globalDutyRate = cap & 0xF; 01214 LMIC.globalDutyAvail = os_getTime(); 01215 DO_DEVDB(cap,dutyCap); 01216 LMIC.dutyCapAns = 1; 01217 continue; 01218 } 01219 case MCMD_SNCH_REQ: { 01220 debug_str("MCMD_SNCH_REQ\r\n"); 01221 u1_t chidx = opts[oidx+1]; // channel 01222 u4_t freq = convFreq(&opts[oidx+2]); // freq 01223 u1_t drs = opts[oidx+5]; // datarate span 01224 LMIC.snchAns = 0x80; 01225 if( freq != 0 && LMIC_setupChannel(chidx, freq, DR_RANGE_MAP(drs&0xF,drs>>4), -1) ) 01226 LMIC.snchAns |= MCMD_SNCH_ANS_DRACK|MCMD_SNCH_ANS_FQACK; 01227 oidx += 6; 01228 continue; 01229 } 01230 case MCMD_PING_SET: { 01231 debug_str("MCMD_PING_SET\r\n"); 01232 u4_t freq = convFreq(&opts[oidx+1]); 01233 oidx += 4; 01234 u1_t flags = 0x80; 01235 if( freq != 0 ) { 01236 flags |= MCMD_PING_ANS_FQACK; 01237 LMIC.ping.freq = freq; 01238 DO_DEVDB(LMIC.ping.intvExp, pingIntvExp); 01239 DO_DEVDB(LMIC.ping.freq, pingFreq); 01240 DO_DEVDB(LMIC.ping.dr, pingDr); 01241 } 01242 LMIC.pingSetAns = flags; 01243 continue; 01244 } 01245 case MCMD_BCNI_ANS: { 01246 debug_str("MCMD_BCNI_ANS\r\n"); 01247 // Ignore if tracking already enabled 01248 if( (LMIC.opmode & OP_TRACK) == 0 ) { 01249 LMIC.bcnChnl = opts[oidx+3]; 01250 // Enable tracking - bcninfoTries 01251 LMIC.opmode |= OP_TRACK; 01252 // Cleared later in txComplete handling - triggers EV_BEACON_FOUND 01253 ASSERT(LMIC.bcninfoTries!=0); 01254 // Setup RX parameters 01255 LMIC.bcninfo.txtime = (LMIC.rxtime 01256 + ms2osticks(os_rlsbf2(&opts[oidx+1]) * MCMD_BCNI_TUNIT) 01257 + ms2osticksCeil(MCMD_BCNI_TUNIT/2) 01258 - BCN_INTV_osticks); 01259 LMIC.bcninfo.flags = 0; // txtime above cannot be used as reference (BCN_PARTIAL|BCN_FULL cleared) 01260 calcBcnRxWindowFromMillis(MCMD_BCNI_TUNIT,1); // error of +/-N ms 01261 01262 EV(lostFrame, INFO, (e_.reason = EV::lostFrame_t::MCMD_BCNI_ANS, 01263 e_.eui = MAIN::CDEV->getEui(), 01264 e_.lostmic = Base::lsbf4(&d[pend]), 01265 e_.info = (LMIC.missedBcns | 01266 (osticks2us(LMIC.bcninfo.txtime + BCN_INTV_osticks 01267 - LMIC.bcnRxtime) << 8)), 01268 e_.time = MAIN::CDEV->ostime2ustime(LMIC.bcninfo.txtime + BCN_INTV_osticks))); 01269 } 01270 oidx += 4; 01271 continue; 01272 } 01273 } 01274 EV(specCond, ERR, (e_.reason = EV::specCond_t::BAD_MAC_CMD, 01275 e_.eui = MAIN::CDEV->getEui(), 01276 e_.info = Base::lsbf4(&d[pend]), 01277 e_.info2 = Base::msbf4(&opts[oidx]))); 01278 break; 01279 } 01280 01281 if( oidx != olen ) { 01282 EV(specCond, ERR, (e_.reason = EV::specCond_t::CORRUPTED_FRAME, 01283 e_.eui = MAIN::CDEV->getEui(), 01284 e_.info = 0x1000000 + (oidx) + (olen<<8))); 01285 } 01286 01287 if( !replayConf ) { 01288 // Handle payload only if not a replay 01289 // Decrypt payload - if any 01290 01291 //if( port >= 0 && pend-poff > 0 ) 01292 //aes_cipher(port <= 0 ? LMIC.nwkKey : LMIC.artKey, LMIC.devaddr, seqno, /*dn*/1, d+poff, pend-poff); 01293 debug_str("HANDLING PAYLOAD...\r\n"); 01294 if( port >= 0 && port != 1 && pend-poff > 0 ) 01295 { 01296 debug_str("Payload decrypting...\r\n"); 01297 aes_cipher(port <= 0 ? LMIC.nwkKey : LMIC.artKey, LMIC.devaddr, seqno, /*dn*/1, d+poff, pend-poff); 01298 } 01299 01300 EV(dfinfo, DEBUG, (e_.deveui = MAIN::CDEV->getEui(), 01301 e_.devaddr = LMIC.devaddr, 01302 e_.seqno = seqno, 01303 e_.flags = (port < 0 ? EV::dfinfo_t::NOPORT : 0) | EV::dfinfo_t::DN, 01304 e_.mic = Base::lsbf4(&d[pend]), 01305 e_.hdr = d[LORA::OFF_DAT_HDR], 01306 e_.fct = d[LORA::OFF_DAT_FCT], 01307 e_.port = port, 01308 e_.plen = dlen, 01309 e_.opts.length = olen, 01310 memcpy(&e_.opts[0], opts, olen))); 01311 } else { 01312 EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_REPLAY, 01313 e_.eui = MAIN::CDEV->getEui(), 01314 e_.info = Base::lsbf4(&d[pend]), 01315 e_.info2 = seqno)); 01316 } 01317 01318 if( // NWK acks but we don't have a frame pending 01319 (ackup && LMIC.txCnt == 0) || 01320 // We sent up confirmed and we got a response in DNW1/DNW2 01321 // BUT it did not carry an ACK - this should never happen 01322 // Do not resend and assume frame was not ACKed. 01323 (!ackup && LMIC.txCnt != 0) ) { 01324 EV(specCond, ERR, (e_.reason = EV::specCond_t::SPURIOUS_ACK, 01325 e_.eui = MAIN::CDEV->getEui(), 01326 e_.info = seqno, 01327 e_.info2 = ackup)); 01328 } 01329 01330 if( LMIC.txCnt != 0 ) // we requested an ACK 01331 LMIC.txrxFlags |= ackup ? TXRX_ACK : TXRX_NACK; 01332 01333 if( port < 0 ) { 01334 LMIC.txrxFlags |= TXRX_NOPORT; 01335 LMIC.dataBeg = poff; 01336 LMIC.dataLen = 0; 01337 } else { 01338 LMIC.txrxFlags |= TXRX_PORT; 01339 LMIC.dataBeg = poff; 01340 LMIC.dataLen = pend-poff; 01341 } 01342 //debug_str("decodeFrame End: "); 01343 //debug_buf(LMIC.frame, LMIC.dataLen); 01344 01345 // PANY 01346 if ((port == 0) && (olen == 0)) 01347 { 01348 oidx = 0; 01349 olen = LMIC.dataLen; 01350 //debug_str("Port 0!!!\r\n"); 01351 opts = LMIC.frame + LMIC.dataBeg; 01352 01353 //debug_val("Data Len: ", LMIC.dataLen); 01354 while( oidx < olen ) { 01355 // debug_str("Port: "); 01356 //debug_str("Process OPTS..."); 01357 //debug_hex(opts[oidx]); 01358 //debug_str("\r\n"); 01359 switch( opts[oidx] ) { 01360 case MCMD_LCHK_ANS: { 01361 debug_str("MCMD_LCHK_ANS\r\n"); 01362 //int gwmargin = opts[oidx+1]; 01363 //int ngws = opts[oidx+2]; 01364 oidx += 3; 01365 continue; 01366 } 01367 case MCMD_LADR_REQ: { 01368 debug_str("MCMD_LADR_REQ\r\n"); 01369 u1_t p1 = opts[oidx+1]; // txpow + DR 01370 u2_t chmap = os_rlsbf2(&opts[oidx+2]);// list of enabled channels 01371 u1_t chpage = opts[oidx+4] & MCMD_LADR_CHPAGE_MASK; // channel page 01372 u1_t uprpt = opts[oidx+4] & MCMD_LADR_REPEAT_MASK; // up repeat count 01373 oidx += 5; 01374 01375 LMIC.ladrAns = 0x80 | // Include an answer into next frame up 01376 MCMD_LADR_ANS_POWACK | MCMD_LADR_ANS_CHACK | MCMD_LADR_ANS_DRACK; 01377 if( !mapChannels(chpage, chmap) ) 01378 LMIC.ladrAns &= ~MCMD_LADR_ANS_CHACK; 01379 dr_t dr = (dr_t)(p1>>MCMD_LADR_DR_SHIFT); 01380 if( !validDR(dr) ) { 01381 LMIC.ladrAns &= ~MCMD_LADR_ANS_DRACK; 01382 EV(specCond, ERR, (e_.reason = EV::specCond_t::BAD_MAC_CMD, 01383 e_.eui = MAIN::CDEV->getEui(), 01384 e_.info = Base::lsbf4(&d[pend]), 01385 e_.info2 = Base::msbf4(&opts[oidx-4]))); 01386 } 01387 if( (LMIC.ladrAns & 0x7F) == (MCMD_LADR_ANS_POWACK | MCMD_LADR_ANS_CHACK | MCMD_LADR_ANS_DRACK) ) { 01388 // Nothing went wrong - use settings 01389 LMIC.upRepeat = uprpt; 01390 setDrTxpow(DRCHG_NWKCMD, dr, pow2dBm(p1)); 01391 } 01392 LMIC.adrChanged = 1; // Trigger an ACK to NWK 01393 01394 //debug_str("decodeFrame: "); 01395 //debug_buf(LMIC.frame, LMIC.dataLen); 01396 01397 continue; 01398 } 01399 case MCMD_DEVS_REQ: { 01400 debug_str("DEVS_REQ\r\n"); 01401 LMIC.devsAns = 1; 01402 oidx += 1; 01403 continue; 01404 } 01405 case MCMD_DN2P_SET: { 01406 debug_str("MCMD_DN2P_SET\r\n"); 01407 dr_t dr = (dr_t)(opts[oidx+1] & 0x0F); 01408 u4_t freq = convFreq(&opts[oidx+2]); 01409 oidx += 5; 01410 LMIC.dn2Ans = 0x80; // answer pending 01411 if( validDR(dr) ) 01412 LMIC.dn2Ans |= MCMD_DN2P_ANS_DRACK; 01413 if( freq != 0 ) 01414 LMIC.dn2Ans |= MCMD_DN2P_ANS_CHACK; 01415 if( LMIC.dn2Ans == (0x80|MCMD_DN2P_ANS_DRACK|MCMD_DN2P_ANS_CHACK) ) { 01416 LMIC.dn2Dr = dr; 01417 LMIC.dn2Freq = freq; 01418 DO_DEVDB(LMIC.dn2Dr,dn2Dr); 01419 DO_DEVDB(LMIC.dn2Freq,dn2Freq); 01420 } 01421 continue; 01422 } 01423 case MCMD_DCAP_REQ: { 01424 debug_str("MCMD_DCAP_REQ\r\n"); 01425 u1_t cap = opts[oidx+1]; 01426 oidx += 2; 01427 // A value cap=0xFF means device is OFF unless enabled again manually. 01428 if( cap==0xFF ) 01429 LMIC.opmode |= OP_SHUTDOWN; // stop any sending 01430 LMIC.globalDutyRate = cap & 0xF; 01431 LMIC.globalDutyAvail = os_getTime(); 01432 DO_DEVDB(cap,dutyCap); 01433 LMIC.dutyCapAns = 1; 01434 continue; 01435 } 01436 case MCMD_SNCH_REQ: { 01437 debug_str("MCMD_SNCH_REQ\r\n"); 01438 u1_t chidx = opts[oidx+1]; // channel 01439 u4_t freq = convFreq(&opts[oidx+2]); // freq 01440 u1_t drs = opts[oidx+5]; // datarate span 01441 LMIC.snchAns = 0x80; 01442 if( freq != 0 && LMIC_setupChannel(chidx, freq, DR_RANGE_MAP(drs&0xF,drs>>4), -1) ) 01443 LMIC.snchAns |= MCMD_SNCH_ANS_DRACK|MCMD_SNCH_ANS_FQACK; 01444 oidx += 6; 01445 continue; 01446 } 01447 case MCMD_PING_SET: { 01448 debug_str("MCMD_PING_SET\r\n"); 01449 u4_t freq = convFreq(&opts[oidx+1]); 01450 oidx += 4; 01451 u1_t flags = 0x80; 01452 if( freq != 0 ) { 01453 flags |= MCMD_PING_ANS_FQACK; 01454 LMIC.ping.freq = freq; 01455 DO_DEVDB(LMIC.ping.intvExp, pingIntvExp); 01456 DO_DEVDB(LMIC.ping.freq, pingFreq); 01457 DO_DEVDB(LMIC.ping.dr, pingDr); 01458 } 01459 LMIC.pingSetAns = flags; 01460 continue; 01461 } 01462 case MCMD_BCNI_ANS: { 01463 debug_str("MCMD_BCNI_ANS\r\n"); 01464 // Ignore if tracking already enabled 01465 if( (LMIC.opmode & OP_TRACK) == 0 ) { 01466 LMIC.bcnChnl = opts[oidx+3]; 01467 // Enable tracking - bcninfoTries 01468 LMIC.opmode |= OP_TRACK; 01469 // Cleared later in txComplete handling - triggers EV_BEACON_FOUND 01470 ASSERT(LMIC.bcninfoTries!=0); 01471 // Setup RX parameters 01472 LMIC.bcninfo.txtime = (LMIC.rxtime 01473 + ms2osticks(os_rlsbf2(&opts[oidx+1]) * MCMD_BCNI_TUNIT) 01474 + ms2osticksCeil(MCMD_BCNI_TUNIT/2) 01475 - BCN_INTV_osticks); 01476 LMIC.bcninfo.flags = 0; // txtime above cannot be used as reference (BCN_PARTIAL|BCN_FULL cleared) 01477 calcBcnRxWindowFromMillis(MCMD_BCNI_TUNIT,1); // error of +/-N ms 01478 01479 EV(lostFrame, INFO, (e_.reason = EV::lostFrame_t::MCMD_BCNI_ANS, 01480 e_.eui = MAIN::CDEV->getEui(), 01481 e_.lostmic = Base::lsbf4(&d[pend]), 01482 e_.info = (LMIC.missedBcns | 01483 (osticks2us(LMIC.bcninfo.txtime + BCN_INTV_osticks 01484 - LMIC.bcnRxtime) << 8)), 01485 e_.time = MAIN::CDEV->ostime2ustime(LMIC.bcninfo.txtime + BCN_INTV_osticks))); 01486 } 01487 oidx += 4; 01488 continue; 01489 } 01490 } 01491 EV(specCond, ERR, (e_.reason = EV::specCond_t::BAD_MAC_CMD, 01492 e_.eui = MAIN::CDEV->getEui(), 01493 e_.info = Base::lsbf4(&d[pend]), 01494 e_.info2 = Base::msbf4(&opts[oidx]))); 01495 break; 01496 } 01497 } 01498 // PANY 01499 01500 return 1; 01501 } 01502 01503 01504 // ================================================================================ 01505 // TX/RX transaction support 01506 01507 01508 static void setupRx2 (void) { 01509 //debug_str("setupRx2\r\n"); 01510 LMIC.txrxFlags = TXRX_DNW2; 01511 LMIC.rps = dndr2rps(LMIC.dn2Dr); 01512 LMIC.freq = LMIC.dn2Freq; 01513 LMIC.dataLen = 0; 01514 os_radio(RADIO_RX); 01515 } 01516 01517 01518 static void schedRx2 (ostime_t delay, osjobcb_t func) { 01519 //debug_str("schedRx2\r\n"); 01520 // Add 1.5 symbols we need 5 out of 8. Try to sync 1.5 symbols into the preamble. 01521 LMIC.rxtime = LMIC.txend + delay + (PAMBL_SYMS-MINRX_SYMS)*dr2hsym(LMIC.dn2Dr); 01522 os_setTimedCallback(&LMIC.osjob, LMIC.rxtime - RX_RAMPUP, func); 01523 } 01524 01525 static void setupRx1 (osjobcb_t func) { 01526 //debug_str("setupRx1\r\n"); 01527 LMIC.txrxFlags = TXRX_DNW1; 01528 // Turn LMIC.rps from TX over to RX 01529 LMIC.rps = setNocrc(LMIC.rps,1); 01530 LMIC.dataLen = 0; 01531 LMIC.osjob.func = func; 01532 os_radio(RADIO_RX); 01533 } 01534 01535 01536 // Called by HAL once TX complete and delivers exact end of TX time stamp in LMIC.rxtime 01537 static void txDone (ostime_t delay, osjobcb_t func) { 01538 //debug_str("txDone\r\n"); 01539 if( (LMIC.opmode & (OP_TRACK|OP_PINGABLE|OP_PINGINI)) == (OP_TRACK|OP_PINGABLE) ) { 01540 rxschedInit(&LMIC.ping); // note: reuses LMIC.frame buffer! 01541 LMIC.opmode |= OP_PINGINI; 01542 } 01543 // Change RX frequency / rps (US only) before we increment txChnl 01544 setRx1Params(); 01545 // LMIC.rxsyms carries the TX datarate (can be != LMIC.datarate [confirm retries etc.]) 01546 // Setup receive - LMIC.rxtime is preloaded with 1.5 symbols offset to tune 01547 // into the middle of the 8 symbols preamble. 01548 #if defined(CFG_eu868) 01549 if( /* TX datarate */LMIC.rxsyms == DR_FSK ) { 01550 LMIC.rxtime = LMIC.txend + delay - PRERX_FSK*us2osticksRound(160); 01551 LMIC.rxsyms = RXLEN_FSK; 01552 } 01553 else 01554 #endif 01555 { 01556 LMIC.rxtime = LMIC.txend + delay + (PAMBL_SYMS-MINRX_SYMS)*dr2hsym(LMIC.dndr); 01557 LMIC.rxsyms = MINRX_SYMS; 01558 } 01559 os_setTimedCallback(&LMIC.osjob, LMIC.rxtime - RX_RAMPUP, func); 01560 } 01561 01562 01563 // ======================================== Join frames 01564 01565 01566 static void onJoinFailed (xref2osjob_t osjob) { 01567 //debug_str("onJoinFailed\r\n"); 01568 // Notify app - must call LMIC_reset() to stop joining 01569 // otherwise join procedure continues. 01570 reportEvent(EV_JOIN_FAILED); 01571 } 01572 01573 01574 static bit_t processJoinAccept (void) { 01575 //debug_str("processJoinAccept\r\n"); 01576 ASSERT(LMIC.txrxFlags != TXRX_DNW1 || LMIC.dataLen != 0); 01577 ASSERT((LMIC.opmode & OP_TXRXPEND)!=0); 01578 01579 if( LMIC.dataLen == 0 ) { 01580 nojoinframe: 01581 if( (LMIC.opmode & OP_JOINING) == 0 ) { 01582 ASSERT((LMIC.opmode & OP_REJOIN) != 0); 01583 // REJOIN attempt for roaming 01584 LMIC.opmode &= ~(OP_REJOIN|OP_TXRXPEND); 01585 if( LMIC.rejoinCnt < 10 ) 01586 LMIC.rejoinCnt++; 01587 reportEvent(EV_REJOIN_FAILED); 01588 return 1; 01589 } 01590 LMIC.opmode &= ~OP_TXRXPEND; 01591 ostime_t delay = nextJoinState(); 01592 EV(devCond, DEBUG, (e_.reason = EV::devCond_t::NO_JACC, 01593 e_.eui = MAIN::CDEV->getEui(), 01594 e_.info = LMIC.datarate|DR_PAGE, 01595 e_.info2 = osticks2ms(delay))); 01596 // Build next JOIN REQUEST with next engineUpdate call 01597 // Optionally, report join failed. 01598 // Both after a random/chosen amount of ticks. 01599 os_setTimedCallback(&LMIC.osjob, os_getTime()+delay, 01600 (delay&1) != 0 01601 ? FUNC_ADDR(onJoinFailed) // one JOIN iteration done and failed 01602 : FUNC_ADDR(runEngineUpdate)); // next step to be delayed 01603 return 1; 01604 } 01605 u1_t hdr = LMIC.frame[0]; 01606 u1_t dlen = LMIC.dataLen; 01607 u4_t mic = os_rlsbf4(&LMIC.frame[dlen-4]); // safe before modified by encrypt! 01608 if( (dlen != LEN_JA && dlen != LEN_JAEXT) 01609 || (hdr & (HDR_FTYPE|HDR_MAJOR)) != (HDR_FTYPE_JACC|HDR_MAJOR_V1) ) { 01610 EV(specCond, ERR, (e_.reason = EV::specCond_t::UNEXPECTED_FRAME, 01611 e_.eui = MAIN::CDEV->getEui(), 01612 e_.info = dlen < 4 ? 0 : mic, 01613 e_.info2 = hdr + (dlen<<8))); 01614 badframe: 01615 if( (LMIC.txrxFlags & TXRX_DNW1) != 0 ) 01616 return 0; 01617 goto nojoinframe; 01618 } 01619 aes_encrypt(LMIC.frame+1, dlen-1); 01620 if( !aes_verifyMic0(LMIC.frame, dlen-4) ) { 01621 EV(specCond, ERR, (e_.reason = EV::specCond_t::JOIN_BAD_MIC, 01622 e_.info = mic)); 01623 goto badframe; 01624 } 01625 01626 u4_t addr = os_rlsbf4(LMIC.frame+OFF_JA_DEVADDR); 01627 LMIC.devaddr = addr; 01628 LMIC.netid = os_rlsbf4(&LMIC.frame[OFF_JA_NETID]) & 0xFFFFFF; 01629 01630 #if defined(CFG_eu868) 01631 initDefaultChannels(0); 01632 #endif 01633 if( dlen > LEN_JA ) { 01634 dlen = OFF_CFLIST; 01635 #if defined(CFG_eu868) 01636 u1_t chidx=3; 01637 #elif defined(CFG_us915) 01638 u1_t chidx=72; 01639 #endif 01640 for( ; chidx<8; chidx++, dlen+=3 ) 01641 LMIC_setupChannel(chidx, os_rlsbf4(&LMIC.frame[dlen-1]) >> 8, 0, -1); 01642 } 01643 01644 // already incremented when JOIN REQ got sent off 01645 aes_sessKeys(LMIC.devNonce-1, &LMIC.frame[OFF_JA_ARTNONCE], LMIC.nwkKey, LMIC.artKey); 01646 DO_DEVDB(LMIC.netid, netid); 01647 DO_DEVDB(LMIC.devaddr, devaddr); 01648 DO_DEVDB(LMIC.nwkKey, nwkkey); 01649 DO_DEVDB(LMIC.artKey, artkey); 01650 01651 EV(joininfo, INFO, (e_.arteui = MAIN::CDEV->getArtEui(), 01652 e_.deveui = MAIN::CDEV->getEui(), 01653 e_.devaddr = LMIC.devaddr, 01654 e_.oldaddr = oldaddr, 01655 e_.nonce = LMIC.devNonce-1, 01656 e_.mic = mic, 01657 e_.reason = ((LMIC.opmode & OP_REJOIN) != 0 01658 ? EV::joininfo_t::REJOIN_ACCEPT 01659 : EV::joininfo_t::ACCEPT))); 01660 01661 ASSERT((LMIC.opmode & (OP_JOINING|OP_REJOIN))!=0); 01662 if( (LMIC.opmode & OP_REJOIN) != 0 ) { 01663 // Lower DR every try below current UP DR 01664 LMIC.datarate = lowerDR(LMIC.datarate, LMIC.rejoinCnt); 01665 } 01666 LMIC.opmode &= ~(OP_JOINING|OP_TRACK|OP_REJOIN|OP_TXRXPEND|OP_PINGINI) | OP_NEXTCHNL; 01667 stateJustJoined(); 01668 reportEvent(EV_JOINED); 01669 return 1; 01670 } 01671 01672 01673 static void processRx2Jacc (xref2osjob_t osjob) { 01674 //debug_str("processRx2Jacc\r\n"); 01675 if( LMIC.dataLen == 0 ) 01676 LMIC.txrxFlags = 0; // nothing in 1st/2nd DN slot 01677 processJoinAccept(); 01678 } 01679 01680 01681 static void setupRx2Jacc (xref2osjob_t osjob) { 01682 //debug_str("setupRx2Jacc\r\n"); 01683 LMIC.osjob.func = FUNC_ADDR(processRx2Jacc); 01684 setupRx2(); 01685 } 01686 01687 01688 static void processRx1Jacc (xref2osjob_t osjob) { 01689 //debug_str("processRx1Jacc\r\n"); 01690 if( LMIC.dataLen == 0 || !processJoinAccept() ) 01691 schedRx2(DELAY_JACC2_osticks, FUNC_ADDR(setupRx2Jacc)); 01692 } 01693 01694 01695 static void setupRx1Jacc (xref2osjob_t osjob) { 01696 //debug_str("setupRx1Jacc\r\n"); 01697 setupRx1(FUNC_ADDR(processRx1Jacc)); 01698 } 01699 01700 01701 static void jreqDone (xref2osjob_t osjob) { 01702 //debug_str("jreqDone\r\n"); 01703 txDone(DELAY_JACC1_osticks, FUNC_ADDR(setupRx1Jacc)); 01704 } 01705 01706 // ======================================== Data frames 01707 01708 // Fwd decl. 01709 static bit_t processDnData(void); 01710 01711 static void processRx2DnDataDelay (xref2osjob_t osjob) { 01712 //debug_str("processDnData\r\n"); 01713 processDnData(); 01714 } 01715 01716 static void processRx2DnData (xref2osjob_t osjob) { 01717 //debug_str("processRx2DnData\r\n"); 01718 if( LMIC.dataLen == 0 ) { 01719 LMIC.txrxFlags = 0; // nothing in 1st/2nd DN slot 01720 // Delay callback processing to avoid up TX while gateway is txing our missed frame! 01721 // Since DNW2 uses SF12 by default we wait 3 secs. 01722 os_setTimedCallback(&LMIC.osjob, 01723 (os_getTime() + DNW2_SAFETY_ZONE + rndDelay(2)), 01724 processRx2DnDataDelay); 01725 return; 01726 } 01727 processDnData(); 01728 } 01729 01730 01731 static void setupRx2DnData (xref2osjob_t osjob) { 01732 //debug_str("setupRx2DnData\r\n"); 01733 LMIC.osjob.func = FUNC_ADDR(processRx2DnData); 01734 setupRx2(); 01735 } 01736 01737 01738 static void processRx1DnData (xref2osjob_t osjob) { 01739 //debug_str("processRx1DnData\r\n"); 01740 if( LMIC.dataLen == 0 || !processDnData() ) 01741 schedRx2(DELAY_DNW2_osticks, FUNC_ADDR(setupRx2DnData)); 01742 } 01743 01744 01745 static void setupRx1DnData (xref2osjob_t osjob) { 01746 //debug_str("setupRx1DnData\r\n"); 01747 01748 setupRx1(FUNC_ADDR(processRx1DnData)); 01749 } 01750 01751 01752 static void updataDone (xref2osjob_t osjob) { 01753 //debug_str("updataDone\r\n"); 01754 txDone(DELAY_DNW1_osticks, FUNC_ADDR(setupRx1DnData)); 01755 } 01756 01757 // ======================================== 01758 01759 01760 static void buildDataFrame (void) { 01761 //debug_str("buildDataFrame\r\n"); 01762 bit_t txdata = ((LMIC.opmode & (OP_TXDATA|OP_POLL)) != OP_POLL); 01763 u1_t dlen = txdata ? LMIC.pendTxLen : 0; 01764 if (LMIC.dnConf != 0) debug_str("ACK IS ON!!\r\n"); 01765 01766 // Piggyback MAC options 01767 // Prioritize by importance 01768 int end = OFF_DAT_OPTS; 01769 if( (LMIC.opmode & (OP_TRACK|OP_PINGABLE)) == (OP_TRACK|OP_PINGABLE) ) { 01770 // Indicate pingability in every UP frame 01771 LMIC.frame[end] = MCMD_PING_IND; 01772 LMIC.frame[end+1] = LMIC.ping.dr | (LMIC.ping.intvExp<<4); 01773 end += 2; 01774 } 01775 if( LMIC.dutyCapAns ) { 01776 LMIC.frame[end] = MCMD_DCAP_ANS; 01777 end += 1; 01778 LMIC.dutyCapAns = 0; 01779 } 01780 if( LMIC.dn2Ans ) { 01781 LMIC.frame[end+0] = MCMD_DN2P_ANS; 01782 LMIC.frame[end+1] = LMIC.dn2Ans & ~MCMD_DN2P_ANS_RFU; 01783 end += 2; 01784 LMIC.dn2Ans = 0; 01785 } 01786 if( LMIC.devsAns ) { // answer to device status 01787 debug_str("Send Device Status\r\n"); 01788 LMIC.frame[end+0] = MCMD_DEVS_ANS; 01789 LMIC.frame[end+1] = LMIC.margin; 01790 LMIC.frame[end+2] = os_getBattLevel(); 01791 end += 3; 01792 LMIC.devsAns = 0; 01793 } 01794 if( LMIC.ladrAns ) { // answer to ADR change 01795 LMIC.frame[end+0] = MCMD_LADR_ANS; 01796 LMIC.frame[end+1] = LMIC.ladrAns & ~MCMD_LADR_ANS_RFU; 01797 end += 2; 01798 LMIC.ladrAns = 0; 01799 } 01800 if( LMIC.bcninfoTries > 0 ) { 01801 LMIC.frame[end] = MCMD_BCNI_REQ; 01802 end += 1; 01803 } 01804 if( LMIC.adrChanged ) { 01805 if( LMIC.adrAckReq < 0 ) 01806 LMIC.adrAckReq = 0; 01807 LMIC.adrChanged = 0; 01808 } 01809 if( LMIC.pingSetAns != 0 ) { 01810 LMIC.frame[end+0] = MCMD_PING_ANS; 01811 LMIC.frame[end+1] = LMIC.pingSetAns & ~MCMD_PING_ANS_RFU; 01812 end += 2; 01813 LMIC.pingSetAns = 0; 01814 } 01815 if( LMIC.snchAns ) { 01816 LMIC.frame[end+0] = MCMD_SNCH_ANS; 01817 LMIC.frame[end+1] = LMIC.snchAns & ~MCMD_SNCH_ANS_RFU; 01818 end += 2; 01819 LMIC.snchAns = 0; 01820 } 01821 ASSERT(end <= OFF_DAT_OPTS+16); 01822 01823 u1_t flen = end + (txdata ? 5+dlen : 4); 01824 if( flen > MAX_LEN_FRAME ) { 01825 // Options and payload too big - delay payload 01826 txdata = 0; 01827 flen = end+4; 01828 } 01829 LMIC.frame[OFF_DAT_HDR] = HDR_FTYPE_DAUP | HDR_MAJOR_V1; 01830 LMIC.frame[OFF_DAT_FCT] = (LMIC.dnConf | LMIC.adrEnabled 01831 | (LMIC.adrAckReq >= 0 ? FCT_ADRARQ : 0) 01832 | (end-OFF_DAT_OPTS)); 01833 os_wlsbf4(LMIC.frame+OFF_DAT_ADDR, LMIC.devaddr); 01834 01835 if( LMIC.txCnt == 0 ) { 01836 LMIC.seqnoUp += 1; 01837 DO_DEVDB(LMIC.seqnoUp,seqnoUp); 01838 } else { 01839 EV(devCond, INFO, (e_.reason = EV::devCond_t::RE_TX, 01840 e_.eui = MAIN::CDEV->getEui(), 01841 e_.info = LMIC.seqnoUp-1, 01842 e_.info2 = ((LMIC.txCnt+1) | 01843 (DRADJUST[LMIC.txCnt+1] << 8) | 01844 ((LMIC.datarate|DR_PAGE)<<16)))); 01845 } 01846 os_wlsbf2(LMIC.frame+OFF_DAT_SEQNO, LMIC.seqnoUp-1); 01847 01848 // Clear pending DN confirmation 01849 LMIC.dnConf = 0; 01850 01851 if( txdata ) { 01852 if( LMIC.pendTxConf ) { 01853 // Confirmed only makes sense if we have a payload (or at least a port) 01854 LMIC.frame[OFF_DAT_HDR] = HDR_FTYPE_DCUP | HDR_MAJOR_V1; 01855 if( LMIC.txCnt == 0 ) LMIC.txCnt = 1; 01856 } 01857 LMIC.frame[end] = LMIC.pendTxPort; 01858 os_copyMem(LMIC.frame+end+1, LMIC.pendTxData, dlen); 01859 01860 // debug_str("Data frame before encrypting: "); 01861 debug_buf(LMIC.frame, dlen); 01862 // debug_str("Encrypting data frame\r\n"); 01863 aes_cipher(LMIC.pendTxPort==0 ? LMIC.nwkKey : LMIC.artKey, 01864 LMIC.devaddr, LMIC.seqnoUp-1, 01865 /*up*/0, LMIC.frame+end+1, dlen); 01866 // debug_str("Encrypted data frame: "); 01867 debug_buf(LMIC.frame, dlen); 01868 } 01869 aes_appendMic(LMIC.nwkKey, LMIC.devaddr, LMIC.seqnoUp-1, /*up*/0, LMIC.frame, flen-4); 01870 // debug_str("Frame to be sent: "); 01871 debug_buf(LMIC.frame, dlen); 01872 01873 EV(dfinfo, DEBUG, (e_.deveui = MAIN::CDEV->getEui(), 01874 e_.devaddr = LMIC.devaddr, 01875 e_.seqno = LMIC.seqnoUp-1, 01876 e_.flags = (LMIC.pendTxPort < 0 ? EV::dfinfo_t::NOPORT : EV::dfinfo_t::NOP), 01877 e_.mic = Base::lsbf4(&LMIC.frame[flen-4]), 01878 e_.hdr = LMIC.frame[LORA::OFF_DAT_HDR], 01879 e_.fct = LMIC.frame[LORA::OFF_DAT_FCT], 01880 e_.port = LMIC.pendTxPort, 01881 e_.plen = txdata ? dlen : 0, 01882 e_.opts.length = end-LORA::OFF_DAT_OPTS, 01883 memcpy(&e_.opts[0], LMIC.frame+LORA::OFF_DAT_OPTS, end-LORA::OFF_DAT_OPTS))); 01884 LMIC.dataLen = flen; 01885 } 01886 01887 01888 // Callback from HAL during scan mode or when job timer expires. 01889 static void onBcnRx (xref2osjob_t job) { 01890 //debug_str("onBcnRx\r\n"); 01891 // If we arrive via job timer make sure to put radio to rest. 01892 os_radio(RADIO_RST); 01893 os_clearCallback(&LMIC.osjob); 01894 if( LMIC.dataLen == 0 ) { 01895 // Nothing received - timeout 01896 LMIC.opmode &= ~(OP_SCAN | OP_TRACK); 01897 reportEvent(EV_SCAN_TIMEOUT); 01898 return; 01899 } 01900 if( decodeBeacon() <= 0 ) { 01901 // Something is wrong with the beacon - continue scan 01902 LMIC.dataLen = 0; 01903 os_radio(RADIO_RXON); 01904 os_setTimedCallback(&LMIC.osjob, LMIC.bcninfo.txtime, FUNC_ADDR(onBcnRx)); 01905 return; 01906 } 01907 // Found our 1st beacon 01908 // We don't have a previous beacon to calc some drift - assume 01909 // an max error of 13ms = 128sec*100ppm which is roughly +/-100ppm 01910 calcBcnRxWindowFromMillis(13,1); 01911 LMIC.opmode &= ~OP_SCAN; // turn SCAN off 01912 LMIC.opmode |= OP_TRACK; // auto enable tracking 01913 reportEvent(EV_BEACON_FOUND); // can be disabled in callback 01914 } 01915 01916 01917 // Enable receiver to listen to incoming beacons 01918 // netid defines when scan stops (any or specific beacon) 01919 // This mode ends with events: EV_SCAN_TIMEOUT/EV_SCAN_BEACON 01920 // Implicitely cancels any pending TX/RX transaction. 01921 // Also cancels an onpoing joining procedure. 01922 static void startScan (void) { 01923 //debug_str("startScan\r\n"); 01924 ASSERT(LMIC.devaddr!=0 && (LMIC.opmode & OP_JOINING)==0); 01925 if( (LMIC.opmode & OP_SHUTDOWN) != 0 ) 01926 return; 01927 // Cancel onging TX/RX transaction 01928 LMIC.txCnt = LMIC.dnConf = LMIC.bcninfo.flags = 0; 01929 LMIC.opmode = (LMIC.opmode | OP_SCAN) & ~(OP_TXRXPEND); 01930 setBcnRxParams(); 01931 LMIC.rxtime = LMIC.bcninfo.txtime = os_getTime() + sec2osticks(BCN_INTV_sec+1); 01932 os_setTimedCallback(&LMIC.osjob, LMIC.rxtime, FUNC_ADDR(onBcnRx)); 01933 os_radio(RADIO_RXON); 01934 } 01935 01936 01937 bit_t LMIC_enableTracking (u1_t tryBcnInfo) { 01938 //debug_str("LMIC_enableTracking\r\n"); 01939 if( (LMIC.opmode & (OP_SCAN|OP_TRACK|OP_SHUTDOWN)) != 0 ) 01940 return 0; // already in progress or failed to enable 01941 // If BCN info requested from NWK then app has to take are 01942 // of sending data up so that MCMD_BCNI_REQ can be attached. 01943 if( (LMIC.bcninfoTries = tryBcnInfo) == 0 ) 01944 startScan(); 01945 return 1; // enabled 01946 } 01947 01948 01949 void LMIC_disableTracking (void) { 01950 //debug_str("LMIC_disableTracking\r\n"); 01951 LMIC.opmode &= ~(OP_SCAN|OP_TRACK); 01952 LMIC.bcninfoTries = 0; 01953 engineUpdate(); 01954 } 01955 01956 01957 // ================================================================================ 01958 // 01959 // Join stuff 01960 // 01961 // ================================================================================ 01962 01963 static void buildJoinRequest (u1_t ftype) { 01964 //debug_str("buildJoinRequest\r\n"); 01965 // Do not use pendTxData since we might have a pending 01966 // user level frame in there. Use RX holding area instead. 01967 xref2u1_t d = LMIC.frame; 01968 d[OFF_JR_HDR] = ftype; 01969 os_getArtEui(d + OFF_JR_ARTEUI); 01970 os_getDevEui(d + OFF_JR_DEVEUI); 01971 os_wlsbf2(d + OFF_JR_DEVNONCE, LMIC.devNonce); 01972 aes_appendMic0(d, OFF_JR_MIC); 01973 01974 EV(joininfo,INFO,(e_.deveui = MAIN::CDEV->getEui(), 01975 e_.arteui = MAIN::CDEV->getArtEui(), 01976 e_.nonce = LMIC.devNonce, 01977 e_.oldaddr = LMIC.devaddr, 01978 e_.mic = Base::lsbf4(&d[LORA::OFF_JR_MIC]), 01979 e_.reason = ((LMIC.opmode & OP_REJOIN) != 0 01980 ? EV::joininfo_t::REJOIN_REQUEST 01981 : EV::joininfo_t::REQUEST))); 01982 LMIC.dataLen = LEN_JR; 01983 LMIC.devNonce++; 01984 DO_DEVDB(LMIC.devNonce,devNonce); 01985 } 01986 01987 static void startJoining (xref2osjob_t osjob) { 01988 //debug_str("startJoining\r\n"); 01989 reportEvent(EV_JOINING); 01990 } 01991 01992 // Start join procedure if not already joined. 01993 bit_t LMIC_startJoining (void) { 01994 //debug_str("LMIC_startJoining\r\n"); 01995 if( LMIC.devaddr == 0 ) { 01996 // There should be no TX/RX going on 01997 ASSERT((LMIC.opmode & (OP_POLL|OP_TXRXPEND)) == 0); 01998 // Lift any previous duty limitation 01999 LMIC.globalDutyRate = 0; 02000 // Cancel scanning 02001 LMIC.opmode &= ~(OP_SCAN|OP_REJOIN|OP_LINKDEAD|OP_NEXTCHNL); 02002 // Setup state 02003 LMIC.rejoinCnt = LMIC.txCnt = LMIC.pendTxConf = 0; 02004 initJoinLoop(); 02005 LMIC.opmode |= OP_JOINING; 02006 // reportEvent will call engineUpdate which then starts sending JOIN REQUESTS 02007 os_setCallback(&LMIC.osjob, FUNC_ADDR(startJoining)); 02008 return 1; 02009 } 02010 return 0; // already joined 02011 } 02012 02013 02014 // ================================================================================ 02015 // 02016 // 02017 // 02018 // ================================================================================ 02019 02020 static void processPingRx (xref2osjob_t osjob) { 02021 debug_str("processPingRx\r\n"); 02022 if( LMIC.dataLen != 0 ) { 02023 LMIC.txrxFlags = TXRX_PING; 02024 if( decodeFrame() ) { 02025 reportEvent(EV_RXCOMPLETE); 02026 return; 02027 } 02028 } 02029 // Pick next ping slot 02030 engineUpdate(); 02031 } 02032 02033 02034 static bit_t processDnData (void) { 02035 debug_str("processDnData\r\n"); 02036 ASSERT((LMIC.opmode & OP_TXRXPEND)!=0); 02037 02038 if( LMIC.dataLen == 0 ) { 02039 norx: 02040 if( LMIC.txCnt != 0 ) { 02041 if( LMIC.txCnt < TXCONF_ATTEMPTS ) { 02042 LMIC.txCnt += 1; 02043 setDrTxpow(DRCHG_NOACK, lowerDR(LMIC.datarate, DRADJUST[LMIC.txCnt]), KEEP_TXPOW); 02044 // Schedule another retransmission 02045 debug_str("Delayed!! -- 1966"); 02046 debug_uint(LMIC.rxtime); 02047 debug_char( '\r' ); 02048 debug_char( '\n' ); 02049 txDelay(LMIC.rxtime, RETRY_PERIOD_secs); 02050 LMIC.opmode &= ~OP_TXRXPEND; 02051 engineUpdate(); 02052 return 1; 02053 } 02054 LMIC.txrxFlags = TXRX_NACK | TXRX_NOPORT; 02055 } else { 02056 // Nothing received - implies no port 02057 LMIC.txrxFlags = TXRX_NOPORT; 02058 } 02059 if( LMIC.adrAckReq != LINK_CHECK_OFF ) 02060 LMIC.adrAckReq += 1; 02061 LMIC.dataBeg = LMIC.dataLen = 0; 02062 txcomplete: 02063 LMIC.opmode &= ~(OP_TXDATA|OP_TXRXPEND); 02064 if( (LMIC.txrxFlags & (TXRX_DNW1|TXRX_DNW2|TXRX_PING)) != 0 && (LMIC.opmode & OP_LINKDEAD) != 0 ) { 02065 LMIC.opmode &= ~OP_LINKDEAD; 02066 reportEvent(EV_LINK_ALIVE); 02067 } 02068 reportEvent(EV_TXCOMPLETE); 02069 // If we haven't heard from NWK in a while although we asked for a sign 02070 // assume link is dead - notify application and keep going 02071 if( LMIC.adrAckReq > LINK_CHECK_DEAD ) { 02072 // We haven't heard from NWK for some time although we 02073 // asked for a response for some time - assume we're disconnected. Lower DR one notch. 02074 EV(devCond, ERR, (e_.reason = EV::devCond_t::LINK_DEAD, 02075 e_.eui = MAIN::CDEV->getEui(), 02076 e_.info = LMIC.adrAckReq)); 02077 setDrTxpow(DRCHG_NOADRACK, decDR((dr_t)LMIC.datarate), KEEP_TXPOW); 02078 LMIC.adrAckReq = LINK_CHECK_CONT; 02079 LMIC.opmode |= OP_REJOIN|OP_LINKDEAD; 02080 reportEvent(EV_LINK_DEAD); 02081 } 02082 // If this falls to zero the NWK did not answer our MCMD_BCNI_REQ commands - try full scan 02083 if( LMIC.bcninfoTries > 0 ) { 02084 if( (LMIC.opmode & OP_TRACK) != 0 ) { 02085 reportEvent(EV_BEACON_FOUND); 02086 LMIC.bcninfoTries = 0; 02087 } 02088 else if( --LMIC.bcninfoTries == 0 ) { 02089 startScan(); // NWK did not answer - try scan 02090 } 02091 } 02092 return 1; 02093 } 02094 debug_str("processDnData - decodeFrame\r\n"); 02095 if( !decodeFrame() ) { 02096 debug_str("decode Frame deconne\r\n"); 02097 if( (LMIC.txrxFlags & TXRX_DNW1) != 0 ) 02098 return 0; 02099 goto norx; 02100 } 02101 goto txcomplete; 02102 } 02103 02104 02105 static void processBeacon (xref2osjob_t osjob) { 02106 //debug_str("processBeacon\r\n"); 02107 ostime_t lasttx = LMIC.bcninfo.txtime; // save here - decodeBeacon might overwrite 02108 u1_t flags = LMIC.bcninfo.flags; 02109 ev_t ev; 02110 02111 if( LMIC.dataLen != 0 && decodeBeacon() >= 1 ) { 02112 ev = EV_BEACON_TRACKED; 02113 if( (flags & (BCN_PARTIAL|BCN_FULL)) == 0 ) { 02114 // We don't have a previous beacon to calc some drift - assume 02115 // an max error of 13ms = 128sec*100ppm which is roughly +/-100ppm 02116 calcBcnRxWindowFromMillis(13,0); 02117 goto rev; 02118 } 02119 // We have a previous BEACON to calculate some drift 02120 s2_t drift = BCN_INTV_osticks - (LMIC.bcninfo.txtime - lasttx); 02121 if( LMIC.missedBcns > 0 ) { 02122 drift = LMIC.drift + (drift - LMIC.drift) / (LMIC.missedBcns+1); 02123 } 02124 if( (LMIC.bcninfo.flags & BCN_NODRIFT) == 0 ) { 02125 s2_t diff = LMIC.drift - drift; 02126 if( diff < 0 ) diff = -diff; 02127 LMIC.lastDriftDiff = diff; 02128 if( LMIC.maxDriftDiff < diff ) 02129 LMIC.maxDriftDiff = diff; 02130 LMIC.bcninfo.flags &= ~BCN_NODDIFF; 02131 } 02132 LMIC.drift = drift; 02133 LMIC.missedBcns = LMIC.rejoinCnt = 0; 02134 LMIC.bcninfo.flags &= ~BCN_NODRIFT; 02135 EV(devCond,INFO,(e_.reason = EV::devCond_t::CLOCK_DRIFT, 02136 e_.eui = MAIN::CDEV->getEui(), 02137 e_.info = drift, 02138 e_.info2 = /*occasion BEACON*/0)); 02139 ASSERT((LMIC.bcninfo.flags & (BCN_PARTIAL|BCN_FULL)) != 0); 02140 } else { 02141 ev = EV_BEACON_MISSED; 02142 LMIC.bcninfo.txtime += BCN_INTV_osticks - LMIC.drift; 02143 LMIC.bcninfo.time += BCN_INTV_sec; 02144 LMIC.missedBcns++; 02145 // Delay any possible TX after surmised beacon - it's there although we missed it 02146 //debug_str("Delayed!! -- 2064"); 02147 debug_uint(LMIC.bcninfo.txtime + BCN_RESERVE_osticks); 02148 //debug_char( '\r' ); 02149 //debug_char( '\n' ); 02150 txDelay(LMIC.bcninfo.txtime + BCN_RESERVE_osticks, 4); 02151 if( LMIC.missedBcns > MAX_MISSED_BCNS ) 02152 LMIC.opmode |= OP_REJOIN; // try if we can roam to another network 02153 if( LMIC.bcnRxsyms > MAX_RXSYMS ) { 02154 LMIC.opmode &= ~(OP_TRACK|OP_PINGABLE|OP_PINGINI|OP_REJOIN); 02155 reportEvent(EV_LOST_TSYNC); 02156 return; 02157 } 02158 } 02159 LMIC.bcnRxtime = LMIC.bcninfo.txtime + BCN_INTV_osticks - calcRxWindow(0,DR_BCN); 02160 LMIC.bcnRxsyms = LMIC.rxsyms; 02161 rev: 02162 #if CFG_us915 02163 LMIC.bcnChnl = (LMIC.bcnChnl+1) & 7; 02164 #endif 02165 if( (LMIC.opmode & OP_PINGINI) != 0 ) 02166 rxschedInit(&LMIC.ping); // note: reuses LMIC.frame buffer! 02167 reportEvent(ev); 02168 } 02169 02170 02171 static void startRxBcn (xref2osjob_t osjob) { 02172 //debug_str("startRxBcn\r\n"); 02173 LMIC.osjob.func = FUNC_ADDR(processBeacon); 02174 os_radio(RADIO_RX); 02175 } 02176 02177 02178 static void startRxPing (xref2osjob_t osjob) { 02179 //debug_str("startRxPing\r\n"); 02180 LMIC.osjob.func = FUNC_ADDR(processPingRx); 02181 os_radio(RADIO_RX); 02182 } 02183 02184 02185 // Decide what to do next for the MAC layer of a device 02186 static void engineUpdate (void) { 02187 02188 //debug_str("Engine Update\r\n"); 02189 // Check for ongoing state: scan or TX/RX transaction 02190 if( (LMIC.opmode & (OP_SCAN|OP_TXRXPEND|OP_SHUTDOWN)) != 0 ) 02191 return; 02192 02193 if( LMIC.devaddr == 0 && (LMIC.opmode & OP_JOINING) == 0 ) { 02194 LMIC_startJoining(); 02195 return; 02196 } 02197 02198 ostime_t now = os_getTime(); 02199 ostime_t rxtime = 0; 02200 ostime_t txbeg = 0; 02201 02202 if( (LMIC.opmode & OP_TRACK) != 0 ) { 02203 // We are tracking a beacon 02204 ASSERT( now + RX_RAMPUP - LMIC.bcnRxtime <= 0 ); 02205 rxtime = LMIC.bcnRxtime - RX_RAMPUP; 02206 } 02207 02208 if( (LMIC.opmode & (OP_JOINING|OP_REJOIN|OP_TXDATA|OP_POLL)) != 0 ) { 02209 // Need to TX some data... 02210 // Assuming txChnl points to channel which first becomes available again. 02211 bit_t jacc = ((LMIC.opmode & (OP_JOINING|OP_REJOIN)) != 0 ? 1 : 0); 02212 // Find next suitable channel and return availability time 02213 if( (LMIC.opmode & OP_NEXTCHNL) != 0 ) { 02214 txbeg = LMIC.txend = nextTx(now); 02215 LMIC.opmode &= ~OP_NEXTCHNL; 02216 } else { 02217 txbeg = LMIC.txend; 02218 } 02219 // Delayed TX or waiting for duty cycle? 02220 if( (LMIC.globalDutyRate != 0 || (LMIC.opmode & OP_RNDTX) != 0) && (txbeg - LMIC.globalDutyAvail) < 0 ) 02221 txbeg = LMIC.globalDutyAvail; 02222 // If we're tracking a beacon... 02223 // then make sure TX-RX transaction is complete before beacon 02224 if( (LMIC.opmode & OP_TRACK) != 0 && 02225 txbeg + (jacc ? JOIN_GUARD_osticks : TXRX_GUARD_osticks) - rxtime > 0 ) { 02226 // Not enough time to complete TX-RX before beacon - postpone after beacon. 02227 // In order to avoid clustering of postponed TX right after beacon randomize start! 02228 debug_str("Delayed!! -- 2144"); 02229 debug_uint(rxtime + BCN_RESERVE_osticks); 02230 debug_char( '\r' ); 02231 debug_char( '\n' ); 02232 txDelay(rxtime + BCN_RESERVE_osticks, 16); 02233 txbeg = 0; 02234 goto checkrx; 02235 } 02236 // Earliest possible time vs overhead to setup radio 02237 if( txbeg - (now + TX_RAMPUP) < 0 ) { 02238 // We could send right now! 02239 debug_str("We could send right now!"); 02240 debug_char( '\r' ); 02241 debug_char( '\n' ); 02242 dr_t txdr = (dr_t)LMIC.datarate; 02243 if( jacc ) { 02244 u1_t ftype; 02245 if( (LMIC.opmode & OP_REJOIN) != 0 ) { 02246 txdr = lowerDR(txdr, LMIC.rejoinCnt); 02247 ftype = HDR_FTYPE_REJOIN; 02248 } else { 02249 ftype = HDR_FTYPE_JREQ; 02250 } 02251 buildJoinRequest(ftype); 02252 LMIC.osjob.func = FUNC_ADDR(jreqDone); 02253 } else { 02254 if( LMIC.seqnoDn >= 0xFFFFFF80 ) { 02255 // Imminent roll over - proactively reset MAC 02256 EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_ROLL_OVER, 02257 e_.eui = MAIN::CDEV->getEui(), 02258 e_.info = LMIC.seqnoDn, 02259 e_.info2 = 0)); 02260 // Device has to react! NWK will not roll over and just stop sending. 02261 // Thus, we have N frames to detect a possible lock up. 02262 reset: 02263 os_setCallback(&LMIC.osjob, FUNC_ADDR(runReset)); 02264 return; 02265 } 02266 if( (LMIC.txCnt==0 && LMIC.seqnoUp == 0xFFFFFFFF) ) { 02267 // Roll over of up seq counter 02268 EV(specCond, ERR, (e_.reason = EV::specCond_t::UPSEQNO_ROLL_OVER, 02269 e_.eui = MAIN::CDEV->getEui(), 02270 e_.info2 = LMIC.seqnoUp)); 02271 // Do not run RESET event callback from here! 02272 // App code might do some stuff after send unaware of RESET. 02273 goto reset; 02274 } 02275 buildDataFrame(); 02276 LMIC.osjob.func = FUNC_ADDR(updataDone); 02277 } 02278 LMIC.rps = setCr(updr2rps(txdr), (cr_t)LMIC.errcr); 02279 LMIC.dndr = txdr; // carry TX datarate (can be != LMIC.datarate) over to txDone/setupRx1 02280 LMIC.opmode = (LMIC.opmode & ~(OP_POLL|OP_RNDTX)) | OP_TXRXPEND | OP_NEXTCHNL; 02281 updateTx(txbeg); 02282 os_radio(RADIO_TX); 02283 return; 02284 } 02285 // Cannot yet TX 02286 if( (LMIC.opmode & OP_TRACK) == 0 ) 02287 { 02288 /*debug_str("We don't track the beacon - nothing else to do - so wait for the time to TX!"); 02289 debug_char( '\r' ); 02290 debug_char( '\n' );*/ 02291 goto txdelay; // We don't track the beacon - nothing else to do - so wait for the time to TX 02292 } 02293 // Consider RX tasks 02294 if( txbeg == 0 ) // zero indicates no TX pending 02295 txbeg += 1; // TX delayed by one tick (insignificant amount of time) 02296 } else { 02297 // No TX pending - no scheduled RX 02298 if( (LMIC.opmode & OP_TRACK) == 0 ) 02299 return; 02300 } 02301 02302 // Are we pingable? 02303 checkrx: 02304 if( (LMIC.opmode & OP_PINGINI) != 0 ) { 02305 // One more RX slot in this beacon period? 02306 if( rxschedNext(&LMIC.ping, now+RX_RAMPUP) ) { 02307 if( txbeg != 0 && (txbeg - LMIC.ping.rxtime) < 0 ) 02308 goto txdelay; 02309 LMIC.rxsyms = LMIC.ping.rxsyms; 02310 LMIC.rxtime = LMIC.ping.rxtime; 02311 LMIC.freq = LMIC.ping.freq; 02312 LMIC.rps = dndr2rps(LMIC.ping.dr); 02313 LMIC.dataLen = 0; 02314 ASSERT(LMIC.rxtime - now+RX_RAMPUP >= 0 ); 02315 os_setTimedCallback(&LMIC.osjob, LMIC.rxtime - RX_RAMPUP, FUNC_ADDR(startRxPing)); 02316 return; 02317 } 02318 // no - just wait for the beacon 02319 } 02320 02321 if( txbeg != 0 && (txbeg - rxtime) < 0 ) 02322 goto txdelay; 02323 02324 setBcnRxParams(); 02325 LMIC.rxsyms = LMIC.bcnRxsyms; 02326 LMIC.rxtime = LMIC.bcnRxtime; 02327 if( now - rxtime >= 0 ) { 02328 LMIC.osjob.func = FUNC_ADDR(processBeacon); 02329 os_radio(RADIO_RX); 02330 return; 02331 } 02332 os_setTimedCallback(&LMIC.osjob, rxtime, FUNC_ADDR(startRxBcn)); 02333 return; 02334 02335 txdelay: 02336 //debug_char( '\r' ); 02337 //debug_char( '\n' ); 02338 debug_str("TX DELAY: Wait ..."); 02339 char buffer[10]; 02340 sprintf(buffer, "%d", (txbeg-TX_RAMPUP)); 02341 02342 debug_str(buffer); 02343 //debug_char( '\r' ); 02344 //debug_char( '\n' ); 02345 debug_char( '\r' ); 02346 debug_char( '\n' ); 02347 EV(devCond, INFO, (e_.reason = EV::devCond_t::TX_DELAY, 02348 e_.eui = MAIN::CDEV->getEui(), 02349 e_.info = osticks2ms(txbeg-now), 02350 e_.info2 = LMIC.seqnoUp-1)); 02351 os_setTimedCallback(&LMIC.osjob, (txbeg-TX_RAMPUP), FUNC_ADDR(runEngineUpdate)); 02352 //debug_str("TX DELAY: Stop To Wait ..."); 02353 } 02354 02355 02356 void LMIC_setAdrMode (bit_t enabled) { 02357 //debug_str("LMIC_setAdrMode\r\n"); 02358 LMIC.adrEnabled = enabled ? FCT_ADREN : 0; 02359 } 02360 02361 02362 // Should we have/need an ext. API like this? 02363 void LMIC_setDrTxpow (dr_t dr, s1_t txpow) { 02364 //debug_str("LMIC_setDrTxpow\r\n"); 02365 setDrTxpow(DRCHG_SET, dr, txpow); 02366 } 02367 02368 02369 void LMIC_shutdown (void) { 02370 //debug_str("LMIC_shutdown\r\n"); 02371 os_clearCallback(&LMIC.osjob); 02372 os_radio(RADIO_RST); 02373 LMIC.opmode |= OP_SHUTDOWN; 02374 } 02375 02376 02377 void LMIC_reset (void) { 02378 //debug_str("LMIC_reset\r\n"); 02379 EV(devCond, INFO, (e_.reason = EV::devCond_t::LMIC_EV, 02380 e_.eui = MAIN::CDEV->getEui(), 02381 e_.info = EV_RESET)); 02382 os_radio(RADIO_RST); 02383 os_clearCallback(&LMIC.osjob); 02384 02385 os_clearMem((xref2u1_t)&LMIC,SIZEOFEXPR(LMIC)); 02386 LMIC.devaddr = 0; 02387 LMIC.devNonce = os_getRndU2(); 02388 LMIC.opmode = OP_NONE; 02389 LMIC.errcr = CR_4_5; 02390 LMIC.adrEnabled = FCT_ADREN; 02391 LMIC.dn2Dr = DR_DNW2; // we need this for 2nd DN window of join accept 02392 LMIC.dn2Freq = FREQ_DNW2; // ditto 02393 LMIC.ping.freq = FREQ_PING; // defaults for ping 02394 LMIC.ping.dr = DR_PING; // ditto 02395 LMIC.ping.intvExp = 0xFF; 02396 #if defined(CFG_us915) 02397 initDefaultChannels(); 02398 #endif 02399 DO_DEVDB(LMIC.devaddr, devaddr); 02400 DO_DEVDB(LMIC.devNonce, devNonce); 02401 DO_DEVDB(LMIC.dn2Dr, dn2Dr); 02402 DO_DEVDB(LMIC.dn2Freq, dn2Freq); 02403 DO_DEVDB(LMIC.ping.freq, pingFreq); 02404 DO_DEVDB(LMIC.ping.dr, pingDr); 02405 DO_DEVDB(LMIC.ping.intvExp, pingIntvExp); 02406 } 02407 02408 02409 void LMIC_init (void) { 02410 //debug_str("LMIC_init\r\n"); 02411 LMIC.opmode = OP_SHUTDOWN; 02412 } 02413 02414 02415 void LMIC_clrTxData (void) { 02416 //debug_str("LMIC_clrTxData\r\n"); 02417 LMIC.opmode &= ~(OP_TXDATA|OP_TXRXPEND|OP_POLL); 02418 LMIC.pendTxLen = 0; 02419 if( (LMIC.opmode & (OP_JOINING|OP_SCAN)) != 0 ) // do not interfere with JOINING 02420 return; 02421 os_clearCallback(&LMIC.osjob); 02422 os_radio(RADIO_RST); 02423 engineUpdate(); 02424 } 02425 02426 02427 void LMIC_setTxData (void) { 02428 //debug_str("LMIC_setTxData\r\n"); 02429 LMIC.opmode |= OP_TXDATA; 02430 if( (LMIC.opmode & OP_JOINING) == 0 ) 02431 { 02432 LMIC.txCnt = 0; // cancel any ongoing TX/RX retries 02433 } 02434 engineUpdate(); 02435 } 02436 02437 02438 // 02439 int LMIC_setTxData2 (u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed, int encrypted) { 02440 //debug_str("LMIC_setTxData2\r\n"); 02441 /* debug_val("Data Length: ", dlen); 02442 debug_val("Data Length: ", SIZEOFEXPR(LMIC.pendTxData));*/ 02443 02444 if( dlen > SIZEOFEXPR(LMIC.pendTxData) ) 02445 return -2; 02446 if( data != (xref2u1_t)0 ) 02447 { 02448 if (encrypted == 1) 02449 aes_cipher(port==0 ? LMIC.nwkKey : LMIC.artKey, LMIC.devaddr, LMIC.seqnoUp-1, 0, data, dlen); 02450 os_copyMem(LMIC.pendTxData, data, dlen); 02451 } 02452 //debug_str("Send Data\r\n"); 02453 LMIC.pendTxConf = confirmed; 02454 LMIC.pendTxPort = port; 02455 LMIC.pendTxLen = dlen; 02456 LMIC_setTxData(); 02457 return 0; 02458 } 02459 02460 /*u1_t* LMIC_getEui() { 02461 return MAIN::CDEV->getEui(); 02462 }*/ 02463 02464 02465 // Send a payload-less message to signal device is alive 02466 void LMIC_sendAlive (void) { 02467 //debug_str("LMIC_sendAlive\r\n"); 02468 LMIC.opmode |= OP_POLL; 02469 engineUpdate(); 02470 } 02471 02472 02473 // Check if other networks are around. 02474 void LMIC_tryRejoin (void) { 02475 //debug_str("LMIC_tryRejoin\r\n"); 02476 LMIC.opmode |= OP_REJOIN; 02477 engineUpdate(); 02478 } 02479 02480 //! \brief Setup given session keys 02481 //! and put the MAC in a state as if 02482 //! a join request/accept would have negotiated just these keys. 02483 //! It is crucial that the combinations `devaddr/nwkkey` and `devaddr/artkey` 02484 //! are unique within the network identified by `netid`. 02485 //! NOTE: on Harvard architectures when session keys are in flash: 02486 //! Caller has to fill in LMIC.{nwk,art}Key before and pass {nwk,art}Key are NULL 02487 //! \param netid a 24 bit number describing the network id this device is using 02488 //! \param devaddr the 32 bit session address of the device. It is strongly recommended 02489 //! to ensure that different devices use different numbers with high probability. 02490 //! \param nwkKey the 16 byte network session key used for message integrity. 02491 //! If NULL the caller has copied the key into `LMIC.nwkKey` before. 02492 //! \param artKey the 16 byte application router session key used for message confidentiality. 02493 //! If NULL the caller has copied the key into `LMIC.artKey` before. 02494 void LMIC_setSession (u4_t netid, devaddr_t devaddr, xref2u1_t nwkKey, xref2u1_t artKey) { 02495 //debug_str("LMIC_setSession\r\n"); 02496 LMIC.netid = netid; 02497 LMIC.devaddr = devaddr; 02498 if( nwkKey != (xref2u1_t)0 ) 02499 os_copyMem(LMIC.nwkKey, nwkKey, 16); 02500 if( artKey != (xref2u1_t)0 ) 02501 os_copyMem(LMIC.artKey, artKey, 16); 02502 02503 #if defined(CFG_eu868) 02504 initDefaultChannels(0); 02505 #endif 02506 02507 LMIC.opmode &= ~(OP_JOINING|OP_TRACK|OP_REJOIN|OP_TXRXPEND|OP_PINGINI); 02508 LMIC.opmode |= OP_NEXTCHNL; 02509 stateJustJoined(); 02510 } 02511 02512 // Enable/disable link check validation. 02513 // LMIC sets the ADRACKREQ bit in UP frames if there were no DN frames 02514 // for a while. It expects the network to provide a DN message to prove 02515 // connectivity with a span of UP frames. If this no such prove is coming 02516 // then the datarate is lowered and a LINK_DEAD event is generated. 02517 // This mode can be disabled and no connectivity prove (ADRACKREQ) is requested 02518 // nor is the datarate changed. 02519 // This must be called only if a session is established (e.g. after EV_JOINED) 02520 void LMIC_setLinkCheckMode (bit_t enabled) { 02521 //debug_str("LMIC_setLinkCheckMode\r\n"); 02522 LMIC.adrChanged = 0; 02523 LMIC.adrAckReq = enabled ? LINK_CHECK_INIT : LINK_CHECK_OFF; 02524 } 02525 02526
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