ST
Expansion SW library to control high power stepper motor(s) using IHM03A1 expansion board(s) with Powerstep01 driver.
Dependencies: X_NUCLEO_COMMON ST_INTERFACES
Dependents: IHM03A1_ExampleFor1Motor HelloWorld_IHM03A1 IHM03A1_ExampleFor3Motors KYPHOS_Stepper_Motor_Control
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X_NUCLEO_IHM03A1
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ST Expansion SW Team
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PowerStep01_def.h
00001 /** 00002 ****************************************************************************** 00003 * @file PowerStep01.h 00004 * @author IPC Rennes 00005 * @version V1.2.0 00006 * @date January 25th, 2016 00007 * @brief Header for Powerstep01 motor driver (Microstepping controller with power MOSFETs) 00008 * @note (C) COPYRIGHT 2016 STMicroelectronics 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> 00013 * 00014 * Redistribution and use in source and binary forms, with or without modification, 00015 * are permitted provided that the following conditions are met: 00016 * 1. Redistributions of source code must retain the above copyright notice, 00017 * this list of conditions and the following disclaimer. 00018 * 2. Redistributions in binary form must reproduce the above copyright notice, 00019 * this list of conditions and the following disclaimer in the documentation 00020 * and/or other materials provided with the distribution. 00021 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00022 * may be used to endorse or promote products derived from this software 00023 * without specific prior written permission. 00024 * 00025 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00026 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00027 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00028 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00029 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00030 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00031 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00032 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00033 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00034 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 ****************************************************************************** 00037 */ 00038 00039 /* Define to prevent recursive inclusion -------------------------------------*/ 00040 #ifndef _POWERSTEP01_H_INCLUDED 00041 #define _POWERSTEP01_H_INCLUDED 00042 00043 #ifdef __cplusplus 00044 extern "C" { 00045 #endif 00046 00047 /* Includes ------------------------------------------------------------------*/ 00048 #include "PowerStep01_config.h" 00049 #include "stdint.h" 00050 #include "motor_def.h" 00051 00052 /* Definitions ---------------------------------------------------------------*/ 00053 00054 /** @addtogroup Components 00055 * @{ 00056 */ 00057 00058 /** @defgroup PowerStep01 PowerStep01 00059 * @{ 00060 */ 00061 00062 /** @defgroup Powerstep01_Exported_Defines Powerstep01_Exported_Defines 00063 * @{ 00064 */ 00065 /// Current FW major version 00066 #define POWERSTEP01_FW_MAJOR_VERSION (uint8_t)(1) 00067 /// Current FW minor version 00068 #define POWERSTEP01_FW_MINOR_VERSION (uint8_t)(2) 00069 /// Current FW patch version 00070 #define POWERSTEP01_FW_PATCH_VERSION (uint8_t)(0) 00071 /// Current FW version 00072 #define POWERSTEP01_FW_VERSION (uint32_t)((POWERSTEP01_FW_MAJOR_VERSION<<16)|\ 00073 (POWERSTEP01_FW_MINOR_VERSION<<8)|\ 00074 (POWERSTEP01_FW_PATCH_VERSION)) 00075 00076 /// Powerstep01 max number of bytes of command & arguments to set a parameter 00077 #define POWERSTEP01_CMD_ARG_MAX_NB_BYTES (4) 00078 00079 /// Powerstep01 command + argument bytes number for NOP command 00080 #define POWERSTEP01_CMD_ARG_NB_BYTES_NOP (1) 00081 /// Powerstep01 command + argument bytes number for RUN command 00082 #define POWERSTEP01_CMD_ARG_NB_BYTES_RUN (4) 00083 /// Powerstep01 command + argument bytes number for STEP_CLOCK command 00084 #define POWERSTEP01_CMD_ARG_NB_BYTES_STEP_CLOCK (1) 00085 /// Powerstep01 command + argument bytes number for MOVE command 00086 #define POWERSTEP01_CMD_ARG_NB_BYTES_MOVE (4) 00087 /// Powerstep01 command + argument bytes number for GO_TO command 00088 #define POWERSTEP01_CMD_ARG_NB_BYTES_GO_TO (4) 00089 /// Powerstep01 command + argument bytes number for GO_TO_DIR command 00090 #define POWERSTEP01_CMD_ARG_NB_BYTES_GO_TO_DIR (4) 00091 /// Powerstep01 command + argument bytes number for GO_UNTIL command 00092 #define POWERSTEP01_CMD_ARG_NB_BYTES_GO_UNTIL (4) 00093 /// Powerstep01 command + argument bytes number for RELEASE_SW command 00094 #define POWERSTEP01_CMD_ARG_NB_BYTES_RELEASE_SW (1) 00095 /// Powerstep01 command + argument bytes number for GO_HOME command 00096 #define POWERSTEP01_CMD_ARG_NB_BYTES_GO_HOME (1) 00097 /// Powerstep01 command + argument bytes number for GO_MARK command 00098 #define POWERSTEP01_CMD_ARG_NB_BYTES_GO_MARK (1) 00099 /// Powerstep01 command + argument bytes number for RESET_POS command 00100 #define POWERSTEP01_CMD_ARG_NB_BYTES_RESET_POS (1) 00101 /// Powerstep01 command + argument bytes number for RESET_DEVICE command 00102 #define POWERSTEP01_CMD_ARG_NB_BYTES_RESET_DEVICE (1) 00103 /// Powerstep01 command + argument bytes number for NOP command 00104 #define POWERSTEP01_CMD_ARG_NB_BYTES_SOFT_STOP (1) 00105 /// Powerstep01 command + argument bytes number for HARD_STOP command 00106 #define POWERSTEP01_CMD_ARG_NB_BYTES_HARD_STOP (1) 00107 /// Powerstep01 command + argument bytes number for SOFT_HIZ command 00108 #define POWERSTEP01_CMD_ARG_NB_BYTES_SOFT_HIZ (1) 00109 /// Powerstep01 command + argument bytes number for ARD_HIZ command 00110 #define POWERSTEP01_CMD_ARG_NB_BYTES_HARD_HIZ (1) 00111 /// Powerstep01 command + argument bytes number for GET_STATUS command 00112 #define POWERSTEP01_CMD_ARG_NB_BYTES_GET_STATUS (1) 00113 00114 /// Powerstep01 response bytes number 00115 #define POWERSTEP01_RSP_NB_BYTES_GET_STATUS (2) 00116 00117 /// Daisy chain command mask 00118 #define DAISY_CHAIN_COMMAND_MASK (0xFA) 00119 00120 /// powerSTEP01 max absolute position 00121 #define POWERSTEP01_MAX_POSITION (int32_t)(0x001FFFFF) 00122 00123 /// powerSTEP01 min absolute position 00124 #define POWERSTEP01_MIN_POSITION (int32_t)(0xFFE00000) 00125 00126 /// powerSTEP01 error base number 00127 #define POWERSTEP01_ERROR_BASE (0xB000) 00128 00129 /// powerSTEP01 acceleration and deceleration max value 00130 #define POWERSTEP01_ACC_DEC_MAX_VALUE (float)(59590) 00131 /// powerSTEP01 max speed max value 00132 #define POWERSTEP01_MAX_SPEED_MAX_VALUE (float)(15610) 00133 /// powerSTEP01 min speed max value 00134 #define POWERSTEP01_MIN_SPEED_MAX_VALUE (float)(976.3) 00135 /// powerSTEP01 full step speed max value 00136 #define POWERSTEP01_FS_SPD_MAX_VALUE (float)(15625) 00137 /// powerSTEP01 intersect speed max value 00138 #define POWERSTEP01_INT_SPD_MAX_VALUE (float)(976.5) 00139 /// powerSTEP01 thermal compensation max value 00140 #define POWERSTEP01_K_THERM_MAX_VALUE (float)(1.46875) 00141 /// powerSTEP01 thermal compensation min value 00142 #define POWERSTEP01_K_THERM_MIN_VALUE (float)(1) 00143 /// powerSTEP01 thermal compensation max value 00144 #define POWERSTEP01_STALL_OCD_TH_MAX_VALUE (float)(1000) 00145 /// powerSTEP01 thermal compensation max value 00146 #define POWERSTEP01_K_THERM_MAX_VALUE (float)(1.46875) 00147 /// powerSTEP01 voltage amplitude regulation max value 00148 #define POWERSTEP01_KVAL_MAX_VALUE (float)(255/256) 00149 /// powerSTEP01 BEMF compensation curve slope max value 00150 #define POWERSTEP01_SLP_MAX_VALUE (float)(0.4) 00151 /// powerSTEP01 torque regulation DAC reference voltage max value 00152 #define POWERSTEP01_TVAL_MAX_VALUE (float)(1000) 00153 /// powerSTEP01 minimum off and on time max value 00154 #define POWERSTEP01_TOFF_TON_MIN_MAX_VALUE (float)(64) 00155 00156 ///Shift of the low speed optimization bit in MIN_SPEED register 00157 #define POWERSTEP01_LSPD_OPT_SHIFT (12) 00158 ///Shift of the boost mode bit in FS_SPD register 00159 #define POWERSTEP01_BOOST_MODE_SHIFT (10) 00160 ///Maximum fast decay time (TOFF_FAST) unit 00161 #define POWERSTEP01_TOFF_FAST_UNIT_US (2) 00162 ///Shift of the maximum fast decay time (TOFF_FAST) in T_FAST register 00163 #define POWERSTEP01_TOFF_FAST_SHIFT (4) 00164 ///Maximum fall step time (FAST_STEP) unit 00165 #define POWERSTEP01_FAST_STEP_UNIT_US (2) 00166 ///Shift of the maximum fall step time (FAST_STEP) in T_FAST register 00167 #define POWERSTEP01_FAST_STEP_SHIFT (0) 00168 ///Duration unit of constant current phase during gate turn-on and turn-off (TCC) 00169 #define POWERSTEP01_TCC_UNIT_NS (125) 00170 ///Shift of TCC field in GATECFG1 register 00171 #define POWERSTEP01_TCC_SHIFT (0) 00172 ///Shift of IGATE field in GATECFG1 register 00173 #define POWERSTEP01_IGATE_SHIFT (5) 00174 ///Shift of TBOOST field in GATECFG1 register 00175 #define POWERSTEP01_TBOOST_SHIFT (8) 00176 ///Duration unit of the blanking of the current sensing comparators (TBLANK) 00177 #define POWERSTEP01_TBLANK_UNIT_NS (125) 00178 ///Shift of TBLANK field in GATECFG2 register 00179 #define POWERSTEP01_TBLANK_SHIFT (5) 00180 ///Deadtime duration unit between gate turn-off and opposite gate turn-on (TDT) 00181 #define POWERSTEP01_TDT_UNIT_NS (125) 00182 ///Shift of TDT field in GATECFG2 register 00183 #define POWERSTEP01_TDT_SHIFT (0) 00184 ///Shift of F_PWM_INT field in CONFIG register for voltage mode 00185 #define POWERSTEP01_CONFIG_PWM_DIV_SHIFT (13) 00186 ///Shift of F_PWM_DEC field in CONFIG register for voltage mode 00187 #define POWERSTEP01_CONFIG_PWM_MUL_SHIFT (10) 00188 ///Target switching period (TSW) unit 00189 #define POWERSTEP01_CONFIG_TSW_UNIT_US (4) 00190 ///Shift of TSW field in CONFIG register for current mode 00191 #define POWERSTEP01_CONFIG_TSW_SHIFT (10) 00192 ///Shift of MOT_STATUS field in STATUS register 00193 #define POWERSTEP01_STATUS_MOT_STATUS_SHIFT (5) 00194 /** 00195 * @} 00196 */ 00197 00198 /* Types ---------------------------------------------------------------------*/ 00199 00200 /** @defgroup Powerstep01_Exported_Types Powerstep01 Exported Types 00201 * @{ 00202 */ 00203 /// masks for ABS_POS register of PowerStep01 00204 typedef enum { 00205 POWERSTEP01_ABS_POS_VALUE_MASK = ((uint32_t)0x003FFFFF), 00206 POWERSTEP01_ABS_POS_SIGN_BIT_MASK = ((uint32_t)0x00200000) 00207 } powerstep01_AbsPosMasks_t; 00208 00209 /// masks for EL_POS register of PowerStep01 00210 typedef enum { 00211 POWERSTEP01_ELPOS_STEP_MASK = ((uint16_t)0x180), 00212 POWERSTEP01_ELPOS_MICROSTEP_MASK = ((uint16_t)0x07F) 00213 } powerstep01_ElPosMasks_t; 00214 00215 /// masks for MIN_SPEED register of PowerStep01 00216 typedef enum { 00217 POWERSTEP01_LSPD_OPT = ((uint16_t)((0x1)<<POWERSTEP01_LSPD_OPT_SHIFT)), 00218 POWERSTEP01_MIN_SPEED_MASK = ((uint16_t)0x0FFF) 00219 } powerstep01_MinSpeedMasks_t; 00220 00221 /// Low speed optimization (MIN_SPEED register of PowerStep01) 00222 typedef enum { 00223 POWERSTEP01_LSPD_OPT_OFF = ((uint16_t)0x0000), 00224 POWERSTEP01_LSPD_OPT_ON = ((uint16_t)POWERSTEP01_LSPD_OPT) 00225 } powerstep01_LspdOpt_t; 00226 00227 /// masks for FS_SPD register of PowerStep01 00228 typedef enum { 00229 POWERSTEP01_BOOST_MODE = ((uint16_t)((0x1)<<POWERSTEP01_BOOST_MODE_SHIFT)), 00230 POWERSTEP01_FS_SPD_MASK = ((uint16_t)0x03FF) 00231 } powerstep01_FsSpdMasks_t; 00232 00233 /// Full step boost (FS_SPD register of PowerStep01) 00234 typedef enum { 00235 POWERSTEP01_BOOST_MODE_OFF = ((uint16_t)0x0000), 00236 POWERSTEP01_BOOST_MODE_ON = ((uint16_t)POWERSTEP01_BOOST_MODE) 00237 } powerstep01_BoostMode_t; 00238 00239 /// masks for T_FAST register of PowerStep01 00240 typedef enum { 00241 POWERSTEP01_FAST_STEP_MASK = ((uint16_t) ((0xF)<<POWERSTEP01_FAST_STEP_SHIFT)), 00242 POWERSTEP01_TOFF_FAST_MASK = ((uint16_t) ((0xF)<<POWERSTEP01_TOFF_FAST_SHIFT)) 00243 } powerstep01_TFastMasks_t; 00244 00245 /// Maximum fall step times (T_FAST register of PowerStep01) 00246 typedef enum { 00247 POWERSTEP01_FAST_STEP_2us = (((uint8_t)0x00)<<POWERSTEP01_FAST_STEP_SHIFT), 00248 POWERSTEP01_FAST_STEP_4us = (((uint8_t)0x01)<<POWERSTEP01_FAST_STEP_SHIFT), 00249 POWERSTEP01_FAST_STEP_6us = (((uint8_t)0x02)<<POWERSTEP01_FAST_STEP_SHIFT), 00250 POWERSTEP01_FAST_STEP_8us = (((uint8_t)0x03)<<POWERSTEP01_FAST_STEP_SHIFT), 00251 POWERSTEP01_FAST_STEP_10us = (((uint8_t)0x04)<<POWERSTEP01_FAST_STEP_SHIFT), 00252 POWERSTEP01_FAST_STEP_12us = (((uint8_t)0x05)<<POWERSTEP01_FAST_STEP_SHIFT), 00253 POWERSTEP01_FAST_STEP_14us = (((uint8_t)0x06)<<POWERSTEP01_FAST_STEP_SHIFT), 00254 POWERSTEP01_FAST_STEP_16us = (((uint8_t)0x07)<<POWERSTEP01_FAST_STEP_SHIFT), 00255 POWERSTEP01_FAST_STEP_18us = (((uint8_t)0x08)<<POWERSTEP01_FAST_STEP_SHIFT), 00256 POWERSTEP01_FAST_STEP_20us = (((uint8_t)0x09)<<POWERSTEP01_FAST_STEP_SHIFT), 00257 POWERSTEP01_FAST_STEP_22us = (((uint8_t)0x0A)<<POWERSTEP01_FAST_STEP_SHIFT), 00258 POWERSTEP01_FAST_STEP_24s = (((uint8_t)0x0B)<<POWERSTEP01_FAST_STEP_SHIFT), 00259 POWERSTEP01_FAST_STEP_26us = (((uint8_t)0x0C)<<POWERSTEP01_FAST_STEP_SHIFT), 00260 POWERSTEP01_FAST_STEP_28us = (((uint8_t)0x0D)<<POWERSTEP01_FAST_STEP_SHIFT), 00261 POWERSTEP01_FAST_STEP_30us = (((uint8_t)0x0E)<<POWERSTEP01_FAST_STEP_SHIFT), 00262 POWERSTEP01_FAST_STEP_32us = (((uint8_t)0x0F)<<POWERSTEP01_FAST_STEP_SHIFT) 00263 } powerstep01_FastStep_t; 00264 00265 /// Maximum fast decay times (T_FAST register of PowerStep01) 00266 typedef enum { 00267 POWERSTEP01_TOFF_FAST_2us = (((uint8_t)0x00)<<POWERSTEP01_TOFF_FAST_SHIFT), 00268 POWERSTEP01_TOFF_FAST_4us = (((uint8_t)0x01)<<POWERSTEP01_TOFF_FAST_SHIFT), 00269 POWERSTEP01_TOFF_FAST_6us = (((uint8_t)0x02)<<POWERSTEP01_TOFF_FAST_SHIFT), 00270 POWERSTEP01_TOFF_FAST_8us = (((uint8_t)0x03)<<POWERSTEP01_TOFF_FAST_SHIFT), 00271 POWERSTEP01_TOFF_FAST_10us = (((uint8_t)0x04)<<POWERSTEP01_TOFF_FAST_SHIFT), 00272 POWERSTEP01_TOFF_FAST_12us = (((uint8_t)0x05)<<POWERSTEP01_TOFF_FAST_SHIFT), 00273 POWERSTEP01_TOFF_FAST_14us = (((uint8_t)0x06)<<POWERSTEP01_TOFF_FAST_SHIFT), 00274 POWERSTEP01_TOFF_FAST_16us = (((uint8_t)0x07)<<POWERSTEP01_TOFF_FAST_SHIFT), 00275 POWERSTEP01_TOFF_FAST_18us = (((uint8_t)0x08)<<POWERSTEP01_TOFF_FAST_SHIFT), 00276 POWERSTEP01_TOFF_FAST_20us = (((uint8_t)0x09)<<POWERSTEP01_TOFF_FAST_SHIFT), 00277 POWERSTEP01_TOFF_FAST_22us = (((uint8_t)0x0A)<<POWERSTEP01_TOFF_FAST_SHIFT), 00278 POWERSTEP01_TOFF_FAST_24us = (((uint8_t)0x0B)<<POWERSTEP01_TOFF_FAST_SHIFT), 00279 POWERSTEP01_TOFF_FAST_26us = (((uint8_t)0x0C)<<POWERSTEP01_TOFF_FAST_SHIFT), 00280 POWERSTEP01_TOFF_FAST_28us = (((uint8_t)0x0D)<<POWERSTEP01_TOFF_FAST_SHIFT), 00281 POWERSTEP01_TOFF_FAST_30us = (((uint8_t)0x0E)<<POWERSTEP01_TOFF_FAST_SHIFT), 00282 POWERSTEP01_TOFF_FAST_32us = (((uint8_t)0x0F)<<POWERSTEP01_TOFF_FAST_SHIFT) 00283 } powerstep01_ToffFast_t; 00284 00285 /// Overcurrent threshold options (OCD register of PowerStep01) 00286 typedef enum { 00287 POWERSTEP01_OCD_TH_31_25mV = ((uint8_t)0x00), 00288 POWERSTEP01_OCD_TH_62_5mV = ((uint8_t)0x01), 00289 POWERSTEP01_OCD_TH_93_75mV = ((uint8_t)0x02), 00290 POWERSTEP01_OCD_TH_125mV = ((uint8_t)0x03), 00291 POWERSTEP01_OCD_TH_156_25mV = ((uint8_t)0x04), 00292 POWERSTEP01_OCD_TH_187_50mV = ((uint8_t)0x05), 00293 POWERSTEP01_OCD_TH_218_75mV = ((uint8_t)0x06), 00294 POWERSTEP01_OCD_TH_250mV = ((uint8_t)0x07), 00295 POWERSTEP01_OCD_TH_281_25mV = ((uint8_t)0x08), 00296 POWERSTEP01_OCD_TH_312_5mV = ((uint8_t)0x09), 00297 POWERSTEP01_OCD_TH_343_75mV = ((uint8_t)0x0A), 00298 POWERSTEP01_OCD_TH_375mV = ((uint8_t)0x0B), 00299 POWERSTEP01_OCD_TH_406_25mV = ((uint8_t)0x0C), 00300 POWERSTEP01_OCD_TH_437_5mV = ((uint8_t)0x0D), 00301 POWERSTEP01_OCD_TH_468_75mV = ((uint8_t)0x0E), 00302 POWERSTEP01_OCD_TH_500mV = ((uint8_t)0x0F), 00303 POWERSTEP01_OCD_TH_531_25mV = ((uint8_t)0x10), 00304 POWERSTEP01_OCD_TH_562_5mV = ((uint8_t)0x11), 00305 POWERSTEP01_OCD_TH_593_75mV = ((uint8_t)0x12), 00306 POWERSTEP01_OCD_TH_625mV = ((uint8_t)0x13), 00307 POWERSTEP01_OCD_TH_656_25mV = ((uint8_t)0x14), 00308 POWERSTEP01_OCD_TH_687_5mV = ((uint8_t)0x15), 00309 POWERSTEP01_OCD_TH_718_75mV = ((uint8_t)0x16), 00310 POWERSTEP01_OCD_TH_750mV = ((uint8_t)0x17), 00311 POWERSTEP01_OCD_TH_781_25mV = ((uint8_t)0x18), 00312 POWERSTEP01_OCD_TH_812_5mV = ((uint8_t)0x19), 00313 POWERSTEP01_OCD_TH_843_75mV = ((uint8_t)0x1A), 00314 POWERSTEP01_OCD_TH_875mV = ((uint8_t)0x1B), 00315 POWERSTEP01_OCD_TH_906_25mV = ((uint8_t)0x1C), 00316 POWERSTEP01_OCD_TH_937_75mV = ((uint8_t)0x1D), 00317 POWERSTEP01_OCD_TH_968_75mV = ((uint8_t)0x1E), 00318 POWERSTEP01_OCD_TH_1V = ((uint8_t)0x1F) 00319 } powerstep01_OcdTh_t; 00320 00321 /// masks for STEP_MODE register of PowerStep01 00322 typedef enum { 00323 POWERSTEP01_STEP_MODE_STEP_SEL = ((uint8_t)0x07), 00324 POWERSTEP01_STEP_MODE_CM_VM = ((uint8_t)0x08), 00325 POWERSTEP01_STEP_MODE_SYNC_SEL = ((uint8_t)0x70), 00326 POWERSTEP01_STEP_MODE_SYNC_EN = ((uint8_t)0x80) 00327 } powerstep01_StepModeMasks_t; 00328 00329 /// Voltage or Current mode selection (CM_VM field of STEP_MODE register of PowerStep01) 00330 typedef enum { 00331 POWERSTEP01_CM_VM_VOLTAGE = ((uint8_t)0x00), 00332 POWERSTEP01_CM_VM_CURRENT = ((uint8_t)0x08) 00333 } powerstep01_CmVm_t; 00334 00335 /// Stepping options (field STEP_SEL of STEP_MODE register of PowerStep01) 00336 typedef enum { 00337 POWERSTEP01_STEP_SEL_1 = ((uint8_t)0x00), 00338 POWERSTEP01_STEP_SEL_1_2 = ((uint8_t)0x01), 00339 POWERSTEP01_STEP_SEL_1_4 = ((uint8_t)0x02), 00340 POWERSTEP01_STEP_SEL_1_8 = ((uint8_t)0x03), 00341 POWERSTEP01_STEP_SEL_1_16 = ((uint8_t)0x04), 00342 POWERSTEP01_STEP_SEL_1_32 = ((uint8_t)0x05), 00343 POWERSTEP01_STEP_SEL_1_64 = ((uint8_t)0x06), 00344 POWERSTEP01_STEP_SEL_1_128 = ((uint8_t)0x07) 00345 } powerstep01_StepSel_t; 00346 00347 /// Powerstep01 Sync Output frequency enabling bitw 00348 #define POWERSTEP01_SYNC_EN ((0x1) << 7) 00349 00350 /// SYNC_SEL options (STEP_MODE register of PowerStep01) 00351 typedef enum { 00352 POWERSTEP01_SYNC_SEL_DISABLED = ((uint8_t)0x00), 00353 POWERSTEP01_SYNC_SEL_1_2 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x00)), 00354 POWERSTEP01_SYNC_SEL_1 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x10)), 00355 POWERSTEP01_SYNC_SEL_2 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x20)), 00356 POWERSTEP01_SYNC_SEL_4 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x30)), 00357 POWERSTEP01_SYNC_SEL_8 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x40)), 00358 POWERSTEP01_SYNC_SEL_16 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x50)), 00359 POWERSTEP01_SYNC_SEL_32 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x60)), 00360 POWERSTEP01_SYNC_SEL_64 = ((uint8_t)(POWERSTEP01_SYNC_EN|0x70)) 00361 } powerstep01_SyncSel_t; 00362 00363 /// Alarms conditions (ALARM_EN register of PowerStep01) 00364 typedef enum { 00365 POWERSTEP01_ALARM_EN_OVERCURRENT = ((uint8_t)0x01), 00366 POWERSTEP01_ALARM_EN_THERMAL_SHUTDOWN = ((uint8_t)0x02), 00367 POWERSTEP01_ALARM_EN_THERMAL_WARNING = ((uint8_t)0x04), 00368 POWERSTEP01_ALARM_EN_UVLO = ((uint8_t)0x08), 00369 POWERSTEP01_ALARM_EN_ADC_UVLO = ((uint8_t)0x10), 00370 POWERSTEP01_ALARM_EN_STALL_DETECTION = ((uint8_t)0x20), 00371 POWERSTEP01_ALARM_EN_SW_TURN_ON = ((uint8_t)0x40), 00372 POWERSTEP01_ALARM_EN_WRONG_NPERF_CMD = ((uint8_t)0x80) 00373 } powerstep01_AlarmEn_t; 00374 00375 00376 /// masks for GATECFG1 register of PowerStep01 00377 typedef enum { 00378 POWERSTEP01_GATECFG1_TCC_MASK = ((uint16_t)0x001F), 00379 POWERSTEP01_GATECFG1_IGATE_MASK = ((uint16_t)0x00E0), 00380 POWERSTEP01_GATECFG1_TBOOST_MASK = ((uint16_t)0x0700), 00381 POWERSTEP01_GATECFG1_WD_EN = ((uint16_t)0x0800) 00382 } powerstep01_GateCfg1Masks_t; 00383 00384 /// Control current Time (field TCC of GATECFG1 register of PowerStep01) 00385 typedef enum { 00386 POWERSTEP01_TCC_125ns = (((uint8_t)0x00)<<POWERSTEP01_TCC_SHIFT), 00387 POWERSTEP01_TCC_250ns = (((uint8_t)0x01)<<POWERSTEP01_TCC_SHIFT), 00388 POWERSTEP01_TCC_375ns = (((uint8_t)0x02)<<POWERSTEP01_TCC_SHIFT), 00389 POWERSTEP01_TCC_500ns = (((uint8_t)0x03)<<POWERSTEP01_TCC_SHIFT), 00390 POWERSTEP01_TCC_625ns = (((uint8_t)0x04)<<POWERSTEP01_TCC_SHIFT), 00391 POWERSTEP01_TCC_750ns = (((uint8_t)0x05)<<POWERSTEP01_TCC_SHIFT), 00392 POWERSTEP01_TCC_875ns = (((uint8_t)0x06)<<POWERSTEP01_TCC_SHIFT), 00393 POWERSTEP01_TCC_1000ns = (((uint8_t)0x07)<<POWERSTEP01_TCC_SHIFT), 00394 POWERSTEP01_TCC_1125ns = (((uint8_t)0x08)<<POWERSTEP01_TCC_SHIFT), 00395 POWERSTEP01_TCC_1250ns = (((uint8_t)0x09)<<POWERSTEP01_TCC_SHIFT), 00396 POWERSTEP01_TCC_1375ns = (((uint8_t)0x0A)<<POWERSTEP01_TCC_SHIFT), 00397 POWERSTEP01_TCC_1500ns = (((uint8_t)0x0B)<<POWERSTEP01_TCC_SHIFT), 00398 POWERSTEP01_TCC_1625ns = (((uint8_t)0x0C)<<POWERSTEP01_TCC_SHIFT), 00399 POWERSTEP01_TCC_1750ns = (((uint8_t)0x0D)<<POWERSTEP01_TCC_SHIFT), 00400 POWERSTEP01_TCC_1875ns = (((uint8_t)0x0E)<<POWERSTEP01_TCC_SHIFT), 00401 POWERSTEP01_TCC_2000ns = (((uint8_t)0x0F)<<POWERSTEP01_TCC_SHIFT), 00402 POWERSTEP01_TCC_2125ns = (((uint8_t)0x10)<<POWERSTEP01_TCC_SHIFT), 00403 POWERSTEP01_TCC_2250ns = (((uint8_t)0x11)<<POWERSTEP01_TCC_SHIFT), 00404 POWERSTEP01_TCC_2375ns = (((uint8_t)0x12)<<POWERSTEP01_TCC_SHIFT), 00405 POWERSTEP01_TCC_2500ns = (((uint8_t)0x13)<<POWERSTEP01_TCC_SHIFT), 00406 POWERSTEP01_TCC_2625ns = (((uint8_t)0x14)<<POWERSTEP01_TCC_SHIFT), 00407 POWERSTEP01_TCC_2750ns = (((uint8_t)0x15)<<POWERSTEP01_TCC_SHIFT), 00408 POWERSTEP01_TCC_2875ns = (((uint8_t)0x16)<<POWERSTEP01_TCC_SHIFT), 00409 POWERSTEP01_TCC_3000ns = (((uint8_t)0x17)<<POWERSTEP01_TCC_SHIFT), 00410 POWERSTEP01_TCC_3125ns = (((uint8_t)0x18)<<POWERSTEP01_TCC_SHIFT), 00411 POWERSTEP01_TCC_3250ns = (((uint8_t)0x19)<<POWERSTEP01_TCC_SHIFT), 00412 POWERSTEP01_TCC_3375ns = (((uint8_t)0x1A)<<POWERSTEP01_TCC_SHIFT), 00413 POWERSTEP01_TCC_3500ns = (((uint8_t)0x1B)<<POWERSTEP01_TCC_SHIFT), 00414 POWERSTEP01_TCC_3625ns = (((uint8_t)0x1C)<<POWERSTEP01_TCC_SHIFT), 00415 POWERSTEP01_TCC_3750ns = (((uint8_t)0x1D)<<POWERSTEP01_TCC_SHIFT), 00416 POWERSTEP01_TCC_3750ns_bis = (((uint8_t)0x1E)<<POWERSTEP01_TCC_SHIFT), 00417 POWERSTEP01_TCC_3750ns_ter = (((uint8_t)0x1F)<<POWERSTEP01_TCC_SHIFT) 00418 } powerstep01_Tcc_t; 00419 00420 /// Igate options (GATECFG1 register of PowerStep01) 00421 typedef enum { 00422 POWERSTEP01_IGATE_4mA = (((uint8_t)0x00)<<POWERSTEP01_IGATE_SHIFT), 00423 POWERSTEP01_IGATE_4mA_Bis = (((uint8_t)0x01)<<POWERSTEP01_IGATE_SHIFT), 00424 POWERSTEP01_IGATE_8mA = (((uint8_t)0x02)<<POWERSTEP01_IGATE_SHIFT), 00425 POWERSTEP01_IGATE_16mA = (((uint8_t)0x03)<<POWERSTEP01_IGATE_SHIFT), 00426 POWERSTEP01_IGATE_24mA = (((uint8_t)0x04)<<POWERSTEP01_IGATE_SHIFT), 00427 POWERSTEP01_IGATE_32mA = (((uint8_t)0x05)<<POWERSTEP01_IGATE_SHIFT), 00428 POWERSTEP01_IGATE_64mA = (((uint8_t)0x06)<<POWERSTEP01_IGATE_SHIFT), 00429 POWERSTEP01_IGATE_96mA = (((uint8_t)0x07)<<POWERSTEP01_IGATE_SHIFT), 00430 } powerstep01_Igate_t; 00431 00432 /// Turn off boost time (TBOOST field of GATECFG1 register of PowerStep01) 00433 typedef enum { 00434 POWERSTEP01_TBOOST_0ns = (((uint8_t)0x00)<<POWERSTEP01_TBOOST_SHIFT), 00435 POWERSTEP01_TBOOST_62_5__83_3__125ns = (((uint8_t)0x01)<<POWERSTEP01_TBOOST_SHIFT), 00436 POWERSTEP01_TBOOST_125ns = (((uint8_t)0x02)<<POWERSTEP01_TBOOST_SHIFT), 00437 POWERSTEP01_TBOOST_250ns = (((uint8_t)0x03)<<POWERSTEP01_TBOOST_SHIFT), 00438 POWERSTEP01_TBOOST_375ns = (((uint8_t)0x04)<<POWERSTEP01_TBOOST_SHIFT), 00439 POWERSTEP01_TBOOST_500ns = (((uint8_t)0x05)<<POWERSTEP01_TBOOST_SHIFT), 00440 POWERSTEP01_TBOOST_750ns = (((uint8_t)0x06)<<POWERSTEP01_TBOOST_SHIFT), 00441 POWERSTEP01_TBOOST_1000ns = (((uint8_t)0x07)<<POWERSTEP01_TBOOST_SHIFT), 00442 } powerstep01_Tboost_t; 00443 00444 /// External clock watchdog (WD_EN field of GATECFG1 register of PowerStep01) 00445 typedef enum { 00446 POWERSTEP01_WD_EN_DISABLE = ((uint16_t)0x0000), 00447 POWERSTEP01_WD_EN_ENABLE = ((uint16_t) ((0x1) << 11)) 00448 } powerstep01_WdEn_t; 00449 00450 00451 /// masks for GATECFG2 register of PowerStep01 00452 typedef enum { 00453 POWERSTEP01_GATECFG2_TDT = ((uint8_t)0x1F), 00454 POWERSTEP01_GATECFG2_TBLANK = ((uint8_t)0xE0) 00455 } powerstep01_GateCfg2Masks_t; 00456 00457 /// Blanking time (TBLANK field of GATECFG2 register of PowerStep01) 00458 typedef enum { 00459 POWERSTEP01_TBLANK_125ns = (((uint8_t)0x00)<<POWERSTEP01_TBLANK_SHIFT), 00460 POWERSTEP01_TBLANK_250ns = (((uint8_t)0x01)<<POWERSTEP01_TBLANK_SHIFT), 00461 POWERSTEP01_TBLANK_375ns = (((uint8_t)0x02)<<POWERSTEP01_TBLANK_SHIFT), 00462 POWERSTEP01_TBLANK_500ns = (((uint8_t)0x03)<<POWERSTEP01_TBLANK_SHIFT), 00463 POWERSTEP01_TBLANK_625ns = (((uint8_t)0x04)<<POWERSTEP01_TBLANK_SHIFT), 00464 POWERSTEP01_TBLANK_750ns = (((uint8_t)0x05)<<POWERSTEP01_TBLANK_SHIFT), 00465 POWERSTEP01_TBLANK_875ns = (((uint8_t)0x06)<<POWERSTEP01_TBLANK_SHIFT), 00466 POWERSTEP01_TBLANK_1000ns = (((uint8_t)0x07)<<POWERSTEP01_TBLANK_SHIFT), 00467 } powerstep01_TBlank_t; 00468 00469 /// Dead time (TDT field of GATECFG2 register of PowerStep01) 00470 typedef enum { 00471 POWERSTEP01_TDT_125ns = (((uint8_t)0x00)<<POWERSTEP01_TDT_SHIFT), 00472 POWERSTEP01_TDT_250ns = (((uint8_t)0x01)<<POWERSTEP01_TDT_SHIFT), 00473 POWERSTEP01_TDT_375ns = (((uint8_t)0x02)<<POWERSTEP01_TDT_SHIFT), 00474 POWERSTEP01_TDT_500ns = (((uint8_t)0x03)<<POWERSTEP01_TDT_SHIFT), 00475 POWERSTEP01_TDT_625ns = (((uint8_t)0x04)<<POWERSTEP01_TDT_SHIFT), 00476 POWERSTEP01_TDT_750ns = (((uint8_t)0x05)<<POWERSTEP01_TDT_SHIFT), 00477 POWERSTEP01_TDT_875ns = (((uint8_t)0x06)<<POWERSTEP01_TDT_SHIFT), 00478 POWERSTEP01_TDT_1000ns = (((uint8_t)0x07)<<POWERSTEP01_TDT_SHIFT), 00479 POWERSTEP01_TDT_1125ns = (((uint8_t)0x08)<<POWERSTEP01_TDT_SHIFT), 00480 POWERSTEP01_TDT_1250ns = (((uint8_t)0x09)<<POWERSTEP01_TDT_SHIFT), 00481 POWERSTEP01_TDT_1375ns = (((uint8_t)0x0A)<<POWERSTEP01_TDT_SHIFT), 00482 POWERSTEP01_TDT_1500ns = (((uint8_t)0x0B)<<POWERSTEP01_TDT_SHIFT), 00483 POWERSTEP01_TDT_1625ns = (((uint8_t)0x0C)<<POWERSTEP01_TDT_SHIFT), 00484 POWERSTEP01_TDT_1750ns = (((uint8_t)0x0D)<<POWERSTEP01_TDT_SHIFT), 00485 POWERSTEP01_TDT_1875ns = (((uint8_t)0x0E)<<POWERSTEP01_TDT_SHIFT), 00486 POWERSTEP01_TDT_2000ns = (((uint8_t)0x0F)<<POWERSTEP01_TDT_SHIFT), 00487 POWERSTEP01_TDT_2125ns = (((uint8_t)0x10)<<POWERSTEP01_TDT_SHIFT), 00488 POWERSTEP01_TDT_2250ns = (((uint8_t)0x11)<<POWERSTEP01_TDT_SHIFT), 00489 POWERSTEP01_TDT_2375ns = (((uint8_t)0x12)<<POWERSTEP01_TDT_SHIFT), 00490 POWERSTEP01_TDT_2500ns = (((uint8_t)0x13)<<POWERSTEP01_TDT_SHIFT), 00491 POWERSTEP01_TDT_2625ns = (((uint8_t)0x14)<<POWERSTEP01_TDT_SHIFT), 00492 POWERSTEP01_TDT_2750ns = (((uint8_t)0x15)<<POWERSTEP01_TDT_SHIFT), 00493 POWERSTEP01_TDT_2875ns = (((uint8_t)0x16)<<POWERSTEP01_TDT_SHIFT), 00494 POWERSTEP01_TDT_3000ns = (((uint8_t)0x17)<<POWERSTEP01_TDT_SHIFT), 00495 POWERSTEP01_TDT_3125ns = (((uint8_t)0x18)<<POWERSTEP01_TDT_SHIFT), 00496 POWERSTEP01_TDT_3250ns = (((uint8_t)0x19)<<POWERSTEP01_TDT_SHIFT), 00497 POWERSTEP01_TDT_3375ns = (((uint8_t)0x1A)<<POWERSTEP01_TDT_SHIFT), 00498 POWERSTEP01_TDT_3500ns = (((uint8_t)0x1B)<<POWERSTEP01_TDT_SHIFT), 00499 POWERSTEP01_TDT_3625ns = (((uint8_t)0x1C)<<POWERSTEP01_TDT_SHIFT), 00500 POWERSTEP01_TDT_3750ns = (((uint8_t)0x1D)<<POWERSTEP01_TDT_SHIFT), 00501 POWERSTEP01_TDT_3875ns = (((uint8_t)0x1E)<<POWERSTEP01_TDT_SHIFT), 00502 POWERSTEP01_TDT_4000ns = (((uint8_t)0x1F)<<POWERSTEP01_TDT_SHIFT) 00503 } powerstep01_Tdt_t; 00504 00505 /// Masks for CONFIG register of Powerstep01 00506 typedef enum { 00507 POWERSTEP01_CONFIG_OSC_SEL = ((uint16_t)0x0007), 00508 POWERSTEP01_CONFIG_EXT_CLK = ((uint16_t)0x0008), 00509 POWERSTEP01_CONFIG_SW_MODE = ((uint16_t)0x0010), 00510 POWERSTEP01_CONFIG_OC_SD = ((uint16_t)0x0080), 00511 POWERSTEP01_CONFIG_UVLOVAL = ((uint16_t)0x0100), 00512 POWERSTEP01_CONFIG_VCCVAL = ((uint16_t)0x0200), 00513 // Masks specific for voltage mode 00514 POWERSTEP01_CONFIG_EN_VSCOMP = ((uint16_t)0x0020), 00515 POWERSTEP01_CONFIG_F_PWM_DEC = ((uint16_t)0x1C00), 00516 POWERSTEP01_CONFIG_F_PWM_INT = ((uint16_t)0xE000), 00517 // Masks specific for current mode 00518 POWERSTEP01_CONFIG_TSW = ((uint16_t)0x7C00), 00519 POWERSTEP01_CONFIG_PRED_EN = ((uint16_t)0x8000) 00520 } powerstep01_ConfigMasks_t; 00521 00522 /// Masks for CONFIG register of Powerstep01 (specific for current mode) 00523 #define POWERSTEP01_CONFIG_EN_TQREG (POWERSTEP01_CONFIG_EN_VSCOMP) 00524 00525 /// Oscillator management (EXT_CLK and OSC_SEL fields of CONFIG register of Powerstep01) 00526 typedef enum { 00527 POWERSTEP01_CONFIG_INT_16MHZ = ((uint16_t)0x0000), 00528 POWERSTEP01_CONFIG_INT_16MHZ_OSCOUT_2MHZ = ((uint16_t)0x0008), 00529 POWERSTEP01_CONFIG_INT_16MHZ_OSCOUT_4MHZ = ((uint16_t)0x0009), 00530 POWERSTEP01_CONFIG_INT_16MHZ_OSCOUT_8MHZ = ((uint16_t)0x000A), 00531 POWERSTEP01_CONFIG_INT_16MHZ_OSCOUT_16MHZ = ((uint16_t)0x000B), 00532 POWERSTEP01_CONFIG_EXT_8MHZ_XTAL_DRIVE = ((uint16_t)0x0004), 00533 POWERSTEP01_CONFIG_EXT_16MHZ_XTAL_DRIVE = ((uint16_t)0x0005), 00534 POWERSTEP01_CONFIG_EXT_24MHZ_XTAL_DRIVE = ((uint16_t)0x0006), 00535 POWERSTEP01_CONFIG_EXT_32MHZ_XTAL_DRIVE = ((uint16_t)0x0007), 00536 POWERSTEP01_CONFIG_EXT_8MHZ_OSCOUT_INVERT = ((uint16_t)0x000C), 00537 POWERSTEP01_CONFIG_EXT_16MHZ_OSCOUT_INVERT = ((uint16_t)0x000D), 00538 POWERSTEP01_CONFIG_EXT_24MHZ_OSCOUT_INVERT = ((uint16_t)0x000E), 00539 POWERSTEP01_CONFIG_EXT_32MHZ_OSCOUT_INVERT = ((uint16_t)0x000F) 00540 } powerstep01_ConfigOscMgmt_t; 00541 00542 /// Oscillator management (EXT_CLK and OSC_SEL fields of CONFIG register of Powerstep01) 00543 typedef enum { 00544 POWERSTEP01_CONFIG_SW_HARD_STOP = ((uint16_t)0x0000), 00545 POWERSTEP01_CONFIG_SW_USER = ((uint16_t)0x0010) 00546 } powerstep01_ConfigSwMode_t; 00547 00548 /// Voltage supply compensation enabling for voltage mode (EN_VSCOMP field of CONFIG register of Powerstep01) 00549 typedef enum { 00550 POWERSTEP01_CONFIG_VS_COMP_DISABLE = ((uint16_t)0x0000), 00551 POWERSTEP01_CONFIG_VS_COMP_ENABLE = ((uint16_t)0x0020) 00552 } powerstep01_ConfigEnVscomp_t; 00553 00554 /// External torque regulation enabling (EN_TQREG field of CONFIG register of Powerstep01) 00555 typedef enum { 00556 POWERSTEP01_CONFIG_TQ_REG_TVAL_USED = ((uint16_t)0x0000), 00557 POWERSTEP01_CONFIG_TQ_REG_ADC_OUT = ((uint16_t)0x0020) 00558 } powerstep01_ConfigEnTqReg_t; 00559 00560 /// Overcurrent shutdown (OC_SD field of CONFIG register of Powerstep01) 00561 typedef enum { 00562 POWERSTEP01_CONFIG_OC_SD_DISABLE = ((uint16_t)0x0000), 00563 POWERSTEP01_CONFIG_OC_SD_ENABLE = ((uint16_t)0x0080) 00564 } powerstep01_ConfigOcSd_t; 00565 00566 /// UVLO thresholds (UVLOVAL field of CONFIG register of Powerstep01) 00567 typedef enum { 00568 POWERSTEP01_CONFIG_UVLOVAL_LOW = ((uint16_t)0x0000), 00569 POWERSTEP01_CONFIG_UVLOVAL_HIGH = ((uint16_t)0x0100), 00570 } powerstep01_ConfigUvLoVal_t; 00571 00572 /// Vcc voltage (VCCVAL field of CONFIG register of Powerstep01) 00573 typedef enum { 00574 POWERSTEP01_CONFIG_VCCVAL_7_5V = ((uint16_t)0x0000), 00575 POWERSTEP01_CONFIG_VCCVAL_15V = ((uint16_t)0x0200) 00576 } powerstep01_ConfigVccVal_t; 00577 00578 /// PWM frequency division factor (F_PWM_INT field of CONFIG register of Powerstep01) 00579 typedef enum { 00580 POWERSTEP01_CONFIG_PWM_DIV_1 = (((uint16_t)0x00)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT), 00581 POWERSTEP01_CONFIG_PWM_DIV_2 = (((uint16_t)0x01)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT), 00582 POWERSTEP01_CONFIG_PWM_DIV_3 = (((uint16_t)0x02)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT), 00583 POWERSTEP01_CONFIG_PWM_DIV_4 = (((uint16_t)0x03)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT), 00584 POWERSTEP01_CONFIG_PWM_DIV_5 = (((uint16_t)0x04)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT), 00585 POWERSTEP01_CONFIG_PWM_DIV_6 = (((uint16_t)0x05)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT), 00586 POWERSTEP01_CONFIG_PWM_DIV_7 = (((uint16_t)0x06)<<POWERSTEP01_CONFIG_PWM_DIV_SHIFT) 00587 } powerstep01_ConfigFPwmInt_t; 00588 00589 /// PWM frequency multiplication factor (F_PWM_DEC field of CONFIG register of Powerstep01) 00590 typedef enum { 00591 POWERSTEP01_CONFIG_PWM_MUL_0_625 = (((uint16_t)0x00)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00592 POWERSTEP01_CONFIG_PWM_MUL_0_75 = (((uint16_t)0x01)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00593 POWERSTEP01_CONFIG_PWM_MUL_0_875 = (((uint16_t)0x02)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00594 POWERSTEP01_CONFIG_PWM_MUL_1 = (((uint16_t)0x03)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00595 POWERSTEP01_CONFIG_PWM_MUL_1_25 = (((uint16_t)0x04)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00596 POWERSTEP01_CONFIG_PWM_MUL_1_5 = (((uint16_t)0x05)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00597 POWERSTEP01_CONFIG_PWM_MUL_1_75 = (((uint16_t)0x06)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT), 00598 POWERSTEP01_CONFIG_PWM_MUL_2 = (((uint16_t)0x07)<<POWERSTEP01_CONFIG_PWM_MUL_SHIFT) 00599 } powerstep01_ConfigFPwmDec_t; 00600 00601 /// Switching period (TSW field of CONFIG register of Powerstep01) 00602 typedef enum { 00603 POWERSTEP01_CONFIG_TSW_004us =(((uint16_t)0x01)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00604 POWERSTEP01_CONFIG_TSW_008us =(((uint16_t)0x02)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00605 POWERSTEP01_CONFIG_TSW_012us =(((uint16_t)0x03)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00606 POWERSTEP01_CONFIG_TSW_016us =(((uint16_t)0x04)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00607 POWERSTEP01_CONFIG_TSW_020us =(((uint16_t)0x05)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00608 POWERSTEP01_CONFIG_TSW_024us =(((uint16_t)0x06)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00609 POWERSTEP01_CONFIG_TSW_028us =(((uint16_t)0x07)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00610 POWERSTEP01_CONFIG_TSW_032us =(((uint16_t)0x08)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00611 POWERSTEP01_CONFIG_TSW_036us =(((uint16_t)0x09)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00612 POWERSTEP01_CONFIG_TSW_040us =(((uint16_t)0x0A)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00613 POWERSTEP01_CONFIG_TSW_044us =(((uint16_t)0x0B)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00614 POWERSTEP01_CONFIG_TSW_048us =(((uint16_t)0x0C)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00615 POWERSTEP01_CONFIG_TSW_052us =(((uint16_t)0x0D)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00616 POWERSTEP01_CONFIG_TSW_056us =(((uint16_t)0x0E)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00617 POWERSTEP01_CONFIG_TSW_060us =(((uint16_t)0x0F)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00618 POWERSTEP01_CONFIG_TSW_064us =(((uint16_t)0x10)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00619 POWERSTEP01_CONFIG_TSW_068us =(((uint16_t)0x11)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00620 POWERSTEP01_CONFIG_TSW_072us =(((uint16_t)0x12)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00621 POWERSTEP01_CONFIG_TSW_076us =(((uint16_t)0x13)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00622 POWERSTEP01_CONFIG_TSW_080us =(((uint16_t)0x14)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00623 POWERSTEP01_CONFIG_TSW_084us =(((uint16_t)0x15)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00624 POWERSTEP01_CONFIG_TSW_088us =(((uint16_t)0x16)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00625 POWERSTEP01_CONFIG_TSW_092us =(((uint16_t)0x17)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00626 POWERSTEP01_CONFIG_TSW_096us =(((uint16_t)0x18)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00627 POWERSTEP01_CONFIG_TSW_100us =(((uint16_t)0x19)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00628 POWERSTEP01_CONFIG_TSW_104us =(((uint16_t)0x1A)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00629 POWERSTEP01_CONFIG_TSW_108us =(((uint16_t)0x1B)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00630 POWERSTEP01_CONFIG_TSW_112us =(((uint16_t)0x1C)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00631 POWERSTEP01_CONFIG_TSW_116us =(((uint16_t)0x1D)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00632 POWERSTEP01_CONFIG_TSW_120us =(((uint16_t)0x1E)<<POWERSTEP01_CONFIG_TSW_SHIFT), 00633 POWERSTEP01_CONFIG_TSW_124us =(((uint16_t)0x1F)<<POWERSTEP01_CONFIG_TSW_SHIFT) 00634 } powerstep01_ConfigTsw_t; 00635 00636 /// Voltage supply compensation enabling for current mode(EN_PRED field of CONFIG register of Powerstep01) 00637 typedef enum { 00638 POWERSTEP01_CONFIG_PRED_DISABLE =((uint16_t)0x0000), 00639 POWERSTEP01_CONFIG_PRED_ENABLE =((uint16_t)0x8000) 00640 } powerstep01_ConfigPredEn_t; 00641 00642 /// Bit mask for STATUS Register of PowerStep01² 00643 typedef enum { 00644 POWERSTEP01_STATUS_HIZ = (((uint16_t)0x0001)), 00645 POWERSTEP01_STATUS_BUSY = (((uint16_t)0x0002)), 00646 POWERSTEP01_STATUS_SW_F = (((uint16_t)0x0004)), 00647 POWERSTEP01_STATUS_SW_EVN = (((uint16_t)0x0008)), 00648 POWERSTEP01_STATUS_DIR = (((uint16_t)0x0010)), 00649 POWERSTEP01_STATUS_MOT_STATUS = (((uint16_t)0x0060)), 00650 POWERSTEP01_STATUS_CMD_ERROR = (((uint16_t)0x0080)), 00651 POWERSTEP01_STATUS_STCK_MOD = (((uint16_t)0x0100)), 00652 POWERSTEP01_STATUS_UVLO = (((uint16_t)0x0200)), 00653 POWERSTEP01_STATUS_UVLO_ADC = (((uint16_t)0x0400)), 00654 POWERSTEP01_STATUS_TH_STATUS = (((uint16_t)0x1800)), 00655 POWERSTEP01_STATUS_OCD = (((uint16_t)0x2000)), 00656 POWERSTEP01_STATUS_STALL_A = (((uint16_t)0x4000)), 00657 POWERSTEP01_STATUS_STALL_B = (((uint16_t)0x8000)) 00658 } powerstep01_StatusMasks_t; 00659 00660 /// Motor state (MOT_STATUS filed of STATUS register of PowerStep01) 00661 typedef enum { 00662 POWERSTEP01_STATUS_MOT_STATUS_STOPPED = (((uint16_t)0x0000)<<POWERSTEP01_STATUS_MOT_STATUS_SHIFT), 00663 POWERSTEP01_STATUS_MOT_STATUS_ACCELERATION = (((uint16_t)0x0001)<<POWERSTEP01_STATUS_MOT_STATUS_SHIFT), 00664 POWERSTEP01_STATUS_MOT_STATUS_DECELERATION = (((uint16_t)0x0002)<<POWERSTEP01_STATUS_MOT_STATUS_SHIFT), 00665 POWERSTEP01_STATUS_MOT_STATUS_CONST_SPD = (((uint16_t)0x0003)<<POWERSTEP01_STATUS_MOT_STATUS_SHIFT) 00666 } powerstep01_Status_t; 00667 00668 /// Powerstep01 internal register addresses 00669 typedef enum { 00670 POWERSTEP01_ABS_POS = ((uint8_t)0x01), 00671 POWERSTEP01_EL_POS = ((uint8_t)0x02), 00672 POWERSTEP01_MARK = ((uint8_t)0x03), 00673 POWERSTEP01_SPEED = ((uint8_t)0x04), 00674 POWERSTEP01_ACC = ((uint8_t)0x05), 00675 POWERSTEP01_DEC = ((uint8_t)0x06), 00676 POWERSTEP01_MAX_SPEED = ((uint8_t)0x07), 00677 POWERSTEP01_MIN_SPEED = ((uint8_t)0x08), 00678 POWERSTEP01_FS_SPD = ((uint8_t)0x15), 00679 POWERSTEP01_KVAL_HOLD = ((uint8_t)0x09), 00680 POWERSTEP01_KVAL_RUN = ((uint8_t)0x0A), 00681 POWERSTEP01_KVAL_ACC = ((uint8_t)0x0B), 00682 POWERSTEP01_KVAL_DEC = ((uint8_t)0x0C), 00683 POWERSTEP01_INT_SPD = ((uint8_t)0x0D), 00684 POWERSTEP01_ST_SLP = ((uint8_t)0x0E), 00685 POWERSTEP01_FN_SLP_ACC = ((uint8_t)0x0F), 00686 POWERSTEP01_FN_SLP_DEC = ((uint8_t)0x10), 00687 POWERSTEP01_K_THERM = ((uint8_t)0x11), 00688 POWERSTEP01_ADC_OUT = ((uint8_t)0x12), 00689 POWERSTEP01_OCD_TH = ((uint8_t)0x13), 00690 POWERSTEP01_STALL_TH = ((uint8_t)0x14), 00691 POWERSTEP01_STEP_MODE = ((uint8_t)0x16), 00692 POWERSTEP01_ALARM_EN = ((uint8_t)0x17), 00693 POWERSTEP01_GATECFG1 = ((uint8_t)0x18), 00694 POWERSTEP01_GATECFG2 = ((uint8_t)0x19), 00695 POWERSTEP01_CONFIG = ((uint8_t)0x1A), 00696 POWERSTEP01_STATUS = ((uint8_t)0x1B) 00697 } powerstep01_Registers_t; 00698 00699 /// Powerstep01 address of register TVAL_HOLD (Current mode only) 00700 #define POWERSTEP01_TVAL_HOLD (POWERSTEP01_KVAL_HOLD ) 00701 /// Powerstep01 address of register TVAL_RUN (Current mode only) 00702 #define POWERSTEP01_TVAL_RUN (POWERSTEP01_KVAL_RUN) 00703 /// Powerstep01 address of register TVAL_HOLD (Current mode only) 00704 #define POWERSTEP01_TVAL_ACC (POWERSTEP01_KVAL_ACC) 00705 /// Powerstep01 address of register TVAL_DEC (Current mode only) 00706 #define POWERSTEP01_TVAL_DEC (POWERSTEP01_KVAL_DEC) 00707 /// Powerstep01 address of register T_FAST (Current mode only) 00708 #define POWERSTEP01_T_FAST (POWERSTEP01_ST_SLP) 00709 /// Powerstep01 address of register TON_MIN (Current mode only) 00710 #define POWERSTEP01_TON_MIN (POWERSTEP01_FN_SLP_ACC) 00711 /// Powerstep01 address of register TOFF_MIN (Current mode only) 00712 #define POWERSTEP01_TOFF_MIN (POWERSTEP01_FN_SLP_DEC) 00713 00714 /// Powerstep01 application commands 00715 typedef enum { 00716 POWERSTEP01_NOP = ((uint8_t)0x00), 00717 POWERSTEP01_SET_PARAM = ((uint8_t)0x00), 00718 POWERSTEP01_GET_PARAM = ((uint8_t)0x20), 00719 POWERSTEP01_RUN = ((uint8_t)0x50), 00720 POWERSTEP01_STEP_CLOCK = ((uint8_t)0x58), 00721 POWERSTEP01_MOVE = ((uint8_t)0x40), 00722 POWERSTEP01_GO_TO = ((uint8_t)0x60), 00723 POWERSTEP01_GO_TO_DIR = ((uint8_t)0x68), 00724 POWERSTEP01_GO_UNTIL = ((uint8_t)0x82), 00725 POWERSTEP01_GO_UNTIL_ACT_CPY = ((uint8_t)0x8A), 00726 POWERSTEP01_RELEASE_SW = ((uint8_t)0x92), 00727 POWERSTEP01_GO_HOME = ((uint8_t)0x70), 00728 POWERSTEP01_GO_MARK = ((uint8_t)0x78), 00729 POWERSTEP01_RESET_POS = ((uint8_t)0xD8), 00730 POWERSTEP01_RESET_DEVICE = ((uint8_t)0xC0), 00731 POWERSTEP01_SOFT_STOP = ((uint8_t)0xB0), 00732 POWERSTEP01_HARD_STOP = ((uint8_t)0xB8), 00733 POWERSTEP01_SOFT_HIZ = ((uint8_t)0xA0), 00734 POWERSTEP01_HARD_HIZ = ((uint8_t)0xA8), 00735 POWERSTEP01_GET_STATUS = ((uint8_t)0xD0), 00736 POWERSTEP01_RESERVED_CMD1 = ((uint8_t)0xEB), 00737 POWERSTEP01_RESERVED_CMD2 = ((uint8_t)0xF8) 00738 } powerstep01_Commands_t; 00739 00740 /** @defgroup Motor_Driver_Initialization_Structure Motor Driver Initialization Structure 00741 * @{ 00742 */ 00743 /* ACTION --------------------------------------------------------------------* 00744 * Declare here the component's initialization structure, if any, one * 00745 * variable per line without initialization. * 00746 * * 00747 * Example: * 00748 * typedef struct * 00749 * { * 00750 * int frequency; * 00751 * int update_mode; * 00752 * } COMPONENT_init_t; * 00753 *----------------------------------------------------------------------------*/ 00754 ///Initialization parameters structure common to current and voltage modes 00755 typedef struct 00756 { 00757 ///Current or voltage mode selection 00758 powerstep01_CmVm_t cmVmSelection; 00759 ///Acceleration 00760 float acceleration; 00761 ///Deceleration 00762 float deceleration; 00763 ///Maximum speed 00764 float maxSpeed; 00765 ///Minimum speed 00766 float minSpeed; 00767 ///Low speed optimization bit 00768 powerstep01_LspdOpt_t lowSpeedOptimization; 00769 ///Full step speed 00770 float fullStepSpeed; 00771 ///Boost mode bit 00772 powerstep01_BoostMode_t boostMode; 00773 ///Over current detection threshold 00774 float ocdThreshold; 00775 ///Step mode 00776 motorStepMode_t stepMode; 00777 ///Sync clock selection 00778 powerstep01_SyncSel_t syncClockSelection; 00779 ///Alarm selection 00780 uint8_t alarmsSelection; 00781 ///Sink or source current used by gate driving circuitry 00782 powerstep01_Igate_t iGate; 00783 ///Duration of the overboost phase during gate turn-off 00784 powerstep01_Tboost_t tBoost; 00785 ///Duration of constant current phase during gate turn-on and turn-off 00786 powerstep01_Tcc_t tcc; 00787 ///Clock source monitoring enable bit 00788 powerstep01_WdEn_t wdEn; 00789 ///Duration of the blanking of the current sensing comparators 00790 powerstep01_TBlank_t tBlank; 00791 ///Deadtime duration between gate turn-off and opposite gate turn-on 00792 powerstep01_Tdt_t tdt; 00793 } commonParameters_t; 00794 00795 ///Initialization parameters structure for voltage mode 00796 typedef struct 00797 { 00798 ///Parameters common to current and voltage modes 00799 commonParameters_t cp; 00800 ///Voltage amplitude regulation when the motor is stopped 00801 float kvalHold; 00802 ///Voltage amplitude regulation when the motor is running at constant speed 00803 float kvalRun; 00804 ///Voltage amplitude regulation during motor acceleration 00805 float kvalAcc; 00806 ///Voltage amplitude regulation during motor deceleration 00807 float kvalDec; 00808 ///Speed value at which the BEMF compensation curve changes slope 00809 float intersectSpeed; 00810 ///BEMF compensation curve slope when speed is lower than intersect speed 00811 float startSlope; 00812 ///BEMF compensation curve slope when speed is greater than intersect speed during acceleration 00813 float accelerationFinalSlope; 00814 ///BEMF compensation curve slope when speed is greater than intersect speed during deceleration 00815 float decelerationFinalSlope; 00816 ///Winding resistance thermal drift compensation coefficient 00817 float thermalCompensationFactor; 00818 ///Stall detection threshold 00819 float stallThreshold; 00820 ///System clock source management 00821 powerstep01_ConfigOscMgmt_t oscClkSel; 00822 ///External switch to act as hard_stop interrupt or not 00823 powerstep01_ConfigSwMode_t swMode; 00824 ///Motor supply voltage compensation enable bit 00825 powerstep01_ConfigEnVscomp_t enVsComp; 00826 ///Overcurrent event causes or not the bridges to turn-off 00827 powerstep01_ConfigOcSd_t ocSd; 00828 ///UVLO protection thresholds 00829 powerstep01_ConfigUvLoVal_t uvloVal; 00830 ///Internal VCC regulator output voltage 00831 powerstep01_ConfigVccVal_t vccVal; 00832 ///Integer division factor of PWM frequency generation 00833 powerstep01_ConfigFPwmInt_t fPwmInt; 00834 ///Multiplication factor of PWM frequency generation 00835 powerstep01_ConfigFPwmDec_t fPwmDec; 00836 } powerstep01_VoltageMode_init_t; 00837 00838 ///Initialization parameters structure for current mode 00839 typedef struct 00840 { 00841 ///Parameters common to current and voltage modes 00842 commonParameters_t cp; 00843 ///Torque regulation DAC reference voltage when motor is stopped 00844 float tvalHold; 00845 ///Torque regulation DAC reference voltage when motor is runnig at constant speed 00846 float tvalRun; 00847 ///Torque regulation DAC reference voltage during motor acceleration 00848 float tvalAcc; 00849 ///Torque regulation DAC reference voltage during motor deceleration 00850 float tvalDec; 00851 ///Maximum fast decay time 00852 powerstep01_ToffFast_t toffFast; 00853 ///Maximum fall step time 00854 powerstep01_FastStep_t fastStep; 00855 ///Minimum on-time 00856 float tonMin; 00857 ///Minimum off-time 00858 float toffMin; 00859 ///System clock source management 00860 powerstep01_ConfigOscMgmt_t oscClkSel; 00861 ///External switch to act as hard_stop interrupt or not 00862 powerstep01_ConfigSwMode_t swMode; 00863 ///Peak current is adjusted through the ADCIN input or not 00864 powerstep01_ConfigEnTqReg_t tqReg; 00865 ///Motor supply voltage compensation enable bit 00866 powerstep01_ConfigEnVscomp_t enVsComp; 00867 ///Overcurrent event causes or not the bridges to turn-off 00868 powerstep01_ConfigOcSd_t ocSd; 00869 ///UVLO protection thresholds 00870 powerstep01_ConfigUvLoVal_t uvloVal; 00871 ///Internal VCC regulator output voltage 00872 powerstep01_ConfigVccVal_t vccVal; 00873 ///target switching period 00874 powerstep01_ConfigTsw_t tsw; 00875 ///predictive current control method enable bit 00876 powerstep01_ConfigPredEn_t predEn; 00877 00878 } powerstep01_CurrentMode_init_t; 00879 00880 ///Union of current and volatge modes initialization parameters structures 00881 typedef union powerstep01_init_u powerstep01_init_u_t; 00882 union powerstep01_init_u 00883 { 00884 ///Initialization parameters structure for current mode 00885 powerstep01_CurrentMode_init_t cm; 00886 ///Initialization parameters structure for voltage mode 00887 powerstep01_VoltageMode_init_t vm; 00888 }; 00889 /** 00890 * @} 00891 */ 00892 00893 /** 00894 * @brief Powerstep01 driver data structure definition. 00895 */ 00896 /* ACTION --------------------------------------------------------------------* 00897 * Declare here the structure of component's data, if any, one variable per * 00898 * line without initialization. * 00899 * * 00900 * Example: * 00901 * typedef struct * 00902 * { * 00903 * int T0_out; * 00904 * int T1_out; * 00905 * float T0_degC; * 00906 * float T1_degC; * 00907 * } COMPONENT_Data_t; * 00908 *----------------------------------------------------------------------------*/ 00909 00910 /** 00911 * @} 00912 */ 00913 00914 /* Functions -----------------------------------------------------------------*/ 00915 00916 /** @defgroup Powerstep01_Board_Linked_Functions Powerstep01 Board Linked Functions 00917 * @{ 00918 */ 00919 00920 /* ACTION --------------------------------------------------------------------* 00921 * Declare here extern platform-dependent APIs you might need (e.g.: I/O and * 00922 * interrupt related functions), and implement them in a glue-logic file on * 00923 * the target environment, for example within the "x_nucleo_board.c" file. * 00924 * E.g.: * 00925 * extern status_t COMPONENT_IO_Init (void *handle); * 00926 * extern status_t COMPONENT_IO_Read (handle, buf, regadd, bytes); * 00927 * extern status_t COMPONENT_IO_Write(handle, buf, regadd, bytes); * 00928 * extern void COMPONENT_IO_ITConfig(void); * 00929 *----------------------------------------------------------------------------*/ 00930 ///Delay of the requested number of milliseconds 00931 extern void Powerstep01_Board_Delay(void *handle, uint32_t delay); 00932 ///Enable Irq 00933 extern void Powerstep01_Board_EnableIrq(void *handle); 00934 ///Disable Irq 00935 extern void Powerstep01_Board_DisableIrq(void *handle); 00936 ///init the timer for the step clock 00937 extern void Powerstep01_Board_StepClockInit(void *handle); 00938 ///Set the Powerstep01 reset pin (high logic level) 00939 extern void Powerstep01_Board_ReleaseReset(void *handle); 00940 ///Reset the Powerstep01 reset pin (low logic level) 00941 extern void Powerstep01_Board_Reset(void *handle); 00942 ///Write bytes to the Powerstep01s via SPI 00943 extern uint8_t Powerstep01_Board_SpiWriteBytes(void *handle, uint8_t *pByteToTransmit, uint8_t *pReceivedByte); 00944 00945 00946 /** 00947 * @} 00948 */ 00949 00950 /** 00951 * @} 00952 */ 00953 00954 /** 00955 * @} 00956 */ 00957 00958 #ifdef __cplusplus 00959 } 00960 #endif 00961 00962 #endif /* #ifndef _POWERSTEP01_H_INCLUDED */ 00963 00964 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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X-NUCLEO-IHM03A1 High Power Stepper Motor Driver