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Library to handle the X-NUCLEO-CCA01M1 Sound Terminal Expansion Board.
Dependencies: ST_I2S X_NUCLEO_COMMON
Dependents: HelloWorld_CCA01M1 HelloWorld_CCA01M1_mbedOS HelloWorld_CCA01M1_mbedOS Karaoke_CCA01M1_CCA02M1_mbedOS ... more
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STA350BW_def.h
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00001 /** 00002 ****************************************************************************** 00003 * @file STA350BW_def.h 00004 * @author Central Labs 00005 * @version V1.0.0 00006 * @date 18-August-2015 00007 * @brief This file contains definitions for STA350BW.c 00008 * firmware driver. 00009 ****************************************************************************** 00010 * @attention 00011 * 00012 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> 00013 * 00014 * Redistribution and use in source and binary forms, with or without modification, 00015 * are permitted provided that the following conditions are met: 00016 * 1. Redistributions of source code must retain the above copyright notice, 00017 * this list of conditions and the following disclaimer. 00018 * 2. Redistributions in binary form must reproduce the above copyright notice, 00019 * this list of conditions and the following disclaimer in the documentation 00020 * and/or other materials provided with the distribution. 00021 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00022 * may be used to endorse or promote products derived from this software 00023 * without specific prior written permission. 00024 * 00025 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00026 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00027 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00028 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00029 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00030 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00031 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00032 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00033 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00034 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00035 * 00036 ****************************************************************************** 00037 */ 00038 00039 00040 /* Define to prevent recursive inclusion -------------------------------------*/ 00041 00042 #ifndef __STA350BW_H 00043 #define __STA350BW_H 00044 00045 #ifdef __cplusplus 00046 extern "C" { 00047 #endif 00048 00049 00050 /* Includes ------------------------------------------------------------------*/ 00051 00052 #include "../Common/sound_terminal.h" 00053 00054 /** @addtogroup BSP 00055 * @{ 00056 */ 00057 00058 /** @addtogroup Components 00059 * @{ 00060 */ 00061 00062 /** @addtogroup STA350BW 00063 * @{ 00064 */ 00065 00066 00067 /** @defgroup STA350BW_Exported_Constants 00068 * @{ 00069 */ 00070 00071 /** @defgroup STA350BW_Registers_Mapping 00072 * @brief STA350BW register mapping 00073 * @{ 00074 */ 00075 00076 #define STA350BW_MAX_REGISTERS ((uint8_t)0x56) 00077 00078 /** 00079 * @brief Configuration Register A 00080 * \code 00081 * Read/Write 00082 * Default value: 0x63 00083 * 7 FAULT detect recovery bypass 00084 * 6 TWAB Thermal warning adjustable bypass 00085 * 5 TWRB Thermal warning recovery bypass 00086 * 4,3 IR Interpolatio ratio 00087 * [2:0] MCS Master clock selection 00088 * \endcode 00089 */ 00090 #define STA350BW_CONF_REGA ((uint8_t)0x00) /*Configuration Register A*/ 00091 00092 /** 00093 * @brief Configuration Register B 00094 * \code 00095 * Read/Write 00096 * Default value: 0x80 00097 * 7 C2IM channel 2 input mapping 00098 * 6 C2IM channel 1 input mapping 00099 * 5 DSCKE Delay serial clock enable 00100 * 4 SAIFB Serial data first bit 00101 * [3:0] Serial Input interface format 00102 * \endcode 00103 */ 00104 #define STA350BW_CONF_REGB ((uint8_t)0x01) /*Configuration Register B*/ 00105 00106 00107 /** 00108 * @brief Configuration Register C 00109 * \code 00110 * Read/write 00111 * Default value: 0x09F 00112 * 7 OCRB Overcurrent warning adjustment bypass 00113 * [5:2] CSZx: FFX compensating pulse size 00114 * [1:0] OMx: FFX Output mode 00115 * 0 Clk_Out: Enable HSE on MCO. 0: MCO disable. 1: MCO enable 00116 * \endcode 00117 */ 00118 #define STA350BW_CONF_REGC ((uint8_t)0x02) /*Configuration Register C*/ 00119 00120 /** 00121 * @brief I2C address Configuration Register D 00122 * \code 00123 * Read/write 00124 * Default value: 0x40 00125 * 7 SME soft mute enable 00126 * 6 ZDE zero detect enable 00127 * 5 DRC DRC or anti-clipping mode 00128 * 4 BQL Biquad Link 00129 * 3 PSL Post scale Link 00130 * 2 DSPB DSP bypass 00131 * 1 DEMP De-Emphasys filter 00132 * 0 HPB High pass filter bypass 00133 * \endcode 00134 */ 00135 #define STA350BW_CONF_REGD ((uint8_t)0x03) /*Configuration Register D*/ 00136 00137 /** 00138 * @brief I2C address Configuration Register E 00139 * \code 00140 * Read/write 00141 * Default value: 0xC2 00142 * 7 SVE soft volume enable 00143 * 6 ZCE zero crossing enable 00144 * 5 DCCV variable distorsion compensation 00145 * 4 PWMS PWM speed 00146 * 3 AME AM noise reduction enable 00147 * 2 NSBW Noise shaper bandwidth 00148 * 1 MPC Max Power correction 00149 * 0 MPCV Variable ax power correction 00150 * \endcode 00151 */ 00152 #define STA350BW_CONF_REGE ((uint8_t)0x04) /*Configuration Register E*/ 00153 00154 /** 00155 * @brief I2C address Configuration Register F 00156 * \code 00157 * Read/write 00158 * Default value: 0x5C 00159 * 7 EAPD External Amplifier Power Down 00160 * 6 PWDN device power down 00161 * 5 ECLE Auto EAPD on clock loss 00162 * 4 LDTE LRCK double trigger protection 00163 * 3 BCLE Binary out mode clock loss detection 00164 * 2 IDE Invalid Input Detect 00165 * 1,0 OCFG Output configuration 00166 * \endcode 00167 */ 00168 #define STA350BW_CONF_REGF ((uint8_t)0x05) /*Configuration Register F*/ 00169 00170 /** 00171 * @brief I2C address MUTE/Line Out configuration 00172 * \code 00173 * Read/write 00174 * Default value: 0x10 00175 * [7:6] LOC line out configuration 00176 * [5:4] RESERVED 00177 * 3 C3M Channel 3 MUTE 00178 * 2 C2M Channel 2 MUTE 00179 * 1 C1M Channel 1 MUTE 00180 * 0 MMUTE Master Mute 00181 * \endcode 00182 */ 00183 #define STA350BW_MUTE ((uint8_t)0x06) /* MUTE / Lineout configuration */ 00184 00185 /** 00186 * @brief I2C address Master Volume 00187 * \code 00188 * Read/write 00189 * Default value: 0xFF 00190 * [7:0] Master volume (default -127.5dB) 00191 * \endcode 00192 */ 00193 #define STA350BW_MVOL ((uint8_t)0x07) /* Master Volume */ 00194 00195 /** 00196 * @brief I2C address Channel 1 Volume 00197 * \code 00198 * Read/write 00199 * Default value: 0x60 00200 * [7:0] Master volume (default 0.0dB) 00201 * \endcode 00202 */ 00203 #define STA350BW_C1VOL ((uint8_t)0x08) /* Channel 1 volume */ 00204 00205 /** 00206 * @brief I2C address Channel 2 Volume 00207 * \code 00208 * Read/write 00209 * Default value: 0x60 00210 * [7:0] Master volume (default 0.0dB) 00211 * \endcode 00212 */ 00213 #define STA350BW_C2VOL ((uint8_t)0x09) /* Channel 2 volume */ 00214 00215 /** 00216 * @brief I2C address Channel 3 Volume 00217 * \code 00218 * Read/write 00219 * Default value: 0x60 00220 * [7:0] Master volume (default 0.0dB) 00221 * \endcode 00222 */ 00223 #define STA350BW_C3VOL ((uint8_t)0x0A) /* Channel 3 volume */ 00224 00225 /** 00226 * @brief I2C address AUTO MODE 1 00227 * \code 00228 * Read/write 00229 * Default value: 0x80 00230 * [7:6] RESERVED 00231 * [5:4] AMGC Audio Preset Gain compression 00232 * [3:0] RESERVED 00233 * \endcode 00234 */ 00235 #define STA350BW_AUTO1 ((uint8_t)0x0B) /* Audio Preset 1 register */ 00236 00237 /** 00238 * @brief I2C address AUTO MODE 2 00239 * \code 00240 * Read/write 00241 * Default value: 0x00 00242 * [7:4] XO preset crossover filter 00243 * [3:1] AMAMx AM atomode settings 00244 * 0 AMAME AM automode enable 00245 * \endcode 00246 */ 00247 #define STA350BW_AUTO2 ((uint8_t)0x0C) /* Audio Preset 2 register */ 00248 00249 /** 00250 * @brief I2C address Channel 1 configuration register 00251 * \code 00252 * Read/write 00253 * Default value: 0x00 00254 * 7,6 C1OM Channel 1 output mapping 00255 * 5,4 C1LS Channel 1 limiter mapping 00256 * 3 C1BO Channel 1 Binary output 00257 * 2 C1VPB Channel 1 volume bypass 00258 * 1 C1EQBP Channel 1 Equalization Bypass 00259 * 0 C1TCB Channel 1 Tone/Control Bypass 00260 * \endcode 00261 */ 00262 #define STA350BW_C1CFG ((uint8_t)0x0E) /* Channel 1 configuration register */ 00263 00264 /** 00265 * @brief I2C address Channel 2 configuration register 00266 * \code 00267 * Read/write 00268 * Default value: 0x40 00269 * 7,6 C2OM Channel 2 output mapping 00270 * 5,4 C2LS Channel 2 limiter mapping 00271 * 3 C2BO Channel 2 Binary output 00272 * 2 C2VPB Channel 2 volume bypass 00273 * 1 C2EQBP Channel 2 Equalization Bypass 00274 * 0 C2TCB Channel 2 Tone/Control Bypass 00275 * \endcode 00276 */ 00277 #define STA350BW_C2CFG ((uint8_t)0x0F) /* Channel 2 configuration register */ 00278 00279 /** 00280 * @brief I2C address Channel 3 configuration register 00281 * \code 00282 * Read/write 00283 * Default value: 0x80 00284 * 7,6 C2OM Channel 3 output mapping 00285 * 5,4 C2LS Channel 3 limiter mapping 00286 * 3 C2BO Channel 3 Binary output 00287 * 2 C2VPB Channel 3 volume bypass 00288 * 1,0 RESERVED 00289 * \endcode 00290 */ 00291 #define STA350BW_C3CFG ((uint8_t)0x10) /* Channel 3 configuration register */ 00292 00293 /** 00294 * @brief I2C address Tone control register 00295 * \code 00296 * Read/write 00297 * Default value: 0x77 00298 * [7:4] Treble 00299 * [3:0] Bass 00300 * \endcode 00301 */ 00302 #define STA350BW_TONE ((uint8_t)0x11) /* Tone control register */ 00303 00304 /** 00305 * @brief I2C address Limiter 1 Attack/Release rate register 00306 * \code 00307 * Read/write 00308 * Default value: 0x6A 00309 * [7:4] Limiter 1 Attack rate 00310 * [3:0] Limiter 1 release rate 00311 * \endcode 00312 */ 00313 #define STA350BW_L1AR ((uint8_t)0x12) /* Limiter 1 Attack/Release rate register */ 00314 00315 /** 00316 * @brief I2C address Limiter 1 Attack/Release threshold register 00317 * \code 00318 * Read/write 00319 * Default value: 0x69 00320 * [7:4] Limiter 1 Attack threshold 00321 * [3:0] Limiter 1 release threshold 00322 * \endcode 00323 */ 00324 #define STA350BW_L1ATR ((uint8_t)0x13) /* Limiter 1 Attack/Release threshold register */ 00325 00326 /** 00327 * @brief I2C address Limiter 2 Attack/Release rate register 00328 * \code 00329 * Read/write 00330 * Default value: 0x6A 00331 * [7:4] Limiter 2 Attack rate 00332 * [3:0] Limiter 2 Release rate 00333 * \endcode 00334 */ 00335 #define STA350BW_L2AR ((uint8_t)0x14) /* Limiter 2 Attack/Release rate register */ 00336 00337 /** 00338 * @brief I2C address Limiter 2 Attack/Release threshold register 00339 * \code 00340 * Read/write 00341 * Default value: 0x69 00342 * [7:4] Limiter 2 Attack threshold 00343 * [3:0] Limiter 2 release threshold 00344 * \endcode 00345 */ 00346 #define STA350BW_L2ATR ((uint8_t)0x15) /* Limiter 2 Attack/Release threshold register */ 00347 00348 /* RAM download*/ 00349 00350 /** 00351 * @brief I2C address Coefficient address register 00352 * \code 00353 * Read/write 00354 * Default value: 0x00 00355 * [7:6] RESERVED 00356 * [5:0] RAM address 00357 * \endcode 00358 */ 00359 #define STA350BW_CFADDR ((uint8_t)0x16) /* Coefficient address register */ 00360 00361 /** 00362 * @brief I2C address Coefficient b1 data register bits 23:16 00363 * \code 00364 * Read/write 00365 * Default value: 0x00 00366 * [7:0] coefficient b1 bits 23:16 00367 * \endcode 00368 */ 00369 #define STA350BW_B1CF1 ((uint8_t)0x17) /* Coefficient b1 data register bits 23:16 */ 00370 00371 /** 00372 * @brief I2C address Coefficient b1 data register bits 15:8 00373 * \code 00374 * Read/write 00375 * Default value: 0x00 00376 * [7:0] coefficient b1 bits 15:8 00377 * \endcode 00378 */ 00379 #define STA350BW_B1CF2 ((uint8_t)0x18) /* Coefficient b1 data register bits 15:8 */ 00380 00381 /** 00382 * @brief I2C address Coefficient b1 data register bits 7:0 00383 * \code 00384 * Read/write 00385 * Default value: 0x00 00386 * [7:0] coefficient b1 bits 7:0 00387 * \endcode 00388 */ 00389 #define STA350BW_B1CF3 ((uint8_t)0x19) /* Coefficient b1 data register bits 7:0 */ 00390 00391 /** 00392 * @brief I2C address Coefficient b2 data register bits 23:16 00393 * \code 00394 * Read/write 00395 * Default value: 0x00 00396 * [7:0] coefficient b2 bits 23:16 00397 * \endcode 00398 */ 00399 #define STA350BW_B2CF1 ((uint8_t)0x1A) /* Coefficient b2 data register bits 23:16 */ 00400 00401 /** 00402 * @brief I2C address Coefficient b2 data register bits 15:8 00403 * \code 00404 * Read/write 00405 * Default value: 0x00 00406 * [7:0] coefficient b2 bits 15:8 00407 * \endcode 00408 */ 00409 #define STA350BW_B2CF2 ((uint8_t)0x1B) /* Coefficient b2 data register bits 15:8 */ 00410 00411 /** 00412 * @brief I2C address Coefficient b2 data register bits 7:0 00413 * \code 00414 * Read/write 00415 * Default value: 0x00 00416 * [7:0] Coefficient b2 data bits 7:0 00417 * \endcode 00418 */ 00419 #define STA350BW_B2CF3 ((uint8_t)0x1C) /* Coefficient b2 data register bits 7:0 */ 00420 00421 /** 00422 * @brief I2C address Coefficient a1 data register bits 23:16 00423 * \code 00424 * Read/write 00425 * Default value: 0x00 00426 * [7:0] Coefficient a1 data bits 23:16 00427 * \endcode 00428 */ 00429 #define STA350BW_A1CF1 ((uint8_t)0x1D) /* Coefficient a1 data register bits 23:16 */ 00430 00431 /** 00432 * @brief I2C address Coefficient a1 data register bits 15:8 00433 * \code 00434 * Read/write 00435 * Default value: 0x00 00436 * [7:0] Coefficient a1 data bits 15:8 00437 * \endcode 00438 */ 00439 #define STA350BW_A1CF2 ((uint8_t)0x1E) /* Coefficient a1 data register bits 15:8 */ 00440 00441 /** 00442 * @brief I2C address Coefficient a1 data register bits 7:0 00443 * \code 00444 * Read/write 00445 * Default value: 0x00 00446 * [7:0] Coefficient a1 data bits 7:0 00447 * \endcode 00448 */ 00449 #define STA350BW_A1CF3 ((uint8_t)0x1F) /* Coefficient a1 data register bits 7:0 */ 00450 00451 /** 00452 * @brief I2C address Coefficient a2 data register bits 23:16 00453 * \code 00454 * Read/write 00455 * Default value: 0x00 00456 * [7:0] Coefficient a2 data bits 23:16 00457 * \endcode 00458 */ 00459 #define STA350BW_A2CF1 ((uint8_t)0x20) /* Coefficient a2 data register bits 23:16 */ 00460 00461 /** 00462 * @brief I2C address Coefficient a2 data register bits 15:8 00463 * \code 00464 * Read/write 00465 * Default value: 0x00 00466 * [7:0] Coefficient a2 data bits 15:8 00467 * \endcode 00468 */ 00469 #define STA350BW_A2CF2 ((uint8_t)0x21) /* Coefficient a2 data register bits 15:8 */ 00470 00471 /** 00472 * @brief I2C address Coefficient a2 data register bits 7:0 00473 * \code 00474 * Read/write 00475 * Default value: 0x00 00476 * [7:0] Coefficient a2 data bits 7:0 00477 * \endcode 00478 */ 00479 #define STA350BW_A2CF3 ((uint8_t)0x22) /* Coefficient a2 data register bits 7:0 */ 00480 00481 /** 00482 * @brief I2C address Coefficient b0 data register bits 23:16 00483 * \code 00484 * Read/write 00485 * Default value: 0x00 00486 * [7:0] coefficient b0 bits 23:16 00487 * \endcode 00488 */ 00489 #define STA350BW_B0CF1 ((uint8_t)0x23) /* Coefficient b0 data register bits 23:16 */ 00490 00491 /** 00492 * @brief I2C address Coefficient b0 data register bits 15:8 00493 * \code 00494 * Read/write 00495 * Default value: 0x00 00496 * [7:0] Coefficient b0 data bits 15:8 00497 * \endcode 00498 */ 00499 #define STA350BW_B0CF2 ((uint8_t)0x24) /* Coefficient b0 data register bits 15:8 */ 00500 00501 /** 00502 * @brief I2C address Coefficient b0 data register bits 7:0 00503 * \code 00504 * Read/write 00505 * Default value: 0x00 00506 * [7:0] Coefficient b0 data bits 7:0 00507 * \endcode 00508 */ 00509 #define STA350BW_B0CF3 ((uint8_t)0x25) /* Coefficient b0 data register bits 7:0 */ 00510 00511 /** 00512 * @brief I2C address Coefficient write/read control register 00513 * \code 00514 * Read/write 00515 * Default value: 0x00 00516 * [7:4] RESERVED 00517 * 3 RA read a complete set of coefficient 00518 * 2 R1 read only one coefficient 00519 * 1 WA write a complete set of coefficient 00520 * 0 W1 write only one coefficient 00521 * \endcode 00522 */ 00523 #define STA350BW_CFUD ((uint8_t)0x26) /* Coefficient write/read control register */ 00524 00525 00526 /** 00527 * @brief I2C address Variable max power correction 15:8 00528 * \code 00529 * Read/write 00530 * Default value: 0x1A 00531 * [7:0] Coefficient for Variable max power correction 15:8 00532 * \endcode 00533 */ 00534 #define STA350BW_MPCC1 ((uint8_t)0x27) /* Variable max power correction 15:8 register*/ 00535 00536 /** 00537 * @brief I2C address Variable max power correction 7:0 00538 * \code 00539 * Read/write 00540 * Default value: 0x30 00541 * [7:0] Coefficient for Variable max power correction 7:0 00542 * \endcode 00543 */ 00544 #define STA350BW_MPCC2 ((uint8_t)0x28) /* Variable max power correction 7:0 register*/ 00545 00546 /** 00547 * @brief I2C address Variable distortion compensation 15:8 00548 * \code 00549 * Read/write 00550 * Default value: 0xF3 00551 * [7:0] Coefficient for Variable distortion compensation 15:8 00552 * \endcode 00553 */ 00554 #define STA350BW_DCC1 ((uint8_t)0x29) /* Variable distortion compensation 15:8 */ 00555 00556 /** 00557 * @brief I2C address Variable distortion compensation 7:0 00558 * \code 00559 * Read/write 00560 * Default value: 0x33 00561 * [7:0] Coefficient for Variable distortion compensation 7:0 00562 * \endcode 00563 */ 00564 #define STA350BW_DCC2 ((uint8_t)0x2A) /* Variable distortion compensation 7:0 */ 00565 00566 /** 00567 * @brief I2C address Fault detect recovery constant register 15:8 00568 * \code 00569 * Read/write 00570 * Default value: 0x00 00571 * [7:0] Fault detect recovery constant 15:8 00572 * \endcode 00573 */ 00574 #define STA350BW_FDRC1 ((uint8_t)0x2B) /* Fault detect recovery constant register 15:8 */ 00575 00576 /** 00577 * @brief I2C address Fault detect recovery constant register 7:0 00578 * \code 00579 * Read/write 00580 * Default value: 0xC0 00581 * [7:0] Fault detect recovery constant 7:0 00582 * \endcode 00583 */ 00584 #define STA350BW_FDRC2 ((uint8_t)0x2C) /* Fault detect recovery constant register 7:0 */ 00585 00586 /** 00587 * @brief I2C address Status Register 00588 * \code 00589 * Read 00590 * Default value: 0x7F 00591 * 7 PLLUL PLL unlock 00592 * 6 FAULT Fault detected on bridge 00593 * 5 UVFAULT undervoltage fault 00594 * 4 OVFAULT overvoltage fault 00595 * 3 OCFAULT overcurrent fault 00596 * 2 OCWARN overcurrent warning 00597 * 1 TFAULT Thermal fault 00598 * 0 TWARN thermal warning 00599 * \endcode 00600 */ 00601 #define STA350BW_STATUS ((uint8_t)0x2D) /* Status Register */ 00602 00603 /** 00604 * @brief I2C address EQ coefficients and DRC configuration register 00605 * \code 00606 * Read/write 00607 * Default value: 0x00 00608 * 7 XOB Crossover filter bypass 00609 * [6:5] RESERVED 00610 * [4:3] AMGC Anti-clipping and DRC preset 00611 * 2 RESERVED 00612 * [1:0] EQ RAM bank selector 00613 * \endcode 00614 */ 00615 #define STA350BW_EQCFG ((uint8_t)0x31) /* EQ coefficients and DRC configuration register */ 00616 00617 /** 00618 * @brief I2C address Limiter 1 extended attack threshold register 00619 * \code 00620 * Read/write 00621 * Default value: 0x30 00622 * 7 EATHEN1 Limiter 1 Extended Attack threshold enable 00623 * [6:0] EATH1 Limiter 1 Extended Attack threshold 00624 * \endcode 00625 */ 00626 #define STA350BW_EATH1 ((uint8_t)0x32) /* Limiter 1 extended attack threshold register */ 00627 00628 /** 00629 * @brief I2C address Limiter 1 extended release threshold register 00630 * \code 00631 * Read/write 00632 * Default value: 0x30 00633 * 7 ERTHEN1 Limiter 1 Extended Release threshold enable 00634 * [6:0] ERTH1 Limiter 1 Extended Release threshold 00635 * \endcode 00636 */ 00637 #define STA350BW_ERTH1 ((uint8_t)0x33) /* Limiter 1 extended release threshold register */ 00638 00639 /** 00640 * @brief I2C address Limiter 2 extended attack threshold register 00641 * \code 00642 * Read/write 00643 * Default value: 0x30 00644 * 7 EATHEN2 Limiter 2 Extended Attack threshold enable 00645 * [6:0] EATH2 Limiter 2 Extended Attack threshold 00646 * \endcode 00647 */ 00648 #define STA350BW_EATH2 ((uint8_t)0x34) /* Limiter 2 extended attack threshold register */ 00649 00650 /** 00651 * @brief I2C address Limiter 2 extended release threshold register 00652 * \code 00653 * Read/write 00654 * Default value: 0x30 00655 * 7 ERTHEN2 Limiter 2 Extended Release threshold enable 00656 * [6:0] ERTH2 Limiter 2 Extended Release threshold 00657 * \endcode 00658 */ 00659 #define STA350BW_ERTH2 ((uint8_t)0x35) /* Limiter 2 extended release threshold register */ 00660 00661 /** 00662 * @brief I2C address Extended configuration register 00663 * \code 00664 * Read/write 00665 * Default value: 0x00 00666 * [7:6] MDRC MDRC or EQ DRC selector 00667 * 5 PS48DB Extended post-scale range 00668 * 4 Extended attack rate Limiter 1 00669 * 3 Extended attack rate Limiter 2 00670 * 2 Biquad 5 enable 00671 * 1 Biquad 6 enable 00672 * 0 Biquad 7 enable 00673 * \endcode 00674 */ 00675 #define STA350BW_CONFX ((uint8_t)0x36) /* Extended configuration register */ 00676 00677 /** 00678 * @brief I2C address soft-volume up configuration register 00679 * \code 00680 * Read/write 00681 * Default value: 0x00 00682 * [7:6] RESERVED 00683 * 5 SVUPE Soft volume up enable 00684 * [4:0] SVUP Soft volume up coefficient 00685 * \endcode 00686 */ 00687 #define STA350BW_SVCA ((uint8_t)0x37) /* soft-volume up configuration register */ 00688 00689 /** 00690 * @brief I2C address soft-volume down configuration register 00691 * \code 00692 * Read/write 00693 * Default value: 0x00 00694 * [7:6] RESERVED 00695 * 5 SVDWE Soft volume down enable 00696 * [4:0] SVDW Soft volume down coefficient 00697 * \endcode 00698 */ 00699 #define STA350BW_SVCB ((uint8_t)0x38) /* soft-volume down configuration register */ 00700 00701 00702 /** 00703 * @brief I2C address DRC RMS filter coefficient c0 23:16 register 00704 * \code 00705 * Read/write 00706 * Default value: 0x01 00707 * [7:0] R_C0 DRC RMS filter coefficient c0 23:16 00708 * \endcode 00709 */ 00710 #define STA350BW_RMS0A ((uint8_t)0x39) /* DRC RMS filter coefficient c0 23:16 register */ 00711 00712 /** 00713 * @brief I2C address DRC RMS filter coefficient c0 15:8 register 00714 * \code 00715 * Read/write 00716 * Default value: 0xEE 00717 * [7:0] R_C0 DRC RMS filter coefficient c0 15:8 00718 * \endcode 00719 */ 00720 #define STA350BW_RMS0B ((uint8_t)0x3A) /* DRC RMS filter coefficient c0 15:8 register */ 00721 00722 /** 00723 * @brief I2C address DRC RMS filter coefficient c0 7:0 register 00724 * \code 00725 * Read/write 00726 * Default value: 0xFF 00727 * [7:0] R_C0 DRC RMS filter coefficient c0 7:0 00728 * \endcode 00729 */ 00730 #define STA350BW_RMS0C ((uint8_t)0x3B) /* DRC RMS filter coefficient c0 7:0 register */ 00731 00732 /** 00733 * @brief I2C address DRC RMS filter coefficient c1 23:16 register 00734 * \code 00735 * Read/write 00736 * Default value: 0x7E 00737 * [7:0] R_C1 DRC RMS filter coefficient c0 23:16 00738 * \endcode 00739 */ 00740 #define STA350BW_RMS1A ((uint8_t)0x3C) /* DRC RMS filter coefficient c1 23:16 register */ 00741 00742 /** 00743 * @brief I2C address DRC RMS filter coefficient c1 15:8 register 00744 * \code 00745 * Read/write 00746 * Default value: 0xC0 00747 * [7:0] R_C1 DRC RMS filter coefficient c1 15:8 00748 * \endcode 00749 */ 00750 #define STA350BW_RMS1B ((uint8_t)0x3D) /* DRC RMS filter coefficient c1 15:8 register */ 00751 00752 /** 00753 * @brief I2C address DRC RMS filter coefficient c1 7:0 register 00754 * \code 00755 * Read/write 00756 * Default value: 0x26 00757 * [7:0] R_C0 DRC RMS filter coefficient c1 7:0 00758 * \endcode 00759 */ 00760 #define STA350BW_RMS1C ((uint8_t)0x3E) /* DRC RMS filter coefficient c1 7:0 register */ 00761 00762 /** 00763 * @brief I2C address Extra volume resolution configuration register 00764 * \code 00765 * Read/write 00766 * Default value: 0x00 00767 * 7 VRESEN Extra volume resolution enable 00768 * 6 VRESTG Extra volume resolution update 00769 * [5:4] C3VR Channel 3 extra volume value 00770 * [3:2] C2VR Channel 2 extra volume value 00771 * [1:0] C1VR Channel 1 extra volume value 00772 * \endcode 00773 */ 00774 #define STA350BW_EVOLRES ((uint8_t)0x3F) /* Extra volume resolution configuration register */ 00775 00776 /** 00777 * @brief I2C address Quantization error noise correction register 00778 * \code 00779 * Read/write 00780 * Default value: 0x00 00781 * 7 Quntization Noise shaping enable 00782 * 6 Quntization Noise shaping on biquad 7 00783 * 5 Quntization Noise shaping on biquad 6 00784 * 4 Quntization Noise shaping on biquad 5 00785 * 3 Quntization Noise shaping on biquad 4 00786 * 2 Quntization Noise shaping on biquad 3 00787 * 1 Quntization Noise shaping on biquad 2 00788 * 0 Quntization Noise shaping on biquad 1 00789 * \endcode 00790 */ 00791 #define STA350BW_NSHAPE ((uint8_t)0x48) /* Quantization error noise correction register */ 00792 00793 /** 00794 * @brief I2C address Extended coefficient range up to -4...4 biquad 1-4 register 00795 * \code 00796 * Read/write 00797 * Default value: 0x00 00798 * [7:6] CXTB4 Extended coefficient on biquad 4 00799 * [5:4] CXTB3 Extended coefficient on biquad 3 00800 * [3:2] CXTB2 Extended coefficient on biquad 2 00801 * [1:0] CXTB1 Extended coefficient on biquad 1 00802 * \endcode 00803 */ 00804 #define STA350BW_CXT_B4B1 ((uint8_t)0x49) /* Extended coefficient range up to -4...4 biquad 1-4 register */ 00805 00806 /** 00807 * @brief I2C address Extended coefficient range up to -4...4 biquad 5-7 register 00808 * \code 00809 * Read/write 00810 * Default value: 0x00 00811 * [7:6] RESERVED 00812 * [5:4] CXTB7 Extended coefficient on biquad 7 00813 * [3:2] CXTB6 Extended coefficient on biquad 6 00814 * [1:0] CXTB5 Extended coefficient on biquad 5 00815 * \endcode 00816 */ 00817 #define STA350BW_CXT_B7B5 ((uint8_t)0x4A) /* Extended coefficient range up to -4...4 biquad 5-7 register */ 00818 00819 /** 00820 * @brief I2C address Miscellaneous register 1 00821 * \code 00822 * Read/write 00823 * Default value: 0x04 00824 * 7 RPDNEN Rate powerdown enable 00825 * 6 NSHHPEN Noise shaping feature enable 00826 * 5 BRIDGOFF Bridge immediate OFF 00827 * [4:3] RESERVED 00828 * 2 CPWMEN Channel PWM enable 00829 * [1:0] RESERVED 00830 * \endcode 00831 */ 00832 #define STA350BW_MISC1 ((uint8_t)0x4B) /* Miscellaneous register 1 */ 00833 00834 /** 00835 * @brief I2C address Miscellaneous register 2 00836 * \code 00837 * Read/write 00838 * Default value: 0x00 00839 * [7:5] RESERVED 00840 * [4:2] PNDLSL Power-down delay selector 00841 * [1:0] RESERVED 00842 * \endcode 00843 */ 00844 #define STA350BW_MISC2 ((uint8_t)0x4C) /* Miscellaneous register 2 */ 00845 00846 /** 00847 * @} 00848 */ 00849 00850 00851 00852 /** @defgroup STA350BW_Main_parameter 00853 * @{ 00854 */ 00855 #define STA350BW_EAPD_ON ((uint8_t)0x80) 00856 #define STA350BW_EAPD_OFF ((uint8_t)0x00) 00857 #define STA350BW_PWDN_OFF ((uint8_t)0x40) 00858 #define STA350BW_PWDN_ON ((uint8_t)0x00) /* low power consumption */ 00859 00860 #define STA350BW_MVOL_0dB ((uint8_t)0x00) 00861 #define STA350BW_MVOL_MUTE ((uint8_t)0xFF) 00862 /** 00863 * @} 00864 */ 00865 00866 00867 /** @defgroup STA350BW_Input_frequency_selection 00868 * @{ 00869 */ 00870 #define STA350BW_Fs_32000 ((uint32_t)32000) 00871 #define STA350BW_Fs_44100 ((uint32_t)44100) 00872 #define STA350BW_Fs_48000 ((uint32_t)48000) 00873 #define STA350BW_Fs_88200 ((uint32_t)88200) 00874 #define STA350BW_Fs_96000 ((uint32_t)96000) 00875 00876 #define STA350BW_MCLK_256_LR_48K ((uint8_t)0x03) 00877 #define STA350BW_MCLK_128_LR_48K ((uint8_t)0x04) 00878 #define STA350BW_MCLK_256_LR_96K ((uint8_t)0x09) 00879 #define STA350BW_MCLK_128_LR_96K ((uint8_t)0x0B) 00880 /** 00881 * @} 00882 */ 00883 00884 00885 00886 00887 00888 /** @defgroup STA350BW_mode_selection 00889 * @brief STA350BW mode configuration constants 00890 * @{ 00891 */ 00892 #define STA350BW_STEREO_CONF ((uint8_t)0x00) 00893 #define STA350BW_2SE_1BTL_CONF ((uint8_t)0x01) 00894 #define STA350BW_STEREO_EXT_BRIDGE_CONF ((uint8_t)0x00) 00895 #define STA350BW_MONOBTL_CONF ((uint8_t)0x11) 00896 #define STA350BW_BINARY_CONF ((uint8_t)0x80) /* on registers 0E, 0F, 10 */ 00897 /** 00898 * @} 00899 */ 00900 00901 /** @defgroup STA350BW_DSP_option_selection 00902 * @brief STA350BW constants related to data path management 00903 * @{ 00904 */ 00905 #define STA350BW_DSPB ((uint8_t)0x00) 00906 #define STA350BW_C1EQBP ((uint8_t)0x01) 00907 #define STA350BW_C2EQBP ((uint8_t)0x02) 00908 #define STA350BW_C1TCB ((uint8_t)0x03) 00909 #define STA350BW_C2TCB ((uint8_t)0x04) 00910 #define STA350BW_C1VBP ((uint8_t)0x05) 00911 #define STA350BW_C2VBP ((uint8_t)0x06) 00912 #define STA350BW_HPB ((uint8_t)0x07) 00913 #define STA350BW_DEMP ((uint8_t)0x08) 00914 #define STA350BW_BQL ((uint8_t)0x09) 00915 #define STA350BW_BQ5 ((uint8_t)0x0A) 00916 #define STA350BW_BQ6 ((uint8_t)0x0B) 00917 #define STA350BW_BQ7 ((uint8_t)0x0C) 00918 #define STA350BW_EXT_RANGE_BQ1 ((uint8_t)0x0D) 00919 #define STA350BW_EXT_RANGE_BQ2 ((uint8_t)0x0E) 00920 #define STA350BW_EXT_RANGE_BQ3 ((uint8_t)0x0F) 00921 #define STA350BW_EXT_RANGE_BQ4 ((uint8_t)0x10) 00922 #define STA350BW_EXT_RANGE_BQ5 ((uint8_t)0x11) 00923 #define STA350BW_EXT_RANGE_BQ6 ((uint8_t)0x12) 00924 #define STA350BW_EXT_RANGE_BQ7 ((uint8_t)0x13) 00925 #define STA350BW_RAM_BANK_SELECT ((uint8_t)0x14) 00926 /** 00927 * @} 00928 */ 00929 00930 00931 00932 #define STA350BW_ERROR ((int32_t)-1) 00933 #define STA350BW_OK ((int32_t)0) 00934 00935 00936 /** @defgroup STA350BW_state_define STA350BW state define 00937 * @brief STA350BW state definitions 00938 * @{ 00939 */ 00940 #define STA350BW_ENABLE ((uint8_t)0x01) 00941 #define STA350BW_DISABLE ((uint8_t)0x00) 00942 #define STA350BW_RANGE_ONE ((uint8_t)0x01) 00943 #define STA350BW_RANGE_TWO ((uint8_t)0x02) 00944 #define STA350BW_RANGE_FOUR ((uint8_t)0x04) 00945 /** 00946 * @} 00947 */ 00948 00949 /** @defgroup STA350BW_channel_define STA350BW channel define 00950 * @brief STA350BW channels definitions 00951 * @{ 00952 */ 00953 #define STA350BW_CHANNEL_MASTER ((uint8_t)0x00) 00954 #define STA350BW_CHANNEL_1 ((uint8_t)0x01) 00955 #define STA350BW_CHANNEL_2 ((uint8_t)0x02) 00956 #define STA350BW_CHANNEL_3 ((uint8_t)0x03) 00957 /** 00958 * @} 00959 */ 00960 00961 /** @defgroup STA350BW_channel_define STA350BW Biq define 00962 * @brief STA350BW Biq definitions 00963 * @{ 00964 */ 00965 #define STA350BW_RAM_BANK_FIRST ((uint8_t)0x00) 00966 #define STA350BW_RAM_BANK_SECOND ((uint8_t)0x01) 00967 #define STA350BW_RAM_BANK_THIRD ((uint8_t)0x02) 00968 #define STA350BW_CH1_BQ1 ((uint8_t)0x00) 00969 #define STA350BW_CH1_BQ2 ((uint8_t)0x01) 00970 #define STA350BW_CH1_BQ3 ((uint8_t)0x02) 00971 #define STA350BW_CH1_BQ4 ((uint8_t)0x03) 00972 #define STA350BW_CH2_BQ1 ((uint8_t)0x04) 00973 #define STA350BW_CH2_BQ2 ((uint8_t)0x05) 00974 #define STA350BW_CH2_BQ3 ((uint8_t)0x06) 00975 #define STA350BW_CH2_BQ4 ((uint8_t)0x07) 00976 00977 /** @defgroup STA350BW_adsress_define STA350BW address define 00978 * @brief STA350BW address definitions 00979 * @{ 00980 */ 00981 #define STA350BW_ADDRESS_1 ((uint8_t)0x38) /* To be used when using I2S1. */ 00982 #define STA350BW_ADDRESS_2 ((uint8_t)0x3A) /* To be used when using I2S2. */ 00983 00984 /* Audio processor initialization structure. */ 00985 typedef struct 00986 { 00987 uint32_t frequency; /* Allowed frequency: 32000, 44100, 48000, 88200, 96000. */ 00988 uint16_t volume; /* Allowed volume: [0..128]. */ 00989 } STA350BW_init_t; 00990 00991 /* Audio processor extern functions. */ 00992 extern uint8_t STA350BW_IO_Init(void); 00993 extern uint8_t STA350BW_IO_Read(uint8_t reg, uint8_t *value); 00994 extern uint8_t STA350BW_IO_Write(uint8_t reg, uint8_t value); 00995 extern uint8_t STA350BW_IO_ReadMulti(uint8_t *pBuffer, uint8_t reg, uint16_t length); 00996 extern uint8_t STA350BW_IO_WriteMulti(uint8_t *pBuffer, uint8_t reg, uint16_t length); 00997 extern uint8_t STA350BW_IO_Delay(uint32_t delay_ms); 00998 00999 #ifdef __cplusplus 01000 } 01001 #endif 01002 01003 #endif /*__STA350BW_H*/ 01004 01005 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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X-NUCLEO-CCA01M1 Sound Terminal Expansion Board